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			52 lines
		
	
	
	
		
			1.7 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			52 lines
		
	
	
	
		
			1.7 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 480c1f7648fc586db12d6003c717c23667a4fcf0 Mon Sep 17 00:00:00 2001
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| From: Ram Chandra Jangir <rjangir@codeaurora.org>
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| Date: Tue, 28 Mar 2017 22:35:33 +0530
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| Subject: [PATCH] clk: qcom: ipq4019: add ess reset
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| 
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| Added the ESS reset in IPQ4019 GCC.
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| 
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| Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
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| ---
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|  drivers/clk/qcom/gcc-ipq4019.c               | 11 +++++++++++
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|  include/dt-bindings/clock/qcom,gcc-ipq4019.h | 11 +++++++++++
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|  2 files changed, 22 insertions(+)
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| 
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| --- a/drivers/clk/qcom/gcc-ipq4019.c
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| +++ b/drivers/clk/qcom/gcc-ipq4019.c
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| @@ -1735,6 +1735,17 @@ static const struct qcom_reset_map gcc_i
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|  	[GCC_TCSR_BCR] = {0x22000, 0},
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|  	[GCC_MPM_BCR] = {0x24000, 0},
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|  	[GCC_SPDM_BCR] = {0x25000, 0},
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| +	[ESS_MAC1_ARES] = {0x1200C, 0},
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| +	[ESS_MAC2_ARES] = {0x1200C, 1},
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| +	[ESS_MAC3_ARES] = {0x1200C, 2},
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| +	[ESS_MAC4_ARES] = {0x1200C, 3},
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| +	[ESS_MAC5_ARES] = {0x1200C, 4},
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| +	[ESS_PSGMII_ARES] = {0x1200C, 5},
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| +	[ESS_MAC1_CLK_DIS] = {0x1200C, 8},
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| +	[ESS_MAC2_CLK_DIS] = {0x1200C, 9},
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| +	[ESS_MAC3_CLK_DIS] = {0x1200C, 10},
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| +	[ESS_MAC4_CLK_DIS] = {0x1200C, 11},
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| +	[ESS_MAC5_CLK_DIS] = {0x1200C, 12},
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|  };
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|  
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|  static const struct regmap_config gcc_ipq4019_regmap_config = {
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| --- a/include/dt-bindings/clock/qcom,gcc-ipq4019.h
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| +++ b/include/dt-bindings/clock/qcom,gcc-ipq4019.h
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| @@ -165,5 +165,16 @@
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|  #define GCC_QDSS_BCR					69
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|  #define GCC_MPM_BCR					70
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|  #define GCC_SPDM_BCR					71
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| +#define ESS_MAC1_ARES					72
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| +#define ESS_MAC2_ARES					73
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| +#define ESS_MAC3_ARES					74
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| +#define ESS_MAC4_ARES					75
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| +#define ESS_MAC5_ARES					76
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| +#define ESS_PSGMII_ARES					77
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| +#define ESS_MAC1_CLK_DIS				78
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| +#define ESS_MAC2_CLK_DIS				79
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| +#define ESS_MAC3_CLK_DIS				80
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| +#define ESS_MAC4_CLK_DIS				81
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| +#define ESS_MAC5_CLK_DIS				82
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|  
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|  #endif
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