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40 lines
1.3 KiB
Diff
40 lines
1.3 KiB
Diff
From b8e898f1cb2753d14c2768510eff27eb54a65afc Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Mon, 13 Dec 2021 15:33:11 +0100
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Subject: [PATCH 648/828] drm/vc4: hdmi: Take the sink maximum TMDS clock into
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account
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In the function that validates that the clock isn't too high, we've only
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taken our controller limitations into account so far.
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However, the sink can have a limit on the maximum TMDS clock it can deal
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with too which is exposed through the EDID and the drm_display_info.
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Make sure we check it.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_hdmi.c | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -1254,12 +1254,18 @@ static enum drm_mode_status
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vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi,
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unsigned long long clock)
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{
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+ const struct drm_connector *connector = &vc4_hdmi->connector;
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+ const struct drm_display_info *info = &connector->display_info;
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+
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if (clock > vc4_hdmi->variant->max_pixel_clock)
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return MODE_CLOCK_HIGH;
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if (vc4_hdmi->disable_4kp60 && clock > HDMI_14_MAX_TMDS_CLK)
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return MODE_CLOCK_HIGH;
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+ if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000))
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+ return MODE_CLOCK_HIGH;
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+
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return MODE_OK;
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}
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