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			68 lines
		
	
	
	
		
			1.9 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			68 lines
		
	
	
	
		
			1.9 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From 0a8f36a231341ac5d66c186bcb1600a5abc00132 Mon Sep 17 00:00:00 2001
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From: chunhui dai <chunhui.dai@mediatek.com>
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Date: Wed, 3 Oct 2018 11:41:44 +0800
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Subject: [PATCH 30/77] drm/mediatek: add clock factor for different IC
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different IC has different clock designed in HDMI, the factor for
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calculate clock should be different. Usinng the data in of_node
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to find this factor.
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Reviewed-by: CK Hu <ck.hu@mediatek.com>
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Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
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---
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 drivers/gpu/drm/mediatek/mtk_dpi.c | 24 +++++++++++++++---------
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 1 file changed, 15 insertions(+), 9 deletions(-)
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diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
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index 0ce4b61efaeb..0dbe9345fa2e 100644
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--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
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+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
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@@ -113,6 +113,7 @@ struct mtk_dpi_yc_limit {
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 };
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 struct mtk_dpi_conf {
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+	unsigned int (*cal_factor)(int clock);
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 	u32 reg_h_fre_con;
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 	bool edge_sel_en;
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 };
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@@ -431,15 +432,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
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 	unsigned int factor;
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 	/* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */
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-
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-	if (mode->clock <= 27000)
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-		factor = 3 << 4;
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-	else if (mode->clock <= 84000)
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-		factor = 3 << 3;
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-	else if (mode->clock <= 167000)
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-		factor = 3 << 2;
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-	else
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-		factor = 3 << 1;
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+	factor = dpi->conf->cal_factor(mode->clock);
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 	drm_display_mode_to_videomode(mode, &vm);
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 	pll_rate = vm.pixelclock * factor;
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@@ -653,7 +646,20 @@ static const struct component_ops mtk_dpi_component_ops = {
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 	.unbind = mtk_dpi_unbind,
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 };
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+static unsigned int mt8173_calculate_factor(int clock)
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+{
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+	if (clock <= 27000)
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+		return 3 << 4;
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+	else if (clock <= 84000)
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+		return 3 << 3;
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+	else if (clock <= 167000)
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+		return 3 << 2;
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+	else
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+		return 3 << 1;
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+}
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+
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 static const struct mtk_dpi_conf mt8173_conf = {
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+	.cal_factor = mt8173_calculate_factor,
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 	.reg_h_fre_con = 0xe0,
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 };
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-- 
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2.19.1
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