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https://github.com/Ysurac/openmptcprouter.git
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103 lines
3.9 KiB
Diff
103 lines
3.9 KiB
Diff
From 73f0f0aab14aaee634f34485d098f0b5539b146b Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Fri, 24 Mar 2023 09:56:31 +0100
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Subject: [PATCH] drm/vc4: plane: Change ptr0_offset to an array
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The BCM2712 will have a fairly different dlist, that will feature one
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Pointer 0 word for each plane.
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Let's prepare by changing the ptr0_offset variable that holds the offset
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in a dlist of the pointer 0 word to an array.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_drv.h | 3 ++-
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drivers/gpu/drm/vc4/vc4_plane.c | 18 +++++++++---------
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2 files changed, 11 insertions(+), 10 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -14,6 +14,7 @@
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#include <drm/drm_debugfs.h>
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#include <drm/drm_device.h>
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#include <drm/drm_encoder.h>
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+#include <drm/drm_fourcc.h>
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#include <drm/drm_gem_dma_helper.h>
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#include <drm/drm_managed.h>
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#include <drm/drm_mm.h>
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@@ -430,7 +431,7 @@ struct vc4_plane_state {
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*/
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u32 pos0_offset;
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u32 pos2_offset;
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- u32 ptr0_offset;
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+ u32 ptr0_offset[DRM_FORMAT_MAX_PLANES];
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u32 lbm_offset;
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/* Offset where the plane's dlist was last stored in the
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -1242,7 +1242,7 @@ static int vc4_plane_mode_set(struct drm
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*
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* The pointers may be any byte address.
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*/
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- vc4_state->ptr0_offset = vc4_state->dlist_count;
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+ vc4_state->ptr0_offset[0] = vc4_state->dlist_count;
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for (i = 0; i < num_planes; i++)
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vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
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@@ -1447,13 +1447,13 @@ void vc4_plane_async_set_fb(struct drm_p
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* scanout will start from this address as soon as the FIFO
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* needs to refill with pixels.
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*/
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- writel(addr, &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
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+ writel(addr, &vc4_state->hw_dlist[vc4_state->ptr0_offset[0]]);
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/* Also update the CPU-side dlist copy, so that any later
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* atomic updates that don't do a new modeset on our plane
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* also use our updated address.
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*/
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- vc4_state->dlist[vc4_state->ptr0_offset] = addr;
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+ vc4_state->dlist[vc4_state->ptr0_offset[0]] = addr;
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drm_dev_exit(idx);
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}
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@@ -1517,8 +1517,8 @@ static void vc4_plane_atomic_async_updat
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new_vc4_state->dlist[vc4_state->pos0_offset];
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vc4_state->dlist[vc4_state->pos2_offset] =
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new_vc4_state->dlist[vc4_state->pos2_offset];
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- vc4_state->dlist[vc4_state->ptr0_offset] =
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- new_vc4_state->dlist[vc4_state->ptr0_offset];
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+ vc4_state->dlist[vc4_state->ptr0_offset[0]] =
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+ new_vc4_state->dlist[vc4_state->ptr0_offset[0]];
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/* Note that we can't just call vc4_plane_write_dlist()
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* because that would smash the context data that the HVS is
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@@ -1528,8 +1528,8 @@ static void vc4_plane_atomic_async_updat
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&vc4_state->hw_dlist[vc4_state->pos0_offset]);
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writel(vc4_state->dlist[vc4_state->pos2_offset],
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&vc4_state->hw_dlist[vc4_state->pos2_offset]);
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- writel(vc4_state->dlist[vc4_state->ptr0_offset],
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- &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
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+ writel(vc4_state->dlist[vc4_state->ptr0_offset[0]],
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+ &vc4_state->hw_dlist[vc4_state->ptr0_offset[0]]);
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drm_dev_exit(idx);
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}
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@@ -1556,7 +1556,7 @@ static int vc4_plane_atomic_async_check(
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if (old_vc4_state->dlist_count != new_vc4_state->dlist_count ||
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old_vc4_state->pos0_offset != new_vc4_state->pos0_offset ||
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old_vc4_state->pos2_offset != new_vc4_state->pos2_offset ||
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- old_vc4_state->ptr0_offset != new_vc4_state->ptr0_offset ||
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+ old_vc4_state->ptr0_offset[0] != new_vc4_state->ptr0_offset[0] ||
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vc4_lbm_size(plane->state) != vc4_lbm_size(new_plane_state))
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return -EINVAL;
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@@ -1566,7 +1566,7 @@ static int vc4_plane_atomic_async_check(
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for (i = 0; i < new_vc4_state->dlist_count; i++) {
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if (i == new_vc4_state->pos0_offset ||
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i == new_vc4_state->pos2_offset ||
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- i == new_vc4_state->ptr0_offset ||
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+ i == new_vc4_state->ptr0_offset[0] ||
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(new_vc4_state->lbm_offset &&
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i == new_vc4_state->lbm_offset))
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continue;
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