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			103 lines
		
	
	
	
		
			3.5 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			103 lines
		
	
	
	
		
			3.5 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From f292d1bf83ec160bef2532b58aa08f5b71041923 Mon Sep 17 00:00:00 2001
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Message-Id: <f292d1bf83ec160bef2532b58aa08f5b71041923.1678716918.git.lorenzo@kernel.org>
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In-Reply-To: <3cf212c4ce6cd72c09bc47f35f539ba0afd4d106.1678716918.git.lorenzo@kernel.org>
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References: <3cf212c4ce6cd72c09bc47f35f539ba0afd4d106.1678716918.git.lorenzo@kernel.org>
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Sat, 11 Mar 2023 18:13:04 +0100
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Subject: [PATCH net-next 2/2] net: ethernet: mtk_wed: move cpuboot in a
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 dedicated dts node
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Since the cpuboot memory region is not part of the RAM SoC, move cpuboot
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in a deidicated syscon node.
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This patch helps to keep backward-compatibility with older version of
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uboot codebase where we have a limit of 8 reserved-memory dts child
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nodes.
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Keep backward-compatibility with older dts version where cpuboot was
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defined as reserved-memory child node.
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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---
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 drivers/net/ethernet/mediatek/mtk_wed_mcu.c | 34 +++++++++++++++++----
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 drivers/net/ethernet/mediatek/mtk_wed_wo.h  |  3 +-
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 2 files changed, 30 insertions(+), 7 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_wed_mcu.c
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+++ b/drivers/net/ethernet/mediatek/mtk_wed_mcu.c
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@@ -32,14 +32,25 @@ static struct mtk_wed_wo_memory_region m
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 	},
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 };
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-static u32 wo_r32(u32 reg)
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+static u32 wo_r32(struct mtk_wed_wo *wo, u32 reg)
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 {
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-	return readl(mem_region[MTK_WED_WO_REGION_BOOT].addr + reg);
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+	u32 val;
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+
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+	if (!wo->boot_regmap)
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+		return readl(mem_region[MTK_WED_WO_REGION_BOOT].addr + reg);
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+
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+	if (regmap_read(wo->boot_regmap, reg, &val))
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+		val = ~0;
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+
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+	return val;
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 }
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-static void wo_w32(u32 reg, u32 val)
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+static void wo_w32(struct mtk_wed_wo *wo, u32 reg, u32 val)
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 {
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-	writel(val, mem_region[MTK_WED_WO_REGION_BOOT].addr + reg);
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+	if (wo->boot_regmap)
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+		regmap_write(wo->boot_regmap, reg, val);
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+	else
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+		writel(val, mem_region[MTK_WED_WO_REGION_BOOT].addr + reg);
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 }
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 static struct sk_buff *
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@@ -317,6 +328,9 @@ mtk_wed_mcu_load_firmware(struct mtk_wed
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 	u32 val, boot_cr;
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 	int ret, i;
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+	wo->boot_regmap = syscon_regmap_lookup_by_phandle(wo->hw->node,
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+							  "mediatek,wo-cpuboot");
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+
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 	/* load firmware region metadata */
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 	for (i = 0; i < ARRAY_SIZE(mem_region); i++) {
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 		int index = of_property_match_string(wo->hw->node,
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@@ -325,6 +339,9 @@ mtk_wed_mcu_load_firmware(struct mtk_wed
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 		if (index < 0)
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 			continue;
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+		if (index == MTK_WED_WO_REGION_BOOT && !IS_ERR(wo->boot_regmap))
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+			continue;
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+
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 		ret = mtk_wed_get_reserved_memory_region(wo->hw, index, &mem_region[i]);
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 		if (ret)
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 			return ret;
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@@ -373,13 +390,13 @@ mtk_wed_mcu_load_firmware(struct mtk_wed
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 		boot_cr = MTK_WO_MCU_CFG_LS_WA_BOOT_ADDR_ADDR;
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 	else
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 		boot_cr = MTK_WO_MCU_CFG_LS_WM_BOOT_ADDR_ADDR;
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-	wo_w32(boot_cr, mem_region[MTK_WED_WO_REGION_EMI].phy_addr >> 16);
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+	wo_w32(wo, boot_cr, mem_region[MTK_WED_WO_REGION_EMI].phy_addr >> 16);
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 	/* wo firmware reset */
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-	wo_w32(MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, 0xc00);
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+	wo_w32(wo, MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, 0xc00);
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-	val = wo_r32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR) |
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+	val = wo_r32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR) |
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 	      MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK;
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-	wo_w32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val);
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+	wo_w32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val);
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 out:
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 	release_firmware(fw);
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--- a/drivers/net/ethernet/mediatek/mtk_wed_wo.h
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+++ b/drivers/net/ethernet/mediatek/mtk_wed_wo.h
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@@ -231,6 +231,7 @@ struct mtk_wed_wo_queue {
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 struct mtk_wed_wo {
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 	struct mtk_wed_hw *hw;
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+	struct regmap *boot_regmap;
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 	struct mtk_wed_wo_queue q_tx;
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 	struct mtk_wed_wo_queue q_rx;
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