mirror of
https://github.com/Ysurac/openmptcprouter.git
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59 lines
2.3 KiB
Diff
59 lines
2.3 KiB
Diff
From c02066afddae54708020361f24f85a630ad2ad98 Mon Sep 17 00:00:00 2001
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From: Annaliese McDermond <nh6z@nh6z.net>
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Date: Wed, 3 Apr 2019 21:01:55 -0700
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Subject: [PATCH 421/432] ASoC: tlv320aic32x4: Add Playback PowerTune Controls
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commit d3e6e374566e1154820a9a3dc82f7eef646fcf95 upstream.
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PowerTune controls the power level of the chip. On playback this
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indirectly controls things like the gain of the various output
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amplifiers. This can allow for the decrease of output levels
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from the codec. This adds controls for those power levels to
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the driver.
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Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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sound/soc/codecs/tlv320aic32x4.c | 9 +++++++++
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sound/soc/codecs/tlv320aic32x4.h | 2 ++
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2 files changed, 11 insertions(+)
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diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c
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index 5da0a6edbf61..3f59d103c0ae 100644
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--- a/sound/soc/codecs/tlv320aic32x4.c
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+++ b/sound/soc/codecs/tlv320aic32x4.c
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@@ -248,9 +248,18 @@ static const char * const lo_cm_text[] = {
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static SOC_ENUM_SINGLE_DECL(lo_cm_enum, AIC32X4_CMMODE, 3, lo_cm_text);
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+static const char * const ptm_text[] = {
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+ "P3", "P2", "P1",
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+};
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+
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+static SOC_ENUM_SINGLE_DECL(l_ptm_enum, AIC32X4_LPLAYBACK, 2, ptm_text);
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+static SOC_ENUM_SINGLE_DECL(r_ptm_enum, AIC32X4_RPLAYBACK, 2, ptm_text);
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+
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static const struct snd_kcontrol_new aic32x4_snd_controls[] = {
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SOC_DOUBLE_R_S_TLV("PCM Playback Volume", AIC32X4_LDACVOL,
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AIC32X4_RDACVOL, 0, -0x7f, 0x30, 7, 0, tlv_pcm),
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+ SOC_ENUM("DAC Left Playback PowerTune Switch", l_ptm_enum),
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+ SOC_ENUM("DAC Right Playback PowerTune Switch", r_ptm_enum),
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SOC_DOUBLE_R_S_TLV("HP Driver Gain Volume", AIC32X4_HPLGAIN,
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AIC32X4_HPRGAIN, 0, -0x6, 0x1d, 5, 0,
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tlv_driver_gain),
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diff --git a/sound/soc/codecs/tlv320aic32x4.h b/sound/soc/codecs/tlv320aic32x4.h
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index 88205bc97198..40734211bc0e 100644
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--- a/sound/soc/codecs/tlv320aic32x4.h
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+++ b/sound/soc/codecs/tlv320aic32x4.h
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@@ -78,6 +78,8 @@ int aic32x4_register_clocks(struct device *dev, const char *mclk_name);
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#define AIC32X4_PWRCFG AIC32X4_REG(1, 1)
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#define AIC32X4_LDOCTL AIC32X4_REG(1, 2)
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+#define AIC32X4_LPLAYBACK AIC32X4_REG(1, 3)
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+#define AIC32X4_RPLAYBACK AIC32X4_REG(1, 4)
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#define AIC32X4_OUTPWRCTL AIC32X4_REG(1, 9)
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#define AIC32X4_CMMODE AIC32X4_REG(1, 10)
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#define AIC32X4_HPLROUTE AIC32X4_REG(1, 12)
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--
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2.19.1
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