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34 lines
999 B
Diff
34 lines
999 B
Diff
From 6e3ac9c07cf666904718a26011f6bbe95501844d Mon Sep 17 00:00:00 2001
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From: Dom Cobley <popcornmix@gmail.com>
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Date: Tue, 19 Oct 2021 14:14:55 +0100
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Subject: [PATCH 562/828] clk-bcm2835: Remove VEC clock support
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Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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---
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drivers/clk/bcm/clk-bcm2835.c | 15 ---------------
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1 file changed, 15 deletions(-)
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -2208,21 +2208,6 @@ static const struct bcm2835_clk_desc clk
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.frac_bits = 12,
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.tcnt_mux = 28),
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- /* TV encoder clock. Only operating frequency is 108Mhz. */
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- [BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
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- SOC_ALL,
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- .name = "vec",
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- .ctl_reg = CM_VECCTL,
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- .div_reg = CM_VECDIV,
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- .int_bits = 4,
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- .frac_bits = 0,
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- /*
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- * Allow rate change propagation only on PLLH_AUX which is
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- * assigned index 7 in the parent array.
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- */
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- .set_rate_parent = BIT(7),
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- .tcnt_mux = 29),
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-
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/* dsi clocks */
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[BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK(
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SOC_ALL,
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