mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
Remove not used patches
This commit is contained in:
Ycarus (Yannick Chabanois)
parent
c89361bdd7
commit
7e3973ef27
352 changed files with 0 additions and 60007 deletions
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@ -1,14 +0,0 @@
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#!/bin/sh
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CFG=$1
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[ -n "$CFG" ] || CFG=/etc/board.json
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[ -d "/etc/board.d/" -a ! -s "$CFG" ] && {
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for a in $(ls /etc/board.d/*); do
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[ -x $a ] || continue;
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$(. $a)
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done
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}
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[ -s "$CFG" ] || return 1
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@ -1,346 +0,0 @@
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#!/bin/sh
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#
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# Copyright (c) 2015 The Linux Foundation. All rights reserved.
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# Copyright (c) 2011-2015 OpenWrt.org
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#
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. /lib/functions/uci-defaults.sh
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. /lib/functions/system.sh
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CFG=/etc/board.json
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# do not run on preinit/early init
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[ "$EARLY_INIT" ] && return
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strstr() {
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[ "${1#*$2*}" = "$1" ] && return 1
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return 0
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}
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print_array() {
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json_add_array $1
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case "$1" in
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5G_NSA)
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for element in $2
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do
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json_add_string "" "$(echo $element)"
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done
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;;
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5G_SA)
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for element in $2
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do
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json_add_string "" "$(echo $element)"
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done
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;;
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4G)
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for element in $2
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do
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json_add_string "" "$(echo $element)"
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done
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;;
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3G)
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for element in $2
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do
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json_add_string "" "wcdma_$(echo $element)"
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done
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;;
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2G)
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for element in $2
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do
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json_add_string "" "$(echo $element)"
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done
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;;
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esac
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json_close_array
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}
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gather_band_capabilities() {
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# Same logic as unhandler.c
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###################### EG06 #########################
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if strstr $revision_from_unhandler "EG06E"; then #EG06E
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lte_bands="1 3 5 7 8 20 28 32 38 40 41" #B
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trysg_bands="850 900 1800 2100" #MHz
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dug_bands=""
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elif strstr $revision_from_unhandler "EG06A"; then #EG06A
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lte_bands="2 4 5 7 12 13 25 26 29 30 66"
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trysg_bands="850 1700 1900"
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dug_bands=""
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###################### EC25 #########################
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elif strstr $revision_from_unhandler "EC25EF"; then #EC25E
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lte_bands="1 3 5 7 8 20 38 40 41"
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trysg_bands="850 900 2100"
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dug_bands="900 1800" #MHz
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elif strstr $revision_from_unhandler "EC25EC"; then #EC25EC
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lte_bands="1 3 7 8 20 28"
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trysg_bands="900 2100"
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dug_bands="900 1800"
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elif strstr $revision_from_unhandler "EC25AUX"; then #EC25AUX
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lte_bands="1 2 3 4 5 7 8 28 40"
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trysg_bands="850 900 1700 1900 2100"
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dug_bands="850 900 1800 1900"
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elif strstr $revision_from_unhandler "EC25AFA"; then #EC25A
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lte_bands="2 4 12"
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trysg_bands="850 1700 1900"
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dug_bands=""
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elif strstr $revision_from_unhandler "EC25V"; then #EC25V
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lte_bands="4 13"
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trysg_bands=""
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dug_bands=""
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elif strstr $revision_from_unhandler "EC25AFX"; then #EC25AFX
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lte_bands="2 4 5 12 13 14 66 71"
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trysg_bands="850 1700 1900"
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dug_bands=""
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elif strstr $revision_from_unhandler "EC25AFF"; then #EC25AF
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lte_bands="2 4 5 12 13 14 66 71"
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trysg_bands="850 1700 1900"
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dug_bands=""
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elif strstr $revision_from_unhandler "EC25AUTF"; then #EC25AUT
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lte_bands="1 3 5 7 28"
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trysg_bands="850 2100"
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dug_bands=""
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elif strstr $revision_from_unhandler "EC25AUTL"; then #EC25AUTL
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lte_bands="3 7 28"
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trysg_bands=""
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dug_bands=""
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elif strstr $revision_from_unhandler "EC25AUF"; then #EC25AU
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lte_bands="1 2 3 4 5 7 8 28 40"
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trysg_bands="850 900 1900 2100"
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dug_bands="850 900 1800 1900"
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elif strstr $revision_from_unhandler "EC25J"; then #EC25J
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lte_bands="1 3 8 18 19 26 41"
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trysg_bands="800 900 2100"
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dug_bands=""
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elif strstr $revision_from_unhandler "EC25EUX"; then #EC25EUX
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lte_bands="1 3 7 8 20 28 38 40 41"
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trysg_bands="900 2100"
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dug_bands="900 1800"
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elif strstr $revision_from_unhandler "EC25EUF"; then #EC25EU
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lte_bands="1 3 7 8 20 28 38 40 41"
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trysg_bands="900 2100"
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dug_bands="900 1800"
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elif strstr $revision_from_unhandler "EC25EUG"; then #EC25EU
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lte_bands="1 3 7 8 20 28 38 40 41"
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trysg_bands="900 2100"
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dug_bands="900 1800"
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elif strstr $revision_from_unhandler "EC25MX"; then #EC25MX
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lte_bands="2 4 5 7 28 66"
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trysg_bands="850 1700 1900"
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dug_bands=""
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###################### EC21 #########################
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elif strstr $revision_from_unhandler "EC21EUX"; then #EC21EUX
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lte_bands="1 3 7 8 20 28"
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trysg_bands="900 2100"
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dug_bands="900 1800"
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elif strstr $revision_from_unhandler "EC21EU"; then #EC21EU
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lte_bands="1 3 7 8 20 28"
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trysg_bands="900 2100"
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dug_bands="900 1800"
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elif strstr $revision_from_unhandler "EC21EC"; then #EC21EC
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lte_bands="1 3 7 8 20 28"
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trysg_bands="900 2100"
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dug_bands="900 1800"
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elif strstr $revision_from_unhandler "EC21E"; then #EC21E
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lte_bands="1 3 5 7 8 20"
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trysg_bands="850 900 2100"
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dug_bands="900 1800"
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elif strstr $revision_from_unhandler "EC21V"; then #EC21V
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lte_bands="4 13"
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trysg_bands=""
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dug_bands=""
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elif strstr $revision_from_unhandler "EC21KL"; then #EC21KL
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lte_bands="1 3 5 7 8"
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trysg_bands=""
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dug_bands=""
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elif strstr $revision_from_unhandler "EC21J"; then #EC21J
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lte_bands="1 3 8 18 19 26"
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trysg_bands=""
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dug_bands=""
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elif strstr $revision_from_unhandler "EC21AUX"; then #EC21AUX
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lte_bands="1 2 3 4 5 7 8 28 40"
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trysg_bands="850 900 1700 1900 2100"
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dug_bands="850 900 1800 1900"
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elif strstr $revision_from_unhandler "EC21AUT"; then #EC21AUT
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lte_bands="1 3 5 7 28"
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trysg_bands="850 2100"
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dug_bands=""
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elif strstr $revision_from_unhandler "EC21AU"; then #EC21AU
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lte_bands="1 2 3 4 5 7 8 28 40"
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trysg_bands="850 900 1900 2100"
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dug_bands="850 900 1800 1900"
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elif strstr $revision_from_unhandler "EC21A"; then #EC21A
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lte_bands="2 4 12"
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trysg_bands="850 1700 1900"
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dug_bands=""
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###################### EG25 #########################
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elif strstr $revision_from_unhandler "EG25G"; then #EG25G
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lte_bands="1 2 3 4 5 7 8 12 13 18 19 20 25 26 28 38 39 40 41"
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trysg_bands="800 850 900 1700 1900 2100"
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dug_bands="850 900 1800 1900"
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elif strstr $revision_from_unhandler "EG12EA"; then #EG12EA
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lte_bands="1 3 5 7 8 20 28 38 40 41"
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trysg_bands="850 900 1800 2100"
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dug_bands=""
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elif strstr $revision_from_unhandler "EG12NA"; then #EG12NA
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lte_bands="2 4 5 7 12 13 14 17 25 26 29 30 41 66 71"
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trysg_bands="850 1700 1900"
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dug_bands=""
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elif strstr $revision_from_unhandler "BG96"; then #BG96M
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lte_bands="1 2 3 4 5 8 12 13 18 19 20 26 28 39"
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trysg_bands=""
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dug_bands="850 900 1800 1900"
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##################### SLM750 ########################
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elif strstr $revision_from_unhandler "750VE"; then #SLM750VE
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lte_bands="1 3 5 7 8 20 40"
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trysg_bands="850 900 2100"
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dug_bands="900 1800"
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elif strstr $revision_from_unhandler "750VAU"; then #SLM750VAU
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lte_bands="1 3 5 7 8 28 40"
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trysg_bands="850 900 2100"
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dug_bands="850 900 1800"
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elif strstr $revision_from_unhandler "750VA"; then #SLM750VA
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lte_bands="2 4 5 12 13 17 18 25 26 41"
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trysg_bands="850 1700 1900"
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dug_bands="850 1900"
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elif strstr $revision_from_unhandler "750VJ"; then #SLM750VJ
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lte_bands="1 3 8 18 19 26 41"
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trysg_bands="800 900 2100"
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dug_bands=""
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elif strstr $revision_from_unhandler "750VSA"; then #SLM750VSA
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lte_bands="2 4 5 7 8 28 40"
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trysg_bands="850 900 1900"
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dug_bands="850 900 1900"
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###################### UC20 #########################
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elif strstr $revision_from_unhandler "UC20E"; then #UC20E
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lte_bands=""
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trysg_bands="900 2100"
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dug_bands="850 900 1800 1900"
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elif strstr $revision_from_unhandler "UC20G"; then #UC20G
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lte_bands=""
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trysg_bands="800 850 900 1900 2100"
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dug_bands="850 900 1800 1900"
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elif strstr $revision_from_unhandler "UC20A"; then #UC20A
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lte_bands=""
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trysg_bands="850 1900"
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dug_bands=""
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###################### EC200A #########################
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elif strstr $revision_from_unhandler "EC200AAU"; then #EC200AAU
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lte_bands="1 2 3 4 5 7 8 28 40 66"
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trysg_bands="850 900 1700 1900 2100"
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dug_bands="850 900 1800 1900"
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elif strstr $revision_from_unhandler "EC200AEU"; then #EC200AEU
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lte_bands="1 3 5 7 8 20 28 38 40 41"
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trysg_bands="850 900 2100"
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dug_bands="900 1800"
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####################### RG501QEU #######################
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elif strstr $revision_from_unhandler "RG501QEU"; then #5G module
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nsa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 77 78"
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sa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 77 78"
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lte_bands="1 3 5 7 8 20 28 32 38 40 41 42 43"
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trysg_bands="2100 850 900"
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dug_bands=""
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elif strstr $revision_from_unhandler "RG520NEU"; then #5G module
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nsa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 75 76 77 78"
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sa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 75 76 77 78"
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lte_bands="1 3 5 7 8 20 28 32 38 40 41 42 43"
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trysg_bands="2100 850 900"
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dug_bands=""
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else
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lte_bands="1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28"
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trysg_bands="700 800 850 900 1500 1700 2600"
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dug_bands="1700 1800 1900 2100"
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fi
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}
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validate_service_modes() {
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json_get_keys service_modes service_modes
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found_modes="$(printf "$service_modes" | awk '!seen[$0]++'| wc -l)"
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[ "$found_modes" -eq 0 ] && {
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return 0
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}
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return 1
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}
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#~ Get model name for RUTX products
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setup_modem() {
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local key="$1"
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local object_num="$2"
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local id gps boudrate type desc control product vendor stop_bits
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json_select "$object_num"
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json_get_vars id product
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if [ "$id" = "$id_from_unhandler" ]; then
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[ -z "$product" ] || \
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{
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[ -f "/sys/bus/usb/devices/$id/idVendor" ] && [ -f "/sys/bus/usb/devices/$id/idProduct" ] || {
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json_select ..
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return 1
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}
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validate_service_modes && {
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gather_band_capabilities
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json_select_object service_modes
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[ -z "$nsa_nr5g_bands" ] || print_array "5G_NSA" "$nsa_nr5g_bands"
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[ -z "$sa_nr5g_bands" ] || print_array "5G_SA" "$sa_nr5g_bands"
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[ -z "$lte_bands" ] || print_array "4G" "$lte_bands"
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[ -z "$trysg_bands" ] || print_array "3G" "$trysg_bands"
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[ -z "$dug_bands" ] || print_array "2G" "$dug_bands"
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json_select ..
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}
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json_select ..
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return 1
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}
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vendor="$(cat "/sys/bus/usb/devices/$id/idVendor")"
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product="$(cat "/sys/bus/usb/devices/$id/idProduct")"
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[ -f "/lib/network/wwan/$vendor:$product" ] && {
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devicename="$id"
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gather_band_capabilities
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json_set_namespace defaults old_cb
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json_load "$(cat /lib/network/wwan/$vendor:$product)"
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json_get_vars gps boudrate type desc control stop_bits
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json_set_namespace "$old_cb"
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[ "${devicename%%:*}" = "$devicename" ] && {
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json_add_string vendor "$vendor"
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json_add_string product "$product"
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json_add_string gps "$gps"
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json_add_string stop_bits "$stop_bits"
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json_add_string boudrate "$boudrate"
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json_add_string type "$type"
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json_add_string desc "$desc"
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json_add_string control "$control"
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json_add_string revision "${revision_from_unhandler::-2}"
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json_add_object service_modes
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[ -z "$nsa_nr5g_bands" ] || print_array "5G_NSA" "$nsa_nr5g_bands"
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[ -z "$sa_nr5g_bands" ] || print_array "5G_SA" "$sa_nr5g_bands"
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[ -z "$lte_bands" ] || print_array "4G" "$lte_bands"
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[ -z "$trysg_bands" ] || print_array "3G" "$trysg_bands"
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[ -z "$dug_bands" ] || print_array "2G" "$dug_bands"
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json_close_object
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}
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}
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fi
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json_select ..
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}
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[ -s "${CFG}" ] || exit 1
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id_from_unhandler="$1"
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revision_from_unhandler="$2"
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lock /var/run/board_modem.lock
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board_config_update
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json_for_each_item setup_modem modems
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board_config_flush
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lock -u /var/run/board_modem.lock
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exit 0
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@ -1,47 +0,0 @@
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#!/bin/sh
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. /lib/functions/uci-defaults.sh
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CFG=/etc/board.json
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SLP=30
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check_modem() {
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json_select "$2"
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json_get_vars id
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[ -z "$id" ] && {
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json_select ..
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return 0
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}
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#logger -t "board-track" "ls -d /sys/bus/usb/devices/$id/${id}*/tty?*"
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ttys=$(ls -d /sys/bus/usb/devices/$id/${id}*/tty?*)
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[ -n "$ttys" ] || { #FAILED TO FIND MODEM
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logger -t "board-track" "modem $id not detected"
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for m in /sys/class/gpio/modem*_power; do
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label="$(basename $m | awk -F_ '{print $1}')"
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mctl -s -m ${label}
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sleep 1
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mctl -p -m ${label}
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done
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sleep 5
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ip link set up dev wwan0 2>&1 >/dev/null
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ip link set up dev wwan1 2>&1 >/dev/null
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json_select ..
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return 1
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}
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[ -n "$(ip link show dev wwan0 | grep DOWN)" ] && ip link set up dev wwan0 2>&1 >/dev/null
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[ -n "$(ip link show dev wwan1 | grep DOWN)" ] && ip link set up dev wwan1 2>&1 >/dev/null
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#MODEM UP
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json_select ..
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}
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board_config_update
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while true; do
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json_for_each_item check_modem modems
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sleep $SLP
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[ $SLP -lt 300 ] && SLP=$((SLP+30))
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done
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|
@ -1,824 +0,0 @@
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#!/bin/sh
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|
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CFG=/etc/board.json
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|
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. /usr/share/libubox/jshn.sh
|
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|
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[ -s $CFG ] || /bin/board_detect || exit 1
|
||||
|
||||
[ -s /etc/config/network ] && \
|
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[ -s /etc/config/system ] && \
|
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[ -s /etc/config/hwinfo ] && \
|
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[ -s /etc/config/blesem ] && \
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[ -s /etc/config/poe ] && \
|
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exit 0
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|
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generate_bridge() {
|
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local name=$1
|
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local macaddr=$2
|
||||
uci -q batch <<-EOF
|
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set network.$name=device
|
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set network.$name.name=$name
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set network.$name.type=bridge
|
||||
EOF
|
||||
if [ -n "$macaddr" ]; then
|
||||
uci -q batch <<-EOF
|
||||
set network.$name.macaddr=$macaddr
|
||||
EOF
|
||||
fi
|
||||
}
|
||||
|
||||
generate_static_network() {
|
||||
uci -q batch <<-EOF
|
||||
delete network.loopback
|
||||
set network.loopback='interface'
|
||||
set network.loopback.device='lo'
|
||||
set network.loopback.proto='static'
|
||||
set network.loopback.ipaddr='127.0.0.1'
|
||||
set network.loopback.netmask='255.0.0.0'
|
||||
EOF
|
||||
|
||||
if json_is_a dsl object; then
|
||||
json_select dsl
|
||||
if json_is_a atmbridge object; then
|
||||
json_select atmbridge
|
||||
local vpi vci encaps payload nameprefix
|
||||
json_get_vars vpi vci encaps payload nameprefix
|
||||
uci -q batch <<-EOF
|
||||
delete network.atm
|
||||
set network.atm='atm-bridge'
|
||||
set network.atm.vpi='$vpi'
|
||||
set network.atm.vci='$vci'
|
||||
set network.atm.encaps='$encaps'
|
||||
set network.atm.payload='$payload'
|
||||
set network.atm.nameprefix='$nameprefix'
|
||||
EOF
|
||||
json_select ..
|
||||
fi
|
||||
|
||||
if json_is_a modem object; then
|
||||
json_select modem
|
||||
local type annex firmware tone xfer_mode
|
||||
json_get_vars type annex firmware tone xfer_mode
|
||||
uci -q batch <<-EOF
|
||||
delete network.dsl
|
||||
set network.dsl='dsl'
|
||||
set network.dsl.annex='$annex'
|
||||
set network.dsl.firmware='$firmware'
|
||||
set network.dsl.tone='$tone'
|
||||
set network.dsl.xfer_mode='$xfer_mode'
|
||||
EOF
|
||||
json_select ..
|
||||
fi
|
||||
json_select ..
|
||||
fi
|
||||
}
|
||||
|
||||
ip6assign=
|
||||
disable_vlan=
|
||||
apply_network_options() {
|
||||
json_select network_options && {
|
||||
json_get_vars ip6assign ula disable_vlan
|
||||
json_select ..
|
||||
}
|
||||
[ -z "$ip6assign" ] && ip6assign=1
|
||||
[ -z "$ula" ] && ula=1
|
||||
|
||||
[ -e /proc/sys/net/ipv6 ] && [ "$ula" = 1 ] && {
|
||||
uci -q batch <<-EOF
|
||||
delete network.globals
|
||||
set network.globals='globals'
|
||||
set network.globals.ula_prefix='auto'
|
||||
EOF
|
||||
}
|
||||
}
|
||||
|
||||
metric=1
|
||||
addr_offset=2
|
||||
generate_network() {
|
||||
local ports device macaddr proto type ipaddr netmask vlan no_metric
|
||||
local bridge=$2
|
||||
|
||||
uci -q batch <<-EOF
|
||||
delete "network.$1"
|
||||
set network.$1='interface'
|
||||
EOF
|
||||
|
||||
json_select network
|
||||
json_select "$1"
|
||||
json_get_vars device macaddr proto ipaddr netmask vlan ipv6 guest type
|
||||
json_get_values ports ports
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
|
||||
json_select network_options && {
|
||||
json_get_vars no_metric
|
||||
json_select ..
|
||||
}
|
||||
|
||||
# Force bridge for "lan" as it may have other devices (e.g. wireless)
|
||||
# bridged
|
||||
[ "$1" = "lan" ] && [ -z "$ports" ] && {
|
||||
ports="$device"
|
||||
}
|
||||
|
||||
[ -n "$ports" ] && [ -z "$bridge" ] && {
|
||||
|
||||
[ -n "$macaddr" ] && {
|
||||
for port in $ports; do
|
||||
uci -q batch <<-EOF
|
||||
add network device
|
||||
set network.@device[-1].name='$port'
|
||||
set network.@device[-1].macaddr='$macaddr'
|
||||
EOF
|
||||
done
|
||||
}
|
||||
|
||||
uci -q batch <<-EOF
|
||||
add network device
|
||||
rename network.@device[-1]='br_$1'
|
||||
set network.@device[-1].name='br-$1'
|
||||
set network.@device[-1].type='bridge'
|
||||
EOF
|
||||
|
||||
[ -n "$device" ] && uci add_list network.@device[-1].ports="$device" || {
|
||||
for port in $ports; do
|
||||
uci add_list network.@device[-1].ports="$port"
|
||||
done
|
||||
}
|
||||
|
||||
device=br-$1
|
||||
type=
|
||||
macaddr=""
|
||||
|
||||
json_select hwinfo
|
||||
json_get_vars dsa
|
||||
json_select ..
|
||||
|
||||
}
|
||||
|
||||
if [ -n "$macaddr" ]; then
|
||||
uci -q batch <<-EOF
|
||||
add network device
|
||||
set network.@device[-1].name='$device'
|
||||
set network.@device[-1].macaddr='$macaddr'
|
||||
EOF
|
||||
fi
|
||||
|
||||
uci -q batch <<-EOF
|
||||
delete network.$1
|
||||
set network.$1='interface'
|
||||
set network.$1.type='$type'
|
||||
set network.$1.device='$device'
|
||||
set network.$1.proto='none'
|
||||
EOF
|
||||
[ "$1" != "lan" ] && metric=$((metric+1))
|
||||
[ "$guest" = "1" ] && uci set network.$1.guest='1'
|
||||
|
||||
case "$proto" in
|
||||
static)
|
||||
local ipad metr
|
||||
case "$1" in
|
||||
lan)
|
||||
ipad="192.168.100.1"
|
||||
metr=1
|
||||
;;
|
||||
*)
|
||||
ipad=${ipaddr:-"192.168.$((addr_offset++)).1"}
|
||||
metr="$metric"
|
||||
;;
|
||||
esac
|
||||
|
||||
netm=${netmask:-"255.255.255.0"}
|
||||
|
||||
uci -q batch <<-EOF
|
||||
set network.$1.proto='static'
|
||||
set network.$1.ipaddr='$ipad'
|
||||
set network.$1.netmask='$netm'
|
||||
set network.$1.metric='$metr'
|
||||
EOF
|
||||
|
||||
[ "$ipv6" = "1" ] && uci set network.$1.ipv6="$ipv6"
|
||||
[ -e /proc/sys/net/ipv6 ] && [ "$ip6assign" = 1 ] && \
|
||||
uci set network.$1.ip6assign='60'
|
||||
;;
|
||||
|
||||
dhcp)
|
||||
# fixup IPv6 slave interface if parent is a bridge
|
||||
[ "$type" = "bridge" ] && device="br-$1"
|
||||
|
||||
uci -q batch <<-EOF
|
||||
set network.$1.proto='dhcp'
|
||||
set network.$1.metric='$metric'
|
||||
EOF
|
||||
[ -e /proc/sys/net/ipv6 ] && {
|
||||
metric=$((metric+1))
|
||||
uci -q batch <<-EOF
|
||||
delete network.${1}6
|
||||
set network.${1}6='interface'
|
||||
set network.${1}6.device='$device'
|
||||
set network.${1}6.proto='dhcpv6'
|
||||
set network.${1}6.metric='$metric'
|
||||
EOF
|
||||
[ "$ip6assign" != 1 ] && uci set network.${1}6.delegate='0'
|
||||
}
|
||||
;;
|
||||
|
||||
pppoe)
|
||||
uci -q batch <<-EOF
|
||||
set network.$1.proto='pppoe'
|
||||
set network.$1.username='username'
|
||||
set network.$1.password='password'
|
||||
EOF
|
||||
[ -e /proc/sys/net/ipv6 ] && {
|
||||
uci -q batch <<-EOF
|
||||
set network.$1.ipv6='1'
|
||||
delete network.${1}6
|
||||
set network.${1}6='interface'
|
||||
set network.${1}6.device='@${1}'
|
||||
set network.${1}6.proto='dhcpv6'
|
||||
EOF
|
||||
}
|
||||
;;
|
||||
esac
|
||||
|
||||
[ -n "$no_metric" ] && {
|
||||
uci -q delete network.${1}.metric
|
||||
[ -e /proc/sys/net/ipv6 ] && uci -q delete network.${1}6.metric
|
||||
}
|
||||
}
|
||||
|
||||
add_modem_section() {
|
||||
local id="$1"
|
||||
local num="$2"
|
||||
local simcount="$3"
|
||||
local builtin="$4"
|
||||
local custom_proto custom_ifname
|
||||
|
||||
json_select ..
|
||||
json_get_vars custom_proto custom_ifname
|
||||
json_select modems
|
||||
for count in $(seq "$simcount"); do
|
||||
interface="mob${num}s${count}a1"
|
||||
local proto="wwan"
|
||||
|
||||
# if needed, use custom proto for rmnet/other devices
|
||||
[ -n "${custom_proto}" ] && proto="${custom_proto}"
|
||||
|
||||
metric=$((metric+1))
|
||||
|
||||
uci_remove network "${interface}"
|
||||
uci_add network interface "${interface}"
|
||||
uci_set network "${interface}" proto "$proto"
|
||||
uci_set network "${interface}" modem "$id"
|
||||
uci_set network "${interface}" metric "$metric"
|
||||
uci_set network "${interface}" sim "${count}"
|
||||
uci_set network "${interface}" dhcpv6 "0"
|
||||
uci_set network "${interface}" pdptype "ip"
|
||||
uci_set network "${interface}" method "nat"
|
||||
uci_set network "${interface}" auth "none"
|
||||
uci_set network "${interface}" auto_apn "1"
|
||||
|
||||
# if needed, use custom ifname for rmnet/other devices
|
||||
[ -n "${custom_ifname}" ] && \
|
||||
uci_set network "${interface}" device "${custom_ifname}"
|
||||
|
||||
uci_commit network
|
||||
|
||||
update_firewall_zone "wan" "$interface"
|
||||
create_multiwan_iface "$interface" "$metric"
|
||||
add_simcard_config "$id" "${count}" "${count}" "$builtin"
|
||||
add_sim_switch_config "$id" "${count}"
|
||||
add_quota_limit_config "$interface"
|
||||
done
|
||||
add_sms_storage_config "$id"
|
||||
}
|
||||
|
||||
generate_dynamic_lte() {
|
||||
[ -f /lib/functions/modem.sh ] || return
|
||||
. /lib/functions/modem.sh
|
||||
|
||||
local interface num id simcount builtin
|
||||
|
||||
#creating simcard sections from board.json file
|
||||
if json_is_a modems array; then
|
||||
json_get_keys modems modems
|
||||
json_select modems
|
||||
|
||||
num=1
|
||||
|
||||
for modem in $modems; do
|
||||
json_select "$modem"
|
||||
json_get_vars id simcount builtin
|
||||
json_select ..
|
||||
add_modem_section "$id" "$num" "$simcount" "$builtin"
|
||||
num=$(( num + 1 ))
|
||||
done
|
||||
|
||||
json_select ..
|
||||
else
|
||||
## because of RUTX8 have no default modem
|
||||
# after this script runs out simcard config
|
||||
# must not be empty due to external modems could appear to config
|
||||
echo " " >> /etc/config/simcard
|
||||
fi
|
||||
|
||||
#creating simcard sections from conneted via USB
|
||||
for a in `ls /sys/bus/usb/devices`; do
|
||||
local vendor product
|
||||
[ -f "/sys/bus/usb/devices/$a/idVendor" ] && [ -f "/sys/bus/usb/devices/$a/idProduct" ] || continue
|
||||
vendor=$(cat "/sys/bus/usb/devices/$a/idVendor")
|
||||
product=$(cat "/sys/bus/usb/devices/$a/idProduct")
|
||||
[ -f "/lib/network/wwan/${vendor}:${product}" ] && {
|
||||
add_simcard_config "$a" "1" "0" ""
|
||||
add_sms_storage_config "$a"
|
||||
}
|
||||
done
|
||||
}
|
||||
|
||||
generate_switch_vlans_ports() {
|
||||
local switch="$1"
|
||||
local port ports role roles num attr val
|
||||
|
||||
#
|
||||
# autogenerate vlans
|
||||
#
|
||||
|
||||
if json_is_a roles array; then
|
||||
json_get_keys roles roles
|
||||
json_select roles
|
||||
|
||||
for role in $roles; do
|
||||
json_select "$role"
|
||||
json_get_vars ports
|
||||
json_select ..
|
||||
|
||||
uci -q batch <<-EOF
|
||||
add network switch_vlan
|
||||
set network.@switch_vlan[-1].device='$switch'
|
||||
set network.@switch_vlan[-1].vlan='$role'
|
||||
set network.@switch_vlan[-1].vid='$role'
|
||||
set network.@switch_vlan[-1].ports='$ports'
|
||||
EOF
|
||||
done
|
||||
|
||||
json_select ..
|
||||
fi
|
||||
|
||||
|
||||
#
|
||||
# write port specific settings
|
||||
#
|
||||
|
||||
if json_is_a ports array; then
|
||||
json_get_keys ports ports
|
||||
json_select ports
|
||||
|
||||
for port in $ports; do
|
||||
json_select "$port"
|
||||
json_get_vars num
|
||||
|
||||
if json_is_a attr object; then
|
||||
json_get_keys attr attr
|
||||
json_select attr
|
||||
uci -q batch <<-EOF
|
||||
add network switch_port
|
||||
set network.@switch_port[-1].device='$switch'
|
||||
set network.@switch_port[-1].port=$num
|
||||
EOF
|
||||
|
||||
for attr in $attr; do
|
||||
json_get_var val "$attr"
|
||||
uci -q set network.@switch_port[-1].$attr="$val"
|
||||
done
|
||||
json_select ..
|
||||
fi
|
||||
json_select ..
|
||||
done
|
||||
|
||||
json_select ..
|
||||
fi
|
||||
}
|
||||
|
||||
generate_switch() {
|
||||
local key="$1"
|
||||
local vlans
|
||||
|
||||
json_select switch
|
||||
json_select "$key"
|
||||
json_get_vars enable reset blinkrate cpu_port \
|
||||
ar8xxx_mib_type ar8xxx_mib_poll_interval
|
||||
|
||||
[ "$disable_vlan" = 1 ] && enable=0
|
||||
uci -q batch <<-EOF
|
||||
add network switch
|
||||
set network.@switch[-1].name='$key'
|
||||
set network.@switch[-1].reset='$reset'
|
||||
set network.@switch[-1].enable_vlan='$enable'
|
||||
set network.@switch[-1].blinkrate='$blinkrate'
|
||||
set network.@switch[-1].ar8xxx_mib_type='$ar8xxx_mib_type'
|
||||
set network.@switch[-1].ar8xxx_mib_poll_interval='$ar8xxx_mib_poll_interval'
|
||||
EOF
|
||||
|
||||
generate_switch_vlans_ports "$1"
|
||||
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
|
||||
generate_static_system() {
|
||||
param=$(/sbin/mnf_info "--name")
|
||||
hostname=${param:0:6}
|
||||
uci -q batch <<-EOF
|
||||
delete system.@system[0]
|
||||
set system.system='system'
|
||||
set system.@system[-1].hostname='$hostname'
|
||||
set system.@system[-1].timezone='UTC'
|
||||
set system.@system[-1].ttylogin='0'
|
||||
set system.@system[-1].log_buffer_size='128'
|
||||
set system.@system[-1].log_size='200'
|
||||
set system.@system[-1].urandom_seed='0'
|
||||
|
||||
delete system.ntp
|
||||
set system.ntp='timeserver'
|
||||
set system.ntp.zoneName='UTC'
|
||||
set system.ntp.enabled='0'
|
||||
set system.ntp.enable_server='0'
|
||||
add_list system.ntp.server='0.pool.ntp.org'
|
||||
add_list system.ntp.server='1.pool.ntp.org'
|
||||
add_list system.ntp.server='2.pool.ntp.org'
|
||||
add_list system.ntp.server='3.pool.ntp.org'
|
||||
|
||||
delete system.debug
|
||||
set system.debug='debug'
|
||||
set system.debug.sms_utils_debug_level='4'
|
||||
EOF
|
||||
|
||||
if json_is_a system object; then
|
||||
json_select system
|
||||
local hostname
|
||||
if json_get_var hostname hostname; then
|
||||
uci -q set "system.@system[-1].hostname=$hostname"
|
||||
fi
|
||||
|
||||
if json_is_a ntpserver array; then
|
||||
local keys key
|
||||
json_get_keys keys ntpserver
|
||||
json_select ntpserver
|
||||
uci -q delete "system.ntp.server"
|
||||
|
||||
for key in $keys; do
|
||||
local server
|
||||
if json_get_var server "$key"; then
|
||||
uci -q add_list "system.ntp.server=$server"
|
||||
fi
|
||||
done
|
||||
json_select ..
|
||||
fi
|
||||
json_select ..
|
||||
fi
|
||||
}
|
||||
|
||||
generate_rssimon() {
|
||||
local key="$1"
|
||||
local cfg="rssid_$key"
|
||||
local refresh threshold
|
||||
|
||||
json_select rssimon
|
||||
json_select "$key"
|
||||
json_get_vars refresh threshold
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
uci -q batch <<-EOF
|
||||
delete system.$cfg
|
||||
set system.$cfg='rssid'
|
||||
set system.$cfg.dev='$key'
|
||||
set system.$cfg.refresh='$refresh'
|
||||
set system.$cfg.threshold='$threshold'
|
||||
EOF
|
||||
}
|
||||
|
||||
generate_led() {
|
||||
local key="$1"
|
||||
local cfg="led_$key"
|
||||
|
||||
json_select led
|
||||
json_select "$key"
|
||||
json_get_vars name sysfs type trigger default
|
||||
|
||||
uci -q batch <<-EOF
|
||||
delete system.$cfg
|
||||
set system.$cfg='led'
|
||||
set system.$cfg.name='$name'
|
||||
set system.$cfg.sysfs='$sysfs'
|
||||
set system.$cfg.trigger='$trigger'
|
||||
set system.$cfg.default='$default'
|
||||
EOF
|
||||
|
||||
case "$type" in
|
||||
gpio)
|
||||
local gpio inverted
|
||||
json_get_vars gpio inverted
|
||||
uci -q batch <<-EOF
|
||||
set system.$cfg.trigger='gpio'
|
||||
set system.$cfg.gpio='$gpio'
|
||||
set system.$cfg.inverted='$inverted'
|
||||
EOF
|
||||
;;
|
||||
|
||||
netdev)
|
||||
local device mode
|
||||
json_get_vars device mode
|
||||
uci -q batch <<-EOF
|
||||
set system.$cfg.trigger='netdev'
|
||||
set system.$cfg.mode='$mode'
|
||||
set system.$cfg.dev='$device'
|
||||
EOF
|
||||
;;
|
||||
|
||||
usb)
|
||||
local device
|
||||
json_get_vars device
|
||||
uci -q batch <<-EOF
|
||||
set system.$cfg.trigger='usbdev'
|
||||
set system.$cfg.interval='50'
|
||||
set system.$cfg.dev='$device'
|
||||
EOF
|
||||
;;
|
||||
|
||||
usbport)
|
||||
local ports port
|
||||
json_get_values ports ports
|
||||
uci set system.$cfg.trigger='usbport'
|
||||
for port in $ports; do
|
||||
uci add_list system.$cfg.port=$port
|
||||
done
|
||||
;;
|
||||
|
||||
rssi)
|
||||
local iface minq maxq offset factor
|
||||
json_get_vars iface minq maxq offset factor
|
||||
uci -q batch <<-EOF
|
||||
set system.$cfg.trigger='rssi'
|
||||
set system.$cfg.iface='rssid_$iface'
|
||||
set system.$cfg.minq='$minq'
|
||||
set system.$cfg.maxq='$maxq'
|
||||
set system.$cfg.offset='$offset'
|
||||
set system.$cfg.factor='$factor'
|
||||
EOF
|
||||
;;
|
||||
|
||||
switch)
|
||||
local port_mask speed_mask mode
|
||||
json_get_vars port_mask speed_mask mode
|
||||
uci -q batch <<-EOF
|
||||
set system.$cfg.port_mask='$port_mask'
|
||||
set system.$cfg.speed_mask='$speed_mask'
|
||||
set system.$cfg.mode='$mode'
|
||||
EOF
|
||||
;;
|
||||
|
||||
portstate)
|
||||
local port_state
|
||||
json_get_vars port_state
|
||||
uci -q batch <<-EOF
|
||||
set system.$cfg.port_state='$port_state'
|
||||
EOF
|
||||
;;
|
||||
|
||||
timer|oneshot)
|
||||
local delayon delayoff
|
||||
json_get_vars delayon delayoff
|
||||
uci -q batch <<-EOF
|
||||
set system.$cfg.trigger='$type'
|
||||
set system.$cfg.delayon='$delayon'
|
||||
set system.$cfg.delayoff='$delayoff'
|
||||
EOF
|
||||
;;
|
||||
esac
|
||||
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
generate_gpioswitch() {
|
||||
local cfg="$1"
|
||||
|
||||
json_select gpioswitch
|
||||
json_select "$cfg"
|
||||
local name pin default
|
||||
json_get_vars name pin default
|
||||
uci -q batch <<-EOF
|
||||
delete system.$cfg
|
||||
set system.$cfg='gpio_switch'
|
||||
set system.$cfg.name='$name'
|
||||
set system.$cfg.gpio_pin='$pin'
|
||||
set system.$cfg.value='$default'
|
||||
EOF
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
generate_hwinfo() {
|
||||
local parameter="$1"
|
||||
local temp
|
||||
|
||||
json_select hwinfo
|
||||
json_get_var temp "$parameter"
|
||||
json_select ..
|
||||
|
||||
uci -q batch <<-EOF
|
||||
set hwinfo.hwinfo='hwinfo'
|
||||
set hwinfo.hwinfo.$parameter='$temp'
|
||||
EOF
|
||||
}
|
||||
|
||||
set_poe_ports() {
|
||||
json_select "$1"
|
||||
json_get_vars name class budget
|
||||
uci -q batch <<-EOF
|
||||
set poe.port$1='port$1'
|
||||
set poe.port$1.name='$name'
|
||||
set poe.port$1.poe_enable='1'
|
||||
set poe.port$1.class='$class'
|
||||
set poe.port$1.budget='$budget'
|
||||
EOF
|
||||
json_select ..
|
||||
}
|
||||
|
||||
set_poe_chips(){
|
||||
local keys key
|
||||
uci -q set poe.chip$1=chip$1
|
||||
json_get_keys keys "$1"
|
||||
json_select "$1"
|
||||
for key in $keys; do
|
||||
json_get_var var "$key"
|
||||
uci -q set poe.chip$1.$key="$var"
|
||||
done
|
||||
json_select ..
|
||||
}
|
||||
|
||||
generate_poe_config(){
|
||||
if json_is_a poe object; then
|
||||
json_select poe
|
||||
json_get_vars chip_count budget poe_ports
|
||||
uci -q batch <<-EOF
|
||||
set poe.poe='poe'
|
||||
set poe.poe.chip_count='$chip_count'
|
||||
set poe.poe.budget='$budget'
|
||||
set poe.poe.poe_ports='$poe_ports'
|
||||
EOF
|
||||
if json_is_a ports array; then
|
||||
#json_for_each_item "set_poe_ports" ports
|
||||
json_select ports
|
||||
idx=1
|
||||
while json_is_a ${idx} object
|
||||
do
|
||||
"set_poe_ports" $idx
|
||||
idx=$(( idx + 1 ))
|
||||
done
|
||||
json_select ..
|
||||
fi
|
||||
if json_is_a poe_chips array; then
|
||||
json_select poe_chips
|
||||
idx=1
|
||||
while json_is_a ${idx} object
|
||||
do
|
||||
"set_poe_chips" $idx
|
||||
idx=$(( idx + 1 ))
|
||||
done
|
||||
json_select ..
|
||||
fi
|
||||
json_select ..
|
||||
fi
|
||||
}
|
||||
|
||||
generate_bluetooth() {
|
||||
uci -q batch <<-EOF
|
||||
set blesem.general='section'
|
||||
set blesem.general.enabled='0'
|
||||
set blesem.settings='app'
|
||||
set blesem.settings.refresh_time='30000'
|
||||
EOF
|
||||
}
|
||||
|
||||
add_firewall_zone() {
|
||||
local device
|
||||
|
||||
json_select network
|
||||
json_select "$1"
|
||||
json_get_vars device
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
fw3 -q network "$1" || fw3 -q device "$device" && return
|
||||
|
||||
uci -q batch <<-EOF
|
||||
add firewall zone
|
||||
set firewall.@zone[-1].name='$1'
|
||||
set firewall.@zone[-1].network='$1'
|
||||
set firewall.@zone[-1].input='REJECT'
|
||||
set firewall.@zone[-1].output='ACCEPT'
|
||||
set firewall.@zone[-1].forward='REJECT'
|
||||
|
||||
add firewall forwarding
|
||||
set firewall.@forwarding[-1].src='$1'
|
||||
set firewall.@forwarding[-1].dest='wan'
|
||||
|
||||
add firewall rule
|
||||
set firewall.@rule[-1].name='Allow-DNS-$1'
|
||||
set firewall.@rule[-1].src='$1'
|
||||
set firewall.@rule[-1].dest_port='53'
|
||||
set firewall.@rule[-1].proto='tcp udp'
|
||||
set firewall.@rule[-1].target='ACCEPT'
|
||||
|
||||
add firewall rule
|
||||
set firewall.@rule[-1].name='Allow-DHCP-$1'
|
||||
set firewall.@rule[-1].src='$1'
|
||||
set firewall.@rule[-1].dest_port='67'
|
||||
set firewall.@rule[-1].proto='udp'
|
||||
set firewall.@rule[-1].family='ipv4'
|
||||
set firewall.@rule[-1].target='ACCEPT'
|
||||
EOF
|
||||
}
|
||||
|
||||
add_dhcp() {
|
||||
|
||||
json_select network
|
||||
json_select "$1"
|
||||
json_get_vars _dhcp
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
[ "$_dhcp" = "true" ] || return
|
||||
uci -q batch <<-EOF
|
||||
set dhcp.$1='dhcp'
|
||||
set dhcp.$1.interface='$1'
|
||||
set dhcp.$1.start='100'
|
||||
set dhcp.$1.limit='150'
|
||||
set dhcp.$1.leasetime='1h'
|
||||
EOF
|
||||
}
|
||||
|
||||
json_init
|
||||
json_load "$(cat ${CFG})"
|
||||
|
||||
umask 077
|
||||
|
||||
if [ ! -s /etc/config/network ]; then
|
||||
touch /etc/config/network
|
||||
generate_static_network
|
||||
apply_network_options
|
||||
|
||||
json_get_keys keys network
|
||||
for key in $keys; do
|
||||
generate_network $key
|
||||
add_dhcp "$key"
|
||||
done
|
||||
|
||||
json_get_keys keys switch
|
||||
for key in $keys; do generate_switch $key; done
|
||||
|
||||
generate_dynamic_lte
|
||||
fi
|
||||
|
||||
if [ ! -s /etc/config/system ]; then
|
||||
touch /etc/config/system
|
||||
generate_static_system
|
||||
|
||||
json_get_keys keys rssimon
|
||||
for key in $keys; do generate_rssimon $key; done
|
||||
|
||||
json_get_keys keys gpioswitch
|
||||
for key in $keys; do generate_gpioswitch $key; done
|
||||
|
||||
json_get_keys keys led
|
||||
for key in $keys; do generate_led $key; done
|
||||
fi
|
||||
|
||||
if [ ! -s /etc/config/hwinfo ]; then
|
||||
touch /etc/config/hwinfo
|
||||
json_get_keys keys hwinfo
|
||||
for key in $keys; do generate_hwinfo $key; done
|
||||
fi
|
||||
|
||||
if [ ! -s /etc/config/poe ]; then
|
||||
touch /etc/config/poe
|
||||
generate_poe_config
|
||||
fi
|
||||
|
||||
if [ ! -s /etc/config/blesem ]; then
|
||||
bluetooth=""
|
||||
json_select hwinfo
|
||||
json_get_vars bluetooth
|
||||
[ "$bluetooth" -eq 1 ] && {
|
||||
touch /etc/config/blesem
|
||||
touch /etc/config/ble_devices
|
||||
generate_bluetooth
|
||||
}
|
||||
fi
|
||||
|
||||
uci commit
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
awk -f - $* <<EOF
|
||||
function bitcount(c) {
|
||||
c=and(rshift(c, 1),0x55555555)+and(c,0x55555555)
|
||||
c=and(rshift(c, 2),0x33333333)+and(c,0x33333333)
|
||||
c=and(rshift(c, 4),0x0f0f0f0f)+and(c,0x0f0f0f0f)
|
||||
c=and(rshift(c, 8),0x00ff00ff)+and(c,0x00ff00ff)
|
||||
c=and(rshift(c,16),0x0000ffff)+and(c,0x0000ffff)
|
||||
return c
|
||||
}
|
||||
|
||||
function ip2int(ip) {
|
||||
for (ret=0,n=split(ip,a,"\."),x=1;x<=n;x++) ret=or(lshift(ret,8),a[x])
|
||||
return ret
|
||||
}
|
||||
|
||||
function int2ip(ip,ret,x) {
|
||||
ret=and(ip,255)
|
||||
ip=rshift(ip,8)
|
||||
for(;x<3;ret=and(ip,255)"."ret,ip=rshift(ip,8),x++);
|
||||
return ret
|
||||
}
|
||||
|
||||
function compl32(v) {
|
||||
ret=xor(v, 0xffffffff)
|
||||
return ret
|
||||
}
|
||||
|
||||
BEGIN {
|
||||
slpos=index(ARGV[1],"/")
|
||||
if (slpos == 0) {
|
||||
ipaddr=ip2int(ARGV[1])
|
||||
dotpos=index(ARGV[2],".")
|
||||
if (dotpos == 0)
|
||||
netmask=compl32(2**(32-int(ARGV[2]))-1)
|
||||
else
|
||||
netmask=ip2int(ARGV[2])
|
||||
} else {
|
||||
ipaddr=ip2int(substr(ARGV[1],0,slpos-1))
|
||||
netmask=compl32(2**(32-int(substr(ARGV[1],slpos+1)))-1)
|
||||
ARGV[4]=ARGV[3]
|
||||
ARGV[3]=ARGV[2]
|
||||
}
|
||||
|
||||
network=and(ipaddr,netmask)
|
||||
broadcast=or(network,compl32(netmask))
|
||||
|
||||
start=or(network,and(ip2int(ARGV[3]),compl32(netmask)))
|
||||
limit=network+1
|
||||
if (start<limit) start=limit
|
||||
|
||||
end=start+ARGV[4]
|
||||
limit=or(network,compl32(netmask))-1
|
||||
if (end>limit) end=limit
|
||||
|
||||
print "IP="int2ip(ipaddr)
|
||||
print "NETMASK="int2ip(netmask)
|
||||
print "BROADCAST="int2ip(broadcast)
|
||||
print "NETWORK="int2ip(network)
|
||||
print "PREFIX="32-bitcount(compl32(netmask))
|
||||
|
||||
# range calculations:
|
||||
# ipcalc <ip> <netmask> <start> <num>
|
||||
|
||||
if (ARGC > 3) {
|
||||
print "START="int2ip(start)
|
||||
print "END="int2ip(end)
|
||||
}
|
||||
}
|
||||
EOF
|
||||
|
|
@ -1,235 +0,0 @@
|
|||
#
|
||||
# Copyright (c) 2015 The Linux Foundation. All rights reserved.
|
||||
# Copyright (c) 2011-2015 OpenWrt.org
|
||||
#
|
||||
|
||||
. /lib/functions/uci-defaults.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
ipq40xx_setup_interfaces()
|
||||
{
|
||||
local board="$1"
|
||||
|
||||
case "$board" in
|
||||
8dev,habanero-dvk|\
|
||||
avm,fritzbox-4040|\
|
||||
asus,rt-ac42u|\
|
||||
asus,rt-ac58u|\
|
||||
linksys,ea6350v3|\
|
||||
linksys,ea8300|\
|
||||
linksys,mr8300|\
|
||||
mikrotik,hap-ac2|\
|
||||
mikrotik,hap-ac3|\
|
||||
mikrotik,hap-ac3-lte6-kit|\
|
||||
p2w,r619ac-64m|\
|
||||
p2w,r619ac-128m|\
|
||||
pakedge,wr-1|\
|
||||
teltonika,rutx|\
|
||||
teltonika,rutx12|\
|
||||
teltonika,rutx50|\
|
||||
zyxel,nbg6617)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
|
||||
;;
|
||||
8dev,jalapeno|\
|
||||
alfa-network,ap120c-ac|\
|
||||
asus,map-ac2200|\
|
||||
cilab,meshpoint-one|\
|
||||
edgecore,ecw5211|\
|
||||
glinet,gl-ap1300|\
|
||||
glinet,gl-b2200|\
|
||||
google,wifi|\
|
||||
linksys,whw03v2|\
|
||||
luma,wrtq-329acn|\
|
||||
mikrotik,cap-ac|\
|
||||
netgear,wac510|\
|
||||
sony,ncp-hg100-cellular|\
|
||||
wallys,dr40x9|\
|
||||
zte,mf18a|\
|
||||
zte,mf289f)
|
||||
ucidef_set_interfaces_lan_wan "lan" "wan"
|
||||
;;
|
||||
aruba,ap-303|\
|
||||
aruba,ap-365|\
|
||||
avm,fritzrepeater-1200|\
|
||||
dlink,dap-2610|\
|
||||
extreme-networks,ws-ap3915i|\
|
||||
meraki,mr33|\
|
||||
meraki,mr74|\
|
||||
mikrotik,lhgg-60ad|\
|
||||
mikrotik,sxtsq-5-ac|\
|
||||
netgear,ex6100v2|\
|
||||
netgear,ex6150v2)
|
||||
ucidef_set_interface_lan "lan"
|
||||
;;
|
||||
avm,fritzbox-7530)
|
||||
ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
|
||||
;;
|
||||
avm,fritzrepeater-3000|\
|
||||
cellc,rtl30vw)
|
||||
ucidef_set_interface_lan "lan1 lan2"
|
||||
;;
|
||||
compex,wpj428)
|
||||
ucidef_set_interface_lan "lan1 lan2"
|
||||
;;
|
||||
linksys,whw01)
|
||||
ucidef_set_interface_lan "eth1 eth2"
|
||||
;;
|
||||
glinet,gl-a1300|\
|
||||
glinet,gl-b1300|\
|
||||
mobipromo,cm520-79f)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
|
||||
;;
|
||||
mikrotik,wap-ac|\
|
||||
mikrotik,wap-ac-lte|\
|
||||
mikrotik,wap-r-ac)
|
||||
ucidef_set_interface_lan "sw-eth1 sw-eth2"
|
||||
;;
|
||||
aruba,ap-303h|\
|
||||
buffalo,wtr-m2133hp|\
|
||||
ezviz,cs-w3-wd1200g-eup|\
|
||||
netgear,rbr50|\
|
||||
netgear,rbs50|\
|
||||
netgear,srr60|\
|
||||
netgear,srs60|\
|
||||
teltonika,rutx10)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
|
||||
;;
|
||||
openmesh,a42|\
|
||||
openmesh,a62)
|
||||
ucidef_set_interfaces_lan_wan "ethernet2" "ethernet1"
|
||||
;;
|
||||
plasmacloud,pa1200|\
|
||||
plasmacloud,pa2200)
|
||||
ucidef_set_interfaces_lan_wan "ethernet1" "ethernet2"
|
||||
;;
|
||||
qxwlan,e2600ac-c1)
|
||||
ucidef_set_interfaces_lan_wan "sw-eth1" "sw-eth2"
|
||||
;;
|
||||
qxwlan,e2600ac-c2)
|
||||
ucidef_set_interfaces_lan_wan "sw-eth1 sw-eth2" "sw-eth3"
|
||||
;;
|
||||
zte,mf286d)
|
||||
ucidef_set_interfaces_lan_wan "lan2 lan3 lan4" "wan"
|
||||
;;
|
||||
*)
|
||||
echo "Unsupported hardware. Network interfaces not initialized"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
ipq40xx_setup_dsl()
|
||||
{
|
||||
local board="$1"
|
||||
local annex="j"
|
||||
local tone="b"
|
||||
local xfer_mode=""
|
||||
|
||||
case "$board" in
|
||||
avm,fritzbox-7530)
|
||||
;;
|
||||
*)
|
||||
return 0
|
||||
;;
|
||||
esac
|
||||
|
||||
ucidef_add_atm_bridge "1" "32" "llc" "bridged" "dsl"
|
||||
ucidef_add_vdsl_modem "$annex" "$tone" "$xfer_mode"
|
||||
ucidef_set_interface_wan "dsl0" "pppoe"
|
||||
}
|
||||
|
||||
ipq40xx_setup_macs()
|
||||
{
|
||||
local board="$1"
|
||||
local lan_mac=""
|
||||
local wan_mac=""
|
||||
local label_mac=""
|
||||
|
||||
case "$board" in
|
||||
8dev,habanero-dvk)
|
||||
label_mac=$(mtd_get_mac_binary "ART" 0x1006)
|
||||
;;
|
||||
asus,rt-ac42u)
|
||||
label_mac=$(mtd_get_mac_binary_ubi Factory 0x1006)
|
||||
;;
|
||||
asus,rt-ac58u)
|
||||
wan_mac=$(mtd_get_mac_binary_ubi Factory 0x1006)
|
||||
lan_mac=$(mtd_get_mac_binary_ubi Factory 0x5006)
|
||||
label_mac=$wan_mac
|
||||
;;
|
||||
avm,fritzbox-7530)
|
||||
local tffsdev=$(find_mtd_chardev "nand-tffs")
|
||||
wan_mac=$(/usr/bin/fritz_tffs_nand -b -d $tffsdev -n macdsl)
|
||||
;;
|
||||
cilab,meshpoint-one)
|
||||
label_mac=$(mtd_get_mac_binary "ART" 0x1006)
|
||||
;;
|
||||
devolo,magic-2-wifi-next)
|
||||
lan_mac=$(mtd_get_mac_ascii APPSBLENV MacAddress0)
|
||||
label_mac=$lan_mac
|
||||
;;
|
||||
dlink,dap-2610)
|
||||
lan_mac=$(mtd_get_mac_ascii bdcfg lanmac)
|
||||
label_mac=$lan_mac
|
||||
;;
|
||||
engenius,eap2200|\
|
||||
engenius,emd1)
|
||||
lan_mac=$(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
|
||||
label_mac=$lan_mac
|
||||
;;
|
||||
engenius,emr3500)
|
||||
wan_mac=$(mtd_get_mac_ascii 0:APPSBLENV wanaddr)
|
||||
lan_mac=$(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
|
||||
label_mac=$wan_mac
|
||||
;;
|
||||
engenius,ens620ext)
|
||||
wan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
|
||||
lan_mac=$(macaddr_add "$wan_mac" 1)
|
||||
;;
|
||||
ezviz,cs-w3-wd1200g-eup)
|
||||
label_mac=$(mtd_get_mac_binary "ART" 0x6)
|
||||
;;
|
||||
google,wifi)
|
||||
wan_mac=$(get_mac_label)
|
||||
lan_mac=$(macaddr_add "$wan_mac" 1)
|
||||
;;
|
||||
linksys,ea6350v3|\
|
||||
linksys,ea8300 |\
|
||||
linksys,mr8300)
|
||||
wan_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
|
||||
lan_mac=$(macaddr_add "$wan_mac" 1)
|
||||
;;
|
||||
mikrotik,cap-ac |\
|
||||
mikrotik,hap-ac2|\
|
||||
mikrotik,hap-ac3|\
|
||||
mikrotik,hap-ac3-lte6-kit)
|
||||
wan_mac=$(cat /sys/firmware/mikrotik/hard_config/mac_base)
|
||||
lan_mac=$(macaddr_add $wan_mac 1)
|
||||
label_mac="$wan_mac"
|
||||
;;
|
||||
mikrotik,lhgg-60ad|\
|
||||
mikrotik,sxtsq-5-ac)
|
||||
lan_mac=$(cat /sys/firmware/mikrotik/hard_config/mac_base)
|
||||
label_mac="$lan_mac"
|
||||
;;
|
||||
netgear,rbr50|\
|
||||
netgear,rbs50|\
|
||||
netgear,srr60|\
|
||||
netgear,srs60|\
|
||||
pakedge,wr-1)
|
||||
wan_mac=$(macaddr_add $(get_mac_label) 1)
|
||||
;;
|
||||
esac
|
||||
|
||||
[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
|
||||
[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
|
||||
[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
|
||||
}
|
||||
|
||||
board_config_update
|
||||
board=$(board_name)
|
||||
ipq40xx_setup_interfaces $board
|
||||
ipq40xx_setup_dsl $board
|
||||
ipq40xx_setup_macs $board
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
|
|
@ -1,515 +0,0 @@
|
|||
#!/bin/sh
|
||||
#
|
||||
# Copyright (c) 2015 The Linux Foundation. All rights reserved.
|
||||
# Copyright (c) 2011-2015 OpenWrt.org
|
||||
#
|
||||
|
||||
. /lib/functions/uci-defaults.sh
|
||||
. /lib/functions/teltonika-defaults.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
[ -f /lib/functions/target-defaults.sh ] && \
|
||||
. /lib/functions/target-defaults.sh
|
||||
|
||||
setup_json() {
|
||||
local model="$1"
|
||||
|
||||
case "$model" in
|
||||
RUTX08*)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
|
||||
ucidef_set_usb_jack "/usb1/1-1/"
|
||||
ucidef_set_hwinfo usb ethernet ios
|
||||
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
|
||||
;;
|
||||
RUTX09*)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
|
||||
ucidef_add_static_modem_info "$model" "3-1" "2" "primary" "gps_out"
|
||||
ucidef_set_usb_jack "/usb1/1-1/"
|
||||
ucidef_set_hwinfo dual_sim usb gps mobile ethernet ios
|
||||
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
|
||||
;;
|
||||
RUTX10*)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
|
||||
ucidef_set_usb_jack "/usb1/1-1/"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 16
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 16
|
||||
ucidef_set_hwinfo bluetooth usb wifi dual_band_ssid ethernet ios
|
||||
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
|
||||
;;
|
||||
RUTX11*)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 16
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 16
|
||||
ucidef_add_static_modem_info "$model" "3-1" "2" "primary" "gps_out"
|
||||
ucidef_set_usb_jack "/usb1/1-1/"
|
||||
ucidef_set_hwinfo dual_sim usb gps mobile wifi dual_band_ssid bluetooth ethernet ios
|
||||
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
|
||||
;;
|
||||
RUTXR1*)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 16
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 16
|
||||
ucidef_add_static_modem_info "$model" "3-1" "2" "primary"
|
||||
ucidef_set_hwinfo dual_sim usb mobile wifi dual_band_ssid ethernet sfp_port sfp_switch console rs232
|
||||
ucidef_set_usb_jack "/usb1/1-1/1-1.2/"
|
||||
ucidef_add_serial_capabilities "rs232" \
|
||||
"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
|
||||
"7 8" \
|
||||
"rts/cts xon/xoff none" \
|
||||
"1 2" \
|
||||
"even odd mark space none" \
|
||||
"/usb1/1-1/1-1.3/"
|
||||
ucidef_set_release_version "2.3.1"
|
||||
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
|
||||
;;
|
||||
RUTX12*)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 16
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 16
|
||||
# builtin and primary should be first modem
|
||||
ucidef_add_static_modem_info "$model" "3-1" "1" "primary" "gps_out"
|
||||
ucidef_add_static_modem_info "$model" "1-1.2" "1"
|
||||
ucidef_set_usb_jack "/usb1/1-1/1-1.3/"
|
||||
ucidef_set_hwinfo usb gps mobile wifi dual_band_ssid bluetooth ethernet ios dual_modem
|
||||
ucidef_set_release_version "2.3.1"
|
||||
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
|
||||
;;
|
||||
RUTX14*)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 16
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 16
|
||||
ucidef_add_static_modem_info "$model" "1-1" "2" "primary" "gps_out"
|
||||
ucidef_set_usb_jack "/usb3/3-1/"
|
||||
ucidef_set_hwinfo usb gps dual_sim mobile wifi dual_band_ssid bluetooth ethernet ios at_sim
|
||||
ucidef_set_release_version "2.6.1"
|
||||
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
|
||||
;;
|
||||
RUTX18*)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 16
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 16
|
||||
ucidef_add_static_modem_info "$model" "2-1" "2" "primary" "gps_out"
|
||||
ucidef_set_usb_jack "/usb1/1-1/"
|
||||
ucidef_set_hwinfo usb gps dual_sim mobile wifi dual_band_ssid bluetooth ethernet ios
|
||||
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
|
||||
;;
|
||||
RUTX50*)
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 16
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 16
|
||||
ucidef_add_static_modem_info "$model" "2-1" "2" "primary" "gps_out"
|
||||
ucidef_set_usb_jack "/usb3/3-1/"
|
||||
ucidef_set_hwinfo dual_sim usb gps mobile wifi dual_band_ssid ethernet ios at_sim
|
||||
ucidef_set_release_version "7.2.8"
|
||||
ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
|
||||
;;
|
||||
TRB2*)
|
||||
ucidef_set_led_switch "lan" "LAN" "eth_led" "switch0" "0x04"
|
||||
ucidef_set_interface_lan "eth0"
|
||||
ucidef_add_static_modem_info "$model" "1-1.4" "2" "primary" "gps_out"
|
||||
ucidef_add_serial_capabilities "rs232" \
|
||||
"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
|
||||
"7 8" \
|
||||
"rts/cts xon/xoff none" \
|
||||
"1 2" \
|
||||
"even odd mark space none" \
|
||||
"/usb1/1-1/1-1.3/"
|
||||
ucidef_add_serial_capabilities "rs485" \
|
||||
"300 600 1200 2400 4800 9600 19200 38400 57600 115200 \
|
||||
230400 460800 921600 1000000 3000000" \
|
||||
"7 8" \
|
||||
"none" \
|
||||
"1 2" \
|
||||
"even odd mark space none" \
|
||||
"/usb1/1-1/1-1.2/"
|
||||
ucidef_set_hwinfo dual_sim mobile gps ethernet ios rs232 rs485
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
|
||||
;;
|
||||
RUT361* |\
|
||||
RUT200* |\
|
||||
RUT241* |\
|
||||
RUT260*)
|
||||
ucidef_set_led_switch "lan" "LAN" "eth1_led" "switch0" "0x2"
|
||||
ucidef_set_led_switch "wan" "WAN" "eth2_led" "switch0" "0x1"
|
||||
ucidef_add_switch "switch0" "1:lan" "0:wan:2" "6@eth0"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 4
|
||||
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
|
||||
ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
|
||||
ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
|
||||
[ "${model:6:1}" = "1" ] && ucidef_set_hwinfo mobile wifi \
|
||||
ethernet || ucidef_set_hwinfo mobile wifi ethernet ios
|
||||
[ "${model:4:2}" = "60" ] && ucidef_set_release_version "7.4.2"
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
|
||||
;;
|
||||
RUT2*)
|
||||
ucidef_set_led_switch "lan" "LAN" "lan_led" "switch0" "0x04"
|
||||
ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 8
|
||||
ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
|
||||
[ "${model:6:1}" = "1" ] && ucidef_set_hwinfo mobile wifi \
|
||||
ethernet || ucidef_set_hwinfo mobile wifi ethernet ios
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
|
||||
;;
|
||||
RUT300*)
|
||||
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x02"
|
||||
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x10"
|
||||
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x08"
|
||||
ucidef_set_led_switch "lan4" "LAN4" "eth4_led" "switch0" "0x04"
|
||||
ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
|
||||
ucidef_set_interface_wan "eth1"
|
||||
ucidef_set_usb_jack "/usb1/1-1/"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0@eth0" "1:lan:1" "2:lan:4" "3:lan:3" "4:lan:2"
|
||||
ucidef_set_hwinfo usb ethernet ios
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
|
||||
;;
|
||||
RUT301*)
|
||||
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x01"
|
||||
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
|
||||
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
|
||||
ucidef_set_led_switch "lan4" "LAN4" "eth4_led" "switch0" "0x08"
|
||||
ucidef_set_led_switch "wan" "WAN" "wan_led" "switch0" "0x10"
|
||||
ucidef_add_switch "switch0" "0:lan:1" "1:lan:2" "2:lan:3" \
|
||||
"3:lan:4" "4:wan" "6@eth0"
|
||||
ucidef_set_usb_jack "/usb2/2-1/"
|
||||
ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
|
||||
ucidef_set_hwinfo usb ethernet ios
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
|
||||
;;
|
||||
RUT360*)
|
||||
ucidef_set_led_switch "lan" "LAN" "eth1_led" "switch0" "0x10"
|
||||
ucidef_set_led_netdev "wan" "WAN" "eth2_led" "eth1"
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 8
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 8
|
||||
ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
|
||||
ucidef_set_hwinfo mobile wifi dual_band_ssid ethernet ios
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
|
||||
;;
|
||||
RUT950*)
|
||||
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x10"
|
||||
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x08"
|
||||
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
|
||||
ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
|
||||
ucidef_set_interface_wan "eth1"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 8
|
||||
ucidef_add_switch "switch0" "0@eth0" "2:lan:3" "3:lan:2" "4:lan:1"
|
||||
ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
|
||||
[ "${model:7:2}" = "06" ] && ucidef_set_hwinfo dual_sim mobile \
|
||||
wifi ethernet || ucidef_set_hwinfo dual_sim mobile wifi ethernet ios
|
||||
ucidef_set_network_options "vlans" 15 "readonly_vlans" 1
|
||||
;;
|
||||
RUT955*)
|
||||
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x10"
|
||||
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x08"
|
||||
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
|
||||
ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
|
||||
ucidef_set_interface_wan "eth1"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 8
|
||||
ucidef_add_switch "switch0" "0@eth0" "2:lan:3" "3:lan:2" "4:lan:1"
|
||||
ucidef_set_usb_jack "/usb1/1-1/1-1.1/"
|
||||
ucidef_add_static_modem_info "$model" "1-1.4" "2" "primary" "gps_out"
|
||||
[ "${model:7:2}" = "06" ] && ucidef_set_hwinfo dual_sim usb gps sd_card \
|
||||
mobile wifi ethernet rs232 rs485 || ucidef_set_hwinfo dual_sim usb gps sd_card \
|
||||
mobile wifi ethernet ios rs232 rs485
|
||||
ucidef_add_serial_capabilities "rs232" \
|
||||
"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
|
||||
"5 6 7 8" \
|
||||
"rts/cts xon/xoff none" \
|
||||
"1 2" \
|
||||
"even odd mark space none" \
|
||||
"/usb1/1-1/1-1.3/"
|
||||
ucidef_add_serial_capabilities "rs485" \
|
||||
"300 600 1200 2400 4800 9600 19200 38400 57600 115200 \
|
||||
230400 460800 921600 1000000 3000000" \
|
||||
"8" \
|
||||
"none" \
|
||||
"1 2" \
|
||||
"even odd none" \
|
||||
"/tty/ttyATH1"
|
||||
ucidef_set_network_options "vlans" 15 "readonly_vlans" 1
|
||||
;;
|
||||
RUT901* |\
|
||||
RUT951*)
|
||||
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x01"
|
||||
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
|
||||
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
|
||||
ucidef_set_led_switch "wan" "WAN" "wan_led" "switch0" "0x10"
|
||||
ucidef_add_switch "switch0" "0:lan:1" "1:lan:2" "2:lan:3" "4:wan" "6@eth0"
|
||||
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
|
||||
ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 4
|
||||
ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
|
||||
[ "${model:7:1}" = "6" ] && ucidef_set_hwinfo dual_sim mobile \
|
||||
wifi ethernet || ucidef_set_hwinfo dual_sim mobile wifi ethernet ios
|
||||
[ "${model:4:2}" = "01" ] && ucidef_set_release_version "7.3.1"
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
|
||||
;;
|
||||
RUT906* |\
|
||||
RUT956*)
|
||||
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x01"
|
||||
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
|
||||
ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
|
||||
ucidef_set_led_switch "wan" "WAN" "wan_led" "switch0" "0x10"
|
||||
ucidef_add_switch "switch0" "0:lan:1" "1:lan:2" "2:lan:3" "4:wan" "6@eth0"
|
||||
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
|
||||
ucidef_set_usb_jack "/usb1/1-1/1-1.1/"
|
||||
ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 4
|
||||
ucidef_add_static_modem_info "$model" "1-1.4" "2" "primary" "gps_out"
|
||||
[ "${model:7:1}" = "6" ] && ucidef_set_hwinfo dual_sim usb gps \
|
||||
mobile wifi ethernet rs232 rs485 || ucidef_set_hwinfo dual_sim usb gps \
|
||||
mobile wifi ethernet ios rs232 rs485
|
||||
[ "${model:4:2}" = "06" ] && ucidef_set_release_version "7.4.2"
|
||||
ucidef_add_serial_capabilities "rs232" \
|
||||
"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
|
||||
"5 6 7 8" \
|
||||
"rts/cts xon/xoff none" \
|
||||
"1 2" \
|
||||
"even odd mark space none" \
|
||||
"/usb1/1-1/1-1.3/"
|
||||
ucidef_add_serial_capabilities "rs485" \
|
||||
"300 600 1200 2400 4800 9600 19200 38400 57600 115200 230400" \
|
||||
"5 6 7 8" \
|
||||
"xon/xoff none" \
|
||||
"1 2" \
|
||||
"even odd mark space none" \
|
||||
"/tty/ttyS1"
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
|
||||
;;
|
||||
TRB140*)
|
||||
ucidef_set_interface_lan "eth0 rndis0"
|
||||
[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile ethernet || \
|
||||
ucidef_set_hwinfo mobile ethernet ios
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
[ "${model:6:1}" = "4" ] && \
|
||||
ucidef_set_release_version "7.4.2"
|
||||
;;
|
||||
TRB143*)
|
||||
ucidef_set_interface_lan "eth0 rndis0"
|
||||
[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile ethernet || \
|
||||
ucidef_set_hwinfo mobile ethernet ios
|
||||
ucidef_add_serial_capabilities "mbus" \
|
||||
"300 600 1200 2400 4800 9600 19200 38400" \
|
||||
"5 6 7 8" \
|
||||
"xon/xoff none" \
|
||||
"1 2" \
|
||||
"even odd mark space none" \
|
||||
"/tty/ttyHS0"
|
||||
if [ "${model:6:1}" = "4" ]; then
|
||||
ucidef_set_release_version "7.4.3"
|
||||
else
|
||||
ucidef_set_release_version "7.1.7"
|
||||
fi
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
TRB141*)
|
||||
ucidef_set_interface_lan "rndis0"
|
||||
ucidef_set_hwinfo mobile ios
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
[ "${model:6:1}" = "4" ] && \
|
||||
ucidef_set_release_version "7.4.3"
|
||||
;;
|
||||
TRB142*)
|
||||
ucidef_set_interface_lan "rndis0"
|
||||
[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile rs232 || \
|
||||
ucidef_set_hwinfo mobile ios rs232
|
||||
ucidef_add_serial_capabilities "rs232" \
|
||||
"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
|
||||
"5 6 7 8" \
|
||||
"rts/cts xon/xoff none" \
|
||||
"1 2" \
|
||||
"even odd mark space none" \
|
||||
"/tty/ttyHS0"
|
||||
if [ "${model:6:1}" = "3" ]; then
|
||||
ucidef_set_release_version "7.1"
|
||||
elif [ "${model:6:1}" = "4" ]; then
|
||||
ucidef_set_release_version "7.4.3"
|
||||
fi
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
TRB145*)
|
||||
ucidef_set_interface_lan "rndis0"
|
||||
[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile rs485 || \
|
||||
ucidef_set_hwinfo mobile ios rs485
|
||||
ucidef_add_serial_capabilities "rs485" \
|
||||
"300 600 1200 2400 4800 9600 19200 38400 57600 115200 \
|
||||
230400 460800 921600 1000000 3000000" \
|
||||
"5 6 7 8" \
|
||||
"xon/xoff none" \
|
||||
"1 2" \
|
||||
"even odd mark space none" \
|
||||
"/tty/ttyHS0"
|
||||
if [ "${model:6:1}" = "2" ]; then
|
||||
ucidef_set_release_version "7.1"
|
||||
elif [ "${model:6:1}" = "4" ]; then
|
||||
ucidef_set_release_version "7.4.3"
|
||||
fi
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
TCR100*)
|
||||
ucidef_set_led_switch "lan" "LAN" "eth1_led" "switch0" "0x10"
|
||||
ucidef_set_led_netdev "wan" "WAN" "eth2_led" "eth1"
|
||||
ucidef_set_interfaces_lan_wan "eth0" "eth1"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 8
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 8
|
||||
ucidef_set_interface guest proto static type bridge \
|
||||
guest 1 _wireless true _dhcp true
|
||||
ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
|
||||
ucidef_set_hwinfo mobile wifi dual_band_ssid wps ethernet
|
||||
ucidef_set_release_version "7.2.4"
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
|
||||
;;
|
||||
OTD140*)
|
||||
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x10"
|
||||
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x2"
|
||||
ucidef_add_switch "switch0" "4:lan:1" "1:lan:2" "6@eth0"
|
||||
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
|
||||
ucidef_set_interface "lan" "default_ip" "%%LAN_IP%%"
|
||||
ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
|
||||
ucidef_set_hwinfo ethernet mobile dual_sim poe
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
|
||||
ucidef_set_poe 2 15400 1 "lan2" "3" 15400
|
||||
ucidef_set_poe_chip "0X77" "0:lan2"
|
||||
ucidef_set_poe_chip "0X2F" "1:lan2"
|
||||
;;
|
||||
OTD160*)
|
||||
ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x04"
|
||||
ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
|
||||
ucidef_set_interface_lan "eth0"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 8
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 8
|
||||
ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
|
||||
ucidef_set_hwinfo dual_sim mobile wifi dual_band_ssid ethernet
|
||||
ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
|
||||
;;
|
||||
TAP100*)
|
||||
ucidef_set_led_switch "lan" "LAN" "eth0_led" "switch0" "0x10"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 4
|
||||
ucidef_set_interface_lan "eth0"
|
||||
ucidef_set_interface "lan" "ipv6" "1"
|
||||
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
|
||||
ucidef_set_hwinfo wifi ethernet sw_rst_on_init
|
||||
ucidef_set_network_options "ula" false "disable_vlan" true "ip6assign" false "vlans" 16 "readonly_vlans" 1 "no_metric" true
|
||||
ucidef_set_interface "dhcp" "device" "@lan" "proto" "dhcp"
|
||||
;;
|
||||
TRB500*)
|
||||
ucidef_set_interface_lan "eth0 ecm0"
|
||||
ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary mnf_info 0x0)" \
|
||||
"$(macaddr_add "$(mtd_get_mac_binary mnf_info 0x0)" 1)"
|
||||
ucidef_set_hwinfo mobile ethernet ios
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
RUTM50*)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
|
||||
ucidef_set_usb_jack "/usb1/1-2/"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 4
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 4
|
||||
ucidef_add_static_modem_info "$model" "2-1" "2" "primary" "gps_out"
|
||||
ucidef_set_hwinfo usb ethernet ios gps mobile wifi dual_band_ssid dual_sim at_sim dsa hw_nat
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
RUTM51*)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
|
||||
ucidef_set_usb_jack "/usb1/1-2/"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 4
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 4
|
||||
ucidef_add_static_modem_info "$model" "2-1" "2" "primary"
|
||||
ucidef_set_hwinfo usb ethernet ios mobile wifi dual_band_ssid dual_sim at_sim dsa hw_nat
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
ucidef_set_release_version "7.4.4"
|
||||
;;
|
||||
RUTM08*)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
|
||||
ucidef_set_usb_jack "/usb1/1-1/"
|
||||
ucidef_set_hwinfo usb ethernet ios dsa hw_nat
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
RUTM09*)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
|
||||
ucidef_add_static_modem_info "$model" "1-2" "2" "primary" "gps_out"
|
||||
ucidef_set_usb_jack "/usb1/1-1/"
|
||||
ucidef_set_hwinfo usb ethernet ios gps mobile dual_sim dsa hw_nat
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
RUTM10*)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
|
||||
ucidef_set_usb_jack "/usb1/1-1/"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 4
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 4
|
||||
ucidef_set_hwinfo usb ethernet ios wifi dual_band_ssid dsa hw_nat
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
RUTM11*)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
|
||||
ucidef_set_usb_jack "/usb1/1-1/"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 4
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 4
|
||||
ucidef_add_static_modem_info "$model" "1-2" "2" "primary" "gps_out"
|
||||
ucidef_set_hwinfo usb ethernet ios gps mobile wifi dual_band_ssid dual_sim dsa hw_nat
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
RUTM12*)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
|
||||
ucidef_set_usb_jack "/usb1/1-2/1-2.3/"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 4
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 4
|
||||
ucidef_add_static_modem_info "$model" "1-1" "1" "primary" "gps_out"
|
||||
ucidef_add_static_modem_info "$model" "1-2.2" "1"
|
||||
ucidef_set_hwinfo usb ethernet ios gps mobile wifi dual_band_ssid dual_modem dsa hw_nat
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
|
||||
x86)
|
||||
ucidef_set_interface_wan "eth0"
|
||||
ucidef_set_interface_lan "eth1"
|
||||
ucidef_add_wlan_bssid_limit "wlan0" 4
|
||||
ucidef_add_wlan_bssid_limit "wlan1" 4
|
||||
ucidef_set_hwinfo usb wifi dual_band_ssid ethernet
|
||||
ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
|
||||
;;
|
||||
*)
|
||||
echo "Unsupported hardware. Network interfaces not intialized"
|
||||
;;
|
||||
esac
|
||||
|
||||
ucidef_set_interface "lan" "default_ip" "%%LAN_IP%%"
|
||||
|
||||
type ucidef_target_defaults &> /dev/null && \
|
||||
ucidef_target_defaults "$model"
|
||||
}
|
||||
|
||||
#~ Get model name for RUTX products
|
||||
if ! model="$(mnf_info --name)" 2>/dev/null; then
|
||||
model="$(mnf_info --prod-code)" 2>/dev/null
|
||||
fi
|
||||
|
||||
platform="$(cat /proc/device-tree/platform)" 2>/dev/null
|
||||
|
||||
board_config_update
|
||||
setup_json "$model"
|
||||
|
||||
ucidef_set_board_platform "$platform"
|
||||
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
|
|
@ -1,332 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
ath10kcal_die() {
|
||||
echo "ath10cal: " "$*"
|
||||
exit 1
|
||||
}
|
||||
|
||||
ath10kcal_extract() {
|
||||
local part=$1
|
||||
local offset=$2
|
||||
local count=$3
|
||||
local mtd
|
||||
|
||||
mtd=$(find_mtd_chardev $part)
|
||||
[ -n "$mtd" ] || \
|
||||
ath10kcal_die "no mtd device found for partition $part"
|
||||
|
||||
dd if=$mtd of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \
|
||||
ath10kcal_die "failed to extract calibration data from $mtd"
|
||||
}
|
||||
|
||||
ensure_correct_art() {
|
||||
# NOTE(rytis): Hardcoded hashes for 64 KiB file, filled with zeroes (md5b0) and ones (md5b1).
|
||||
local md5b0="fcd6bcb56c1689fcef28b57c22475bad"
|
||||
local md5b1="ecb99e6ffea7be1e5419350f725da86b"
|
||||
local artdir="/dev/mtd12"
|
||||
local bindir="/usr/share/art/art_rutx.bin"
|
||||
local md5art="$(md5sum $artdir)"
|
||||
md5art="${md5art%% *}"
|
||||
local devicename="$(mnf_info -n)"
|
||||
devicename="${devicename:0:6}"
|
||||
|
||||
if [ "$devicename" != "RUTX08" ] && [ "$devicename" != "RUTX09" ]; then
|
||||
if [ "$md5art" == "$md5b0" ] || [ "$md5art" == "$md5b1" ] && [ -e "$bindir" ]; then
|
||||
mtd write $bindir $artdir
|
||||
fi
|
||||
else
|
||||
if [ "$md5art" != "$md5b0" ] && [ "$md5art" != "$md5b1" ]; then
|
||||
mtd erase $artdir
|
||||
fi
|
||||
fi
|
||||
}
|
||||
|
||||
[ -e /lib/firmware/$FIRMWARE ] && exit 0
|
||||
|
||||
. /lib/functions.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
board=$(board_name)
|
||||
|
||||
ensure_correct_art
|
||||
|
||||
case "$FIRMWARE" in
|
||||
"ath10k/cal-pci-0000:01:00.0.bin")
|
||||
case "$board" in
|
||||
meraki,mr33 |\
|
||||
meraki,mr74)
|
||||
caldata_extract_ubi "ART" 0x9000 0x844
|
||||
caldata_valid "4408" || caldata_extract "ART" 0x9000 0x844
|
||||
;;
|
||||
esac
|
||||
;;
|
||||
"ath10k/pre-cal-pci-0000:01:00.0.bin")
|
||||
case "$board" in
|
||||
asus,map-ac2200)
|
||||
caldata_extract_ubi "Factory" 0x9000 0x2f20
|
||||
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
||||
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
||||
;;
|
||||
asus,rt-ac42u)
|
||||
caldata_extract_ubi "Factory" 0x9000 0x2f20
|
||||
;;
|
||||
avm,fritzrepeater-3000)
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1")
|
||||
;;
|
||||
linksys,ea8300 |\
|
||||
linksys,mr8300)
|
||||
caldata_extract "ART" 0x9000 0x2f20
|
||||
# OEM assigns 4 sequential MACs
|
||||
ath10k_patch_mac $(macaddr_setbit_la $(macaddr_add "$(cat /sys/class/net/eth0/address)" 4))
|
||||
;;
|
||||
netgear,rbr50|\
|
||||
netgear,rbs50|\
|
||||
netgear,srr60|\
|
||||
netgear,srs60)
|
||||
caldata_extract_mmc "0:ART" 0x9000 0x2f20
|
||||
ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0x12)
|
||||
;;
|
||||
esac
|
||||
;;
|
||||
"ath10k/pre-cal-ahb-a800000.wifi.bin")
|
||||
case "$board" in
|
||||
qcom,ap-dk01.1-c1)
|
||||
caldata_extract "ART" 0x1000 0x2f20
|
||||
;;
|
||||
asus,map-ac2200|\
|
||||
asus,rt-ac42u|\
|
||||
asus,rt-ac58u)
|
||||
caldata_extract_ubi "Factory" 0x1000 0x2f20
|
||||
;;
|
||||
avm,fritzbox-4040)
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x400 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader_config")
|
||||
;;
|
||||
avm,fritzbox-7530 |\
|
||||
avm,fritzrepeater-1200 |\
|
||||
avm,fritzrepeater-3000)
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1")
|
||||
;;
|
||||
cellc,rtl30vw)
|
||||
caldata_extract "0:ART" 0x1000 0x2f20
|
||||
;;
|
||||
devolo,magic-2-wifi-next)
|
||||
caldata_extract "ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(mtd_get_mac_ascii APPSBLENV WiFiMacAddress0)
|
||||
;;
|
||||
dlink,dap-2610)
|
||||
caldata_extract "ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(mtd_get_mac_ascii bdcfg wlanmac)
|
||||
;;
|
||||
engenius,emd1)
|
||||
caldata_extract "0:ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(mtd_get_mac_ascii 0:APPSBLENV wlanaddr)
|
||||
;;
|
||||
engenius,emr3500)
|
||||
caldata_extract "0:ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(mtd_get_mac_ascii 0:APPSBLENV ethaddr)
|
||||
;;
|
||||
engenius,ens620ext)
|
||||
caldata_extract "ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 2)
|
||||
;;
|
||||
extreme-networks,ws-ap3915i)
|
||||
caldata_extract "ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(mtd_get_mac_ascii CFG1 RADIOADDR0)
|
||||
;;
|
||||
linksys,ea8300 |\
|
||||
linksys,mr8300)
|
||||
caldata_extract "ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 2)
|
||||
;;
|
||||
meraki,mr33 |\
|
||||
meraki,mr74)
|
||||
caldata_extract_ubi "ART" 0x1000 0x2f20
|
||||
caldata_valid "202f" || caldata_extract "ART" 0x1000 0x2f20
|
||||
;;
|
||||
mikrotik,cap-ac |\
|
||||
mikrotik,hap-ac2 |\
|
||||
mikrotik,hap-ac3 |\
|
||||
mikrotik,hap-ac3-lte6-kit |\
|
||||
mikrotik,wap-ac |\
|
||||
mikrotik,wap-ac-lte |\
|
||||
mikrotik,wap-r-ac)
|
||||
wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
|
||||
( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x0 0x2f20 ) || \
|
||||
( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_0" 0x0 0x2f20 )
|
||||
;;
|
||||
netgear,rbr50|\
|
||||
netgear,rbs50|\
|
||||
netgear,srr60|\
|
||||
netgear,srs60)
|
||||
caldata_extract_mmc "0:ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0x0)
|
||||
;;
|
||||
pakedge,wr-1)
|
||||
caldata_extract "0:ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add $(get_mac_label) 2)
|
||||
;;
|
||||
teltonika,rutx10|\
|
||||
teltonika,rutx50)
|
||||
caldata_extract "0:ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary "0:CONFIG" 0x0) 2)
|
||||
;;
|
||||
sony,ncp-hg100-cellular)
|
||||
caldata_extract_mmc "0:ART" 0x1000 0x2f20
|
||||
;;
|
||||
zyxel,nbg6617 |\
|
||||
zyxel,wre6606)
|
||||
caldata_extract "ART" 0x1000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -2)
|
||||
;;
|
||||
teltonika,rutx12 |\
|
||||
teltonika,rutx)
|
||||
ath10kcal_extract "0:ART" 4096 12064
|
||||
;;
|
||||
esac
|
||||
;;
|
||||
"ath10k/pre-cal-ahb-a800000.wifi.bin")
|
||||
case "$board" in
|
||||
qcom,ap-dk01.1-c1)
|
||||
caldata_extract "ART" 0x5000 0x2f20
|
||||
;;
|
||||
asus,map-ac2200|\
|
||||
asus,rt-ac58u)
|
||||
caldata_extract_ubi "Factory" 0x5000 0x2f20
|
||||
;;
|
||||
avm,fritzbox-4040)
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x400 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader_config")
|
||||
;;
|
||||
avm,fritzbox-7530 |\
|
||||
avm,fritzrepeater-1200 |\
|
||||
avm,fritzrepeater-3000)
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
|
||||
/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1")
|
||||
;;
|
||||
cellc,rtl30vw)
|
||||
caldata_extract "0:ART" 0x5000 0x2f20
|
||||
;;
|
||||
devolo,magic-2-wifi-next)
|
||||
caldata_extract "ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(mtd_get_mac_ascii APPSBLENV WiFiMacAddress1)
|
||||
;;
|
||||
dlink,dap-2610)
|
||||
caldata_extract "ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(mtd_get_mac_ascii bdcfg wlanmac_a)
|
||||
;;
|
||||
engenius,emd1)
|
||||
caldata_extract "0:ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii 0:APPSBLENV wlanaddr) 1)
|
||||
;;
|
||||
engenius,emr3500)
|
||||
caldata_extract "0:ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii 0:APPSBLENV ethaddr) 1)
|
||||
;;
|
||||
engenius,ens620ext)
|
||||
caldata_extract "ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 3)
|
||||
;;
|
||||
extreme-networks,ws-ap3915i)
|
||||
caldata_extract "ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(mtd_get_mac_ascii CFG1 RADIOADDR1)
|
||||
;;
|
||||
linksys,ea8300 |\
|
||||
linksys,mr8300)
|
||||
caldata_extract "ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 3)
|
||||
;;
|
||||
meraki,mr33 |\
|
||||
meraki,mr74)
|
||||
caldata_extract_ubi "ART" 0x5000 0x2f20
|
||||
caldata_valid "202f" || caldata_extract "ART" 0x5000 0x2f20
|
||||
;;
|
||||
mikrotik,cap-ac |\
|
||||
mikrotik,hap-ac2 |\
|
||||
mikrotik,hap-ac3 |\
|
||||
mikrotik,hap-ac3-lte6-kit |\
|
||||
mikrotik,sxtsq-5-ac |\
|
||||
mikrotik,wap-ac |\
|
||||
mikrotik,wap-ac-lte |\
|
||||
mikrotik,wap-r-ac)
|
||||
wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
|
||||
( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x8000 0x2f20 ) || \
|
||||
( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_2" 0x0 0x2f20 )
|
||||
;;
|
||||
netgear,rbr50|\
|
||||
netgear,rbs50|\
|
||||
netgear,srr60|\
|
||||
netgear,srs60)
|
||||
caldata_extract_mmc "0:ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0xc)
|
||||
;;
|
||||
pakedge,wr-1)
|
||||
caldata_extract "0:ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add $(get_mac_label) 4)
|
||||
;;
|
||||
teltonika,rutx10|\
|
||||
teltonika,rutx50)
|
||||
caldata_extract "0:ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary "0:CONFIG" 0x0) 3)
|
||||
;;
|
||||
sony,ncp-hg100-cellular)
|
||||
caldata_extract_mmc "0:ART" 0x5000 0x2f20
|
||||
;;
|
||||
zyxel,nbg6617 |\
|
||||
zyxel,wre6606)
|
||||
caldata_extract "ART" 0x5000 0x2f20
|
||||
ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
|
||||
;;
|
||||
teltonika,rutx12 |\
|
||||
teltonika,rutx)
|
||||
ath10kcal_extract "0:ART" 20480 12064
|
||||
;;
|
||||
esac
|
||||
;;
|
||||
"ath10k/QCA4019/hw1.0/board-ahb-a000000.wifi.bin")
|
||||
case "$board" in
|
||||
mikrotik,cap-ac |\
|
||||
mikrotik,hap-ac2 |\
|
||||
mikrotik,hap-ac3 |\
|
||||
mikrotik,hap-ac3-lte6-kit |\
|
||||
mikrotik,wap-ac |\
|
||||
mikrotik,wap-ac-lte |\
|
||||
mikrotik,wap-r-ac)
|
||||
wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
|
||||
( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0x2f20 0x2f20 ) || \
|
||||
( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_0" 0x2f20 0x2f20 )
|
||||
;;
|
||||
esac
|
||||
;;
|
||||
"ath10k/QCA4019/hw1.0/board-ahb-a800000.wifi.bin")
|
||||
case "$board" in
|
||||
mikrotik,cap-ac |\
|
||||
mikrotik,hap-ac2 |\
|
||||
mikrotik,hap-ac3 |\
|
||||
mikrotik,hap-ac3-lte6-kit |\
|
||||
mikrotik,sxtsq-5-ac |\
|
||||
mikrotik,wap-ac |\
|
||||
mikrotik,wap-ac-lte |\
|
||||
mikrotik,wap-r-ac)
|
||||
wlan_data="/sys/firmware/mikrotik/hard_config/wlan_data"
|
||||
( [ -f "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data" 0xaf20 0x2f20 ) || \
|
||||
( [ -d "$wlan_data" ] && caldata_sysfsload_from_file "$wlan_data/data_2" 0x2f20 0x2f20 )
|
||||
;;
|
||||
esac
|
||||
;;
|
||||
*)
|
||||
exit 1
|
||||
;;
|
||||
esac
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
#!/bin/ash
|
||||
|
||||
[ "$ACTION" == "add" ] || exit 0
|
||||
|
||||
PHYNBR=${DEVPATH##*/phy}
|
||||
|
||||
[ -n $PHYNBR ] || exit 0
|
||||
|
||||
. /lib/functions.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
board=$(board_name)
|
||||
|
||||
case "$board" in
|
||||
teltonika,rutx)
|
||||
mac_addr=$(mtd_get_mac_binary 0:CONFIG 0)
|
||||
if [ "$mac_addr" != "ff:ff:ff:ff:ff:ff" ]; then
|
||||
echo $(macaddr_add $mac_addr $(($PHYNBR + 2)) ) > /sys${DEVPATH}/macaddress
|
||||
fi
|
||||
;;
|
||||
*)
|
||||
;;
|
||||
esac
|
||||
|
|
@ -1,70 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
# Copyright (C) 2006-2011 OpenWrt.org
|
||||
|
||||
START=10
|
||||
STOP=90
|
||||
|
||||
uci_apply_defaults() {
|
||||
. /lib/functions/system.sh
|
||||
|
||||
cd /etc/uci-defaults || return 0
|
||||
files="$(find . -type f | sort)"
|
||||
[ -z "$files" ] && return 0
|
||||
mkdir -p /tmp/.uci
|
||||
for file in $files; do
|
||||
( . "./$file" ) && rm -f "$file"
|
||||
done
|
||||
uci commit
|
||||
}
|
||||
|
||||
boot() {
|
||||
[ -f /proc/mounts ] || /sbin/mount_root
|
||||
[ -f /proc/jffs2_bbc ] && echo "S" > /proc/jffs2_bbc
|
||||
|
||||
mkdir -p /var/run
|
||||
mkdir -p /var/log
|
||||
mkdir -p /var/lock
|
||||
mkdir -p /var/state
|
||||
mkdir -p /var/tmp
|
||||
mkdir -p /tmp/.uci
|
||||
chmod 0700 /tmp/.uci
|
||||
touch /var/log/wtmp
|
||||
touch /var/log/lastlog
|
||||
mkdir -p /tmp/resolv.conf.d
|
||||
touch /tmp/resolv.conf.d/resolv.conf.auto
|
||||
ln -sf /tmp/resolv.conf.d/resolv.conf.auto /tmp/resolv.conf
|
||||
grep -q debugfs /proc/filesystems && /bin/mount -o noatime -t debugfs debugfs /sys/kernel/debug
|
||||
grep -q bpf /proc/filesystems && /bin/mount -o nosuid,nodev,noexec,noatime,mode=0700 -t bpf bpffs /sys/fs/bpf
|
||||
grep -q pstore /proc/filesystems && /bin/mount -o noatime -t pstore pstore /sys/fs/pstore
|
||||
|
||||
# mount all entries in fstab
|
||||
/bin/mount -a &
|
||||
|
||||
# /log directory might be created on preinit
|
||||
# symlink /storage to /log on TRB14X devices
|
||||
[ -d /storage -a ! -h /log ] && {
|
||||
rm -rf /log
|
||||
ln -sf /storage /log
|
||||
}
|
||||
|
||||
# Wifi ---
|
||||
param=$(/sbin/mnf_info "--name")
|
||||
router_name=${param:0:6}
|
||||
if [ $router_name == "RUTX08" ] || [ $router_name == "RUTX09" ]; then
|
||||
rm /etc/modules.d/ath10k
|
||||
fi
|
||||
|
||||
/bin/board_detect
|
||||
|
||||
/sbin/kmodloader
|
||||
|
||||
/bin/config_generate
|
||||
uci_apply_defaults
|
||||
|
||||
[ -f "/etc/config/teltonika" ] && rm /etc/config/teltonika
|
||||
|
||||
# temporary hack until configd exists
|
||||
/sbin/reload_config
|
||||
# leave finished boot script indication
|
||||
touch /var/run/boot-done
|
||||
}
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
# Copyright (C) 2006 OpenWrt.org
|
||||
|
||||
START=95
|
||||
boot() {
|
||||
mount_root done
|
||||
rm -f /sysupgrade.tgz && sync
|
||||
|
||||
# process user commands
|
||||
[ -f /etc/rc.local ] && {
|
||||
sh /etc/rc.local
|
||||
}
|
||||
}
|
||||
|
|
@ -1,66 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
# Copyright (C) 2015 OpenWrt.org
|
||||
|
||||
START=94
|
||||
STOP=10
|
||||
USE_PROCD=1
|
||||
|
||||
|
||||
load_gpio_switch()
|
||||
{
|
||||
local name
|
||||
local gpio_pin
|
||||
local value
|
||||
|
||||
config_get gpio_pin "$1" gpio_pin
|
||||
config_get name "$1" name
|
||||
config_get value "$1" value 0
|
||||
|
||||
[ -z "$gpio_pin" ] && {
|
||||
echo >&2 "Skipping gpio_switch '$name' due to missing gpio_pin"
|
||||
return 1
|
||||
}
|
||||
|
||||
local gpio_path
|
||||
if [ -n "$(echo "$gpio_pin" | grep -E "^[0-9]+$")" ]; then
|
||||
gpio_path="/sys/class/gpio/gpio${gpio_pin}"
|
||||
|
||||
# export GPIO pin for access
|
||||
[ -d "$gpio_path" ] || {
|
||||
echo "$gpio_pin" >/sys/class/gpio/export
|
||||
# we need to wait a bit until the GPIO appears
|
||||
[ -d "$gpio_path" ] || sleep 1
|
||||
}
|
||||
|
||||
# direction attribute only exists if the kernel supports changing the
|
||||
# direction of a GPIO
|
||||
if [ -e "${gpio_path}/direction" ]; then
|
||||
# set the pin to output with high or low pin value
|
||||
{ [ "$value" = "0" ] && echo "low" || echo "high"; } \
|
||||
>"$gpio_path/direction"
|
||||
else
|
||||
{ [ "$value" = "0" ] && echo "0" || echo "1"; } \
|
||||
>"$gpio_path/value"
|
||||
fi
|
||||
else
|
||||
gpio_path="/sys/class/gpio/${gpio_pin}"
|
||||
|
||||
[ -d "$gpio_path" ] && {
|
||||
{ [ "$value" = "0" ] && echo "0" || echo "1"; } \
|
||||
>"$gpio_path/value"
|
||||
}
|
||||
fi
|
||||
}
|
||||
|
||||
service_triggers()
|
||||
{
|
||||
procd_add_reload_trigger "system"
|
||||
}
|
||||
|
||||
start_service()
|
||||
{
|
||||
[ -e /sys/class/gpio/ ] && {
|
||||
config_load system
|
||||
config_foreach load_gpio_switch gpio_switch
|
||||
}
|
||||
}
|
||||
|
|
@ -1,140 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
# Copyright (C) 2008 OpenWrt.org
|
||||
|
||||
START=96
|
||||
|
||||
load_led() {
|
||||
local name
|
||||
local sysfs
|
||||
local trigger
|
||||
local dev
|
||||
local ports
|
||||
local mode
|
||||
local default
|
||||
local delayon
|
||||
local delayoff
|
||||
local interval
|
||||
|
||||
config_get sysfs $1 sysfs
|
||||
config_get name $1 name "$sysfs"
|
||||
config_get trigger $1 trigger "none"
|
||||
config_get dev $1 dev
|
||||
config_get ports $1 port
|
||||
config_get mode $1 mode
|
||||
config_get_bool default $1 default "0"
|
||||
config_get delayon $1 delayon
|
||||
config_get delayoff $1 delayoff
|
||||
config_get interval $1 interval "50"
|
||||
config_get port_state $1 port_state
|
||||
config_get delay $1 delay "150"
|
||||
config_get message $1 message ""
|
||||
config_get gpio $1 gpio "0"
|
||||
config_get inverted $1 inverted "0"
|
||||
|
||||
if [ "$trigger" = "rssi" ]; then
|
||||
# handled by rssileds userspace process
|
||||
return
|
||||
fi
|
||||
|
||||
[ "$trigger" = "usbdev" ] && {
|
||||
# Backward compatibility: translate to the new trigger
|
||||
trigger="usbport"
|
||||
# Translate port of root hub, e.g. 4-1 -> usb4-port1
|
||||
ports=$(echo "$dev" | sed -n 's/^\([0-9]*\)-\([0-9]*\)$/usb\1-port\2/p')
|
||||
# Translate port of extra hub, e.g. 2-2.4 -> 2-2-port4
|
||||
[ -z "$ports" ] && ports=$(echo "$dev" | sed -n 's/\./-port/p')
|
||||
}
|
||||
|
||||
[ -e /sys/class/leds/${sysfs}/brightness ] && {
|
||||
echo "setting up led ${name}"
|
||||
|
||||
printf "%s %s %d\n" \
|
||||
"$sysfs" \
|
||||
"$(sed -ne 's/^.*\[\(.*\)\].*$/\1/p' /sys/class/leds/${sysfs}/trigger)" \
|
||||
"$(cat /sys/class/leds/${sysfs}/brightness)" \
|
||||
>> /var/run/led.state
|
||||
|
||||
[ "$default" = 0 ] &&
|
||||
echo 0 >/sys/class/leds/${sysfs}/brightness
|
||||
|
||||
echo $trigger > /sys/class/leds/${sysfs}/trigger 2> /dev/null
|
||||
ret="$?"
|
||||
|
||||
[ $default = 1 ] &&
|
||||
cat /sys/class/leds/${sysfs}/max_brightness > /sys/class/leds/${sysfs}/brightness
|
||||
|
||||
[ $ret = 0 ] || {
|
||||
echo >&2 "Skipping trigger '$trigger' for led '$name' due to missing kernel module"
|
||||
return 1
|
||||
}
|
||||
case "$trigger" in
|
||||
"netdev")
|
||||
[ -n "$dev" ] && {
|
||||
echo $dev > /sys/class/leds/${sysfs}/device_name
|
||||
for m in $mode; do
|
||||
[ -e "/sys/class/leds/${sysfs}/$m" ] && \
|
||||
echo 1 > /sys/class/leds/${sysfs}/$m
|
||||
done
|
||||
echo $interval > /sys/class/leds/${sysfs}/interval
|
||||
}
|
||||
;;
|
||||
|
||||
"timer"|"oneshot")
|
||||
[ -n "$delayon" ] && \
|
||||
echo $delayon > /sys/class/leds/${sysfs}/delay_on
|
||||
[ -n "$delayoff" ] && \
|
||||
echo $delayoff > /sys/class/leds/${sysfs}/delay_off
|
||||
;;
|
||||
|
||||
"usbport")
|
||||
local p
|
||||
|
||||
for p in $ports; do
|
||||
echo 1 > /sys/class/leds/${sysfs}/ports/$p
|
||||
done
|
||||
;;
|
||||
|
||||
"port_state")
|
||||
[ -n "$port_state" ] && \
|
||||
echo $port_state > /sys/class/leds/${sysfs}/port_state
|
||||
;;
|
||||
|
||||
"gpio")
|
||||
echo $gpio > /sys/class/leds/${sysfs}/gpio
|
||||
echo $inverted > /sys/class/leds/${sysfs}/inverted
|
||||
;;
|
||||
|
||||
switch[0-9]*)
|
||||
local port_mask speed_mask
|
||||
|
||||
config_get port_mask $1 port_mask
|
||||
[ -n "$port_mask" ] && \
|
||||
echo $port_mask > /sys/class/leds/${sysfs}/port_mask
|
||||
config_get speed_mask $1 speed_mask
|
||||
[ -n "$speed_mask" ] && \
|
||||
echo $speed_mask > /sys/class/leds/${sysfs}/speed_mask
|
||||
[ -n "$mode" ] && \
|
||||
echo "$mode" > /sys/class/leds/${sysfs}/mode
|
||||
;;
|
||||
esac
|
||||
}
|
||||
}
|
||||
|
||||
start() {
|
||||
[ -e /sys/class/leds/ ] && {
|
||||
[ -s /var/run/led.state ] && {
|
||||
local led trigger brightness
|
||||
while read led trigger brightness; do
|
||||
[ -e "/sys/class/leds/$led/trigger" ] && \
|
||||
echo "$trigger" > "/sys/class/leds/$led/trigger"
|
||||
|
||||
[ -e "/sys/class/leds/$led/brightness" ] && \
|
||||
echo "$brightness" > "/sys/class/leds/$led/brightness"
|
||||
done < /var/run/led.state
|
||||
rm /var/run/led.state
|
||||
}
|
||||
|
||||
config_load system
|
||||
config_foreach load_led led
|
||||
}
|
||||
}
|
||||
|
|
@ -1,37 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
# Copyright (C) 2021 Teltonika Networks
|
||||
# Copyright (C) 2022 Ycarus (Yannick Chabanois) <ycarus@zugaina.org>
|
||||
|
||||
START=2
|
||||
|
||||
USE_PROCD=1
|
||||
|
||||
PROG=/bin/board_track
|
||||
NAME=board_track
|
||||
PIDCOUNT=1
|
||||
|
||||
start_service() {
|
||||
. /lib/functions
|
||||
|
||||
[ "$(board_name)" != "teltonika,rutx" ] && return 0
|
||||
local pid_file="/var/run/${NAME}.${PIDCOUNT}.pid"
|
||||
|
||||
procd_open_instance
|
||||
procd_set_param command "$PROG"
|
||||
procd_set_param file /etc/config/system
|
||||
|
||||
procd_set_param respawn
|
||||
|
||||
procd_set_param stdout 1
|
||||
procd_set_param pidfile $pid_file
|
||||
procd_close_instance
|
||||
}
|
||||
|
||||
reload_service() {
|
||||
stop
|
||||
start
|
||||
}
|
||||
|
||||
service_triggers() {
|
||||
procd_add_reload_trigger "system"
|
||||
}
|
||||
|
|
@ -1,28 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
|
||||
# Copyright (C) 2021 Teltonika
|
||||
|
||||
START=50
|
||||
STOP=51
|
||||
USE_PROCD=1
|
||||
|
||||
service_triggers()
|
||||
{
|
||||
procd_add_reload_trigger "ntpserver"
|
||||
}
|
||||
|
||||
start_service() {
|
||||
. /lib/functions.sh
|
||||
local enabled
|
||||
|
||||
config_load ntpserver
|
||||
config_get enabled general enabled "0"
|
||||
|
||||
[ "$enabled" -gt 0 ] || return
|
||||
|
||||
logger -t "ntpd" "Starting NTP server"
|
||||
procd_open_instance
|
||||
procd_set_param respawn 0
|
||||
procd_set_param command "ntpd" -ln
|
||||
procd_close_instance
|
||||
}
|
||||
|
|
@ -1,32 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
|
||||
START=98
|
||||
|
||||
ipq40xx_power_auto() {
|
||||
# change scaling governor as ondemand to enable clock scaling based on system load
|
||||
echo "performance" > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
|
||||
|
||||
# set scaling min freq as 200 MHz
|
||||
echo "716000" > /sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq
|
||||
|
||||
# Change sampling rate for frequency scaling decisions to 1s, from 10 ms
|
||||
#echo "1000000" > /sys/devices/system/cpu/cpufreq/ondemand/sampling_rate
|
||||
|
||||
# Change sampling rate for frequency down scaling decision to 10s
|
||||
#echo 10 > /sys/devices/system/cpu/cpufreq/ondemand/sampling_down_factor
|
||||
|
||||
# Change the CPU load threshold above which frequency is up-scaled to
|
||||
# turbo frequency,to 50%
|
||||
#echo 50 > /sys/devices/system/cpu/cpufreq/ondemand/up_threshold
|
||||
}
|
||||
|
||||
start() {
|
||||
. /lib/functions.sh
|
||||
|
||||
local board=$(board_name)
|
||||
case "$board" in
|
||||
teltonika,rutx | ap-dk01.1-c1 | ap-dk01.1-c2 | ap-dk04.1-c1 | ap-dk04.1-c2 | ap-dk04.1-c3 | \
|
||||
ap-dk04.1-c4 | ap-dk04.1-c5 | ap-dk05.1-c1 | ap-dk06.1-c1 | ap-dk07.1-c1 | ap-dk07.1-c2 | ap-dk07.1-c3)
|
||||
ipq40xx_power_auto ;;
|
||||
esac
|
||||
}
|
||||
|
|
@ -1,46 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
# Copyright (C) 2006 OpenWrt.org
|
||||
|
||||
START=11
|
||||
|
||||
apply_defaults() {
|
||||
local mem="$(awk '/^MemTotal:/ {print $2}' /proc/meminfo)"
|
||||
local min_free frag_low_thresh frag_high_thresh
|
||||
|
||||
if [ "$mem" -gt 65536 ]; then # 128M
|
||||
min_free=16384
|
||||
elif [ "$mem" -gt 32768 ]; then # 64M
|
||||
#Too high for RUT3 device, lets make 2048
|
||||
#min_free=8192
|
||||
min_free=2048
|
||||
else
|
||||
min_free=1024
|
||||
frag_low_thresh=393216
|
||||
frag_high_thresh=524288
|
||||
fi
|
||||
|
||||
sysctl -qw vm.min_free_kbytes="$min_free"
|
||||
|
||||
[ "$frag_low_thresh" ] && sysctl -qw \
|
||||
net.ipv4.ipfrag_low_thresh="$frag_low_thresh" \
|
||||
net.ipv4.ipfrag_high_thresh="$frag_high_thresh" \
|
||||
net.ipv6.ip6frag_low_thresh="$frag_low_thresh" \
|
||||
net.ipv6.ip6frag_high_thresh="$frag_high_thresh" \
|
||||
net.netfilter.nf_conntrack_frag6_low_thresh="$frag_low_thresh" \
|
||||
net.netfilter.nf_conntrack_frag6_high_thresh="$frag_high_thresh"
|
||||
|
||||
# first set default, then all interfaces to avoid races with appearing interfaces
|
||||
if [ -d /proc/sys/net/ipv6/conf ]; then
|
||||
echo 0 > /proc/sys/net/ipv6/conf/default/accept_ra
|
||||
for iface in /proc/sys/net/ipv6/conf/*/accept_ra; do
|
||||
echo 0 > "$iface"
|
||||
done
|
||||
fi
|
||||
}
|
||||
|
||||
start() {
|
||||
apply_defaults
|
||||
for CONF in /etc/sysctl.d/*.conf /etc/sysctl.conf; do
|
||||
[ -f "$CONF" ] && sysctl -e -p "$CONF" >&-
|
||||
done
|
||||
}
|
||||
|
|
@ -1,34 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
# Copyright (C) 2013-2014 OpenWrt.org
|
||||
|
||||
START=00
|
||||
STOP=90
|
||||
|
||||
RTC_DEV=/dev/rtc0
|
||||
HWCLOCK=/sbin/hwclock
|
||||
|
||||
boot() {
|
||||
# start && exit 0
|
||||
|
||||
local maxtime="$(maxtime)"
|
||||
local curtime="$(date +%s)"
|
||||
[ $curtime -lt $maxtime ] && date -s @$maxtime
|
||||
}
|
||||
|
||||
start() {
|
||||
boot
|
||||
}
|
||||
|
||||
stop() {
|
||||
[ -e "$RTC_DEV" ] && [ -e "$HWCLOCK" ] && $HWCLOCK -w -u -f $RTC_DEV && \
|
||||
logger -t sysfixtime "saved '$(date)' to $RTC_DEV"
|
||||
}
|
||||
|
||||
maxtime() {
|
||||
local file newest
|
||||
|
||||
for file in $( find /etc -type f ) ; do
|
||||
[ -z "$newest" -o "$newest" -ot "$file" ] && newest=$file
|
||||
done
|
||||
[ "$newest" ] && date -r "$newest" +%s
|
||||
}
|
||||
|
|
@ -1,45 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
# Copyright (C) 2014 OpenWrt.org
|
||||
|
||||
START=10
|
||||
USE_PROCD=1
|
||||
|
||||
validate_system_section() {
|
||||
uci_load_validate system system "$1" "$2" \
|
||||
'hostname:string:%%NAME%%' \
|
||||
'conloglevel:uinteger' \
|
||||
'buffersize:uinteger' \
|
||||
'timezone:string:UTC' \
|
||||
'zonename:string'
|
||||
}
|
||||
|
||||
system_config() {
|
||||
[ "$2" = 0 ] || {
|
||||
echo "validation failed"
|
||||
return 1
|
||||
}
|
||||
|
||||
echo "$hostname" > /proc/sys/kernel/hostname
|
||||
[ -z "$conloglevel" -a -z "$buffersize" ] || dmesg ${conloglevel:+-n $conloglevel} ${buffersize:+-s $buffersize}
|
||||
echo "$timezone" > /tmp/TZ
|
||||
[ -n "$zonename" ] && [ -f "/usr/share/zoneinfo/${zonename// /_}" ] \
|
||||
&& ln -sf "/usr/share/zoneinfo/${zonename// /_}" /tmp/localtime \
|
||||
&& rm -f /tmp/TZ
|
||||
|
||||
# apply timezone to kernel
|
||||
hwclock -u --systz
|
||||
}
|
||||
|
||||
reload_service() {
|
||||
config_load system
|
||||
config_foreach validate_system_section system system_config
|
||||
}
|
||||
|
||||
service_triggers() {
|
||||
procd_add_reload_trigger "system"
|
||||
procd_add_validation validate_system_section
|
||||
}
|
||||
|
||||
start_service() {
|
||||
reload_service
|
||||
}
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
#!/bin/sh /etc/rc.common
|
||||
# Copyright (C) 2006 OpenWrt.org
|
||||
|
||||
STOP=90
|
||||
|
||||
restart() {
|
||||
:
|
||||
}
|
||||
|
||||
stop() {
|
||||
sync
|
||||
/bin/umount -a -d -r
|
||||
}
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
SECTION="hwinfo"
|
||||
CONFIG="hwinfo"
|
||||
|
||||
get_hw_info() {
|
||||
param=$(/sbin/mnf_info "--name")
|
||||
[ -n "$param" -a ${#param} == 12 ] && uci set "system"."@system[0]"."device_code"=$param
|
||||
|
||||
hostname=${param:0:6}
|
||||
[ -n "$hostname" -a ${#hostname} == 6 -a -z "$(uci -q get system.@system[0].hostname)" ] && uci set "system"."@system[0]"."hostname"=OpenMPTCProuter
|
||||
|
||||
routername=${param:0:6}
|
||||
[ -n "$routername" -a ${#routername} == 6 -a -z "$(uci -q get system.@system[0].routername)" ] && uci set "system"."@system[0]"."routername"=$routername
|
||||
|
||||
version=$(cat /etc/version)
|
||||
[ -n "$version" ] && uci set "system"."@system[0]"."device_fw_version"=$version
|
||||
|
||||
uci commit "system"
|
||||
}
|
||||
|
||||
# get device information
|
||||
echo "Reading device information"
|
||||
get_hw_info
|
||||
|
||||
exit 0
|
||||
|
|
@ -1,34 +0,0 @@
|
|||
#!/bin/sh
|
||||
. /lib/functions.sh
|
||||
|
||||
move_network(){
|
||||
local section=$1
|
||||
local device ports vlan
|
||||
|
||||
config_get ports "$section" ports
|
||||
config_get device "$section" device
|
||||
config_get vlan "$section" vlan
|
||||
|
||||
[ "$vlan" -eq 1 ] && {
|
||||
if list_contains "ports" "0t" && list_contains "ports" "5"; then
|
||||
uci_set network "$section" ports "${ports/0t/0}"
|
||||
uci_set network "$section" vlan "2"
|
||||
uci_remove network "$section" vid
|
||||
fi
|
||||
}
|
||||
|
||||
[ "$vlan" -eq 2 ] && {
|
||||
if list_contains ports "0t"; then
|
||||
echo "Contains"
|
||||
uci_set network "$section" ports "${ports/0t/0}"
|
||||
uci_set network "$section" vlan "1"
|
||||
uci_remove network "$section" vid
|
||||
fi
|
||||
}
|
||||
}
|
||||
|
||||
config_load network
|
||||
config_foreach move_network switch_vlan
|
||||
uci_commit network
|
||||
|
||||
exit 0
|
||||
|
|
@ -1,54 +0,0 @@
|
|||
|
||||
. /usr/share/libubox/jshn.sh
|
||||
|
||||
# when device contains 2 internal modems, this function will return '2' if
|
||||
# selected modem(inc_id) is builtin and primary.
|
||||
# And if it's only builtin, then '1'
|
||||
is_builtin_modem() {
|
||||
local inc_id="$1"
|
||||
local modem modems id builtin primary
|
||||
|
||||
json_init
|
||||
json_load_file "/etc/board.json"
|
||||
|
||||
json_get_keys modems modems
|
||||
json_select modems
|
||||
|
||||
for modem in $modems; do
|
||||
json_select "$modem"
|
||||
json_get_vars id builtin primary
|
||||
|
||||
[ "$id" = "$inc_id" ] && {
|
||||
[ -n "$builtin" ] && {
|
||||
[ -n "$primary" ] && {
|
||||
echo 2
|
||||
return
|
||||
}
|
||||
|
||||
echo 1
|
||||
return
|
||||
}
|
||||
|
||||
echo 0
|
||||
return
|
||||
}
|
||||
|
||||
json_select ..
|
||||
done
|
||||
|
||||
echo 0
|
||||
}
|
||||
|
||||
is_dual_modem() {
|
||||
json_init
|
||||
json_load_file "/etc/board.json"
|
||||
|
||||
json_get_keys hwinfo hwinfo
|
||||
json_select hwinfo
|
||||
|
||||
json_get_vars dual_modem
|
||||
|
||||
[ "$dual_modem" = "1" ] && echo 1 || echo 0
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
|
@ -1,196 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
. /lib/functions.sh
|
||||
. /usr/share/libubox/jshn.sh
|
||||
|
||||
CFG_PATH="/etc/config/"
|
||||
|
||||
get_section_name() {
|
||||
local ___var="$1"
|
||||
[ "$#" -ge 1 ] && shift
|
||||
local ___type="$1"
|
||||
[ "$#" -ge 1 ] && shift
|
||||
local section cfgtype
|
||||
|
||||
[ -z "$CONFIG_SECTIONS" ] && return 0
|
||||
for section in ${CONFIG_SECTIONS}; do
|
||||
config_get cfgtype "$section" TYPE
|
||||
[ -n "$___type" -a "x$cfgtype" != "x$___type" ] && continue
|
||||
eval export "${___var}=\${section}"
|
||||
return 0
|
||||
done
|
||||
}
|
||||
|
||||
_set_option() {
|
||||
local option="$1"
|
||||
local value="$2"
|
||||
|
||||
uci_set "$_NEW_CONFIG" "$_NEW_SEC_NAME" "$option" "$value"
|
||||
}
|
||||
|
||||
_set_list_option() {
|
||||
local option="$1"
|
||||
local value="$2"
|
||||
|
||||
for element in $value; do
|
||||
uci_add_list "$_NEW_CONFIG" "$_NEW_SEC_NAME" "$option" "$element"
|
||||
done
|
||||
}
|
||||
|
||||
_del_uci_element() {
|
||||
local section="$1"
|
||||
local option="$2"
|
||||
|
||||
uci_remove "$_OLD_CONFIG" "$section" "$option"
|
||||
}
|
||||
_option_cond_cb() {
|
||||
local value=$3
|
||||
|
||||
json_select $2
|
||||
json_get_var old 1
|
||||
json_get_var new 2
|
||||
|
||||
[ "$old" = "$value" ] && _COND_VALUE="$new"
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
_parse_condition(){
|
||||
local value="$1"
|
||||
|
||||
_COND_VALUE=
|
||||
json_for_each_item _option_cond_cb "if" "$value"
|
||||
}
|
||||
|
||||
_option_rule_cb(){
|
||||
local rule="$1"
|
||||
local option="$2"
|
||||
local value
|
||||
|
||||
[ -n "$rule" ] || return 0
|
||||
|
||||
json_select "$option"
|
||||
json_get_vars new_name "if" default cb type
|
||||
|
||||
if [ -n "$cb" ]; then
|
||||
eval "$cb \"\$option\" \"\$_OLD_SEC_NAME\" \"\$_NEW_SEC_NAME\""
|
||||
[ "$?" -eq 0 ] && {
|
||||
json_select ..
|
||||
return 0
|
||||
}
|
||||
|
||||
value="$_OPTION_VALUE"
|
||||
else
|
||||
config_get value $_OLD_SEC_NAME "$option" "$default"
|
||||
fi
|
||||
|
||||
[ -n "$if" ] && {
|
||||
_parse_condition "$value"
|
||||
value="${_COND_VALUE:-${value:-$default}}"
|
||||
}
|
||||
|
||||
if [ -n "$type" -a "$type" = "list" ]; then
|
||||
_set_list_option "${new_name:-$option}" "$value"
|
||||
else
|
||||
_set_option "${new_name:-$option}" "$value"
|
||||
fi
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
_init_section() {
|
||||
local sec_t
|
||||
|
||||
json_get_vars old_name new_name new_type old_type
|
||||
[ -n "$old_name" -o -n "$old_type" ] || return 1
|
||||
|
||||
if [ -z "$old_name" ]; then
|
||||
get_section_name _OLD_SEC_NAME "$old_type"
|
||||
else
|
||||
_OLD_SEC_NAME=$old_name
|
||||
fi
|
||||
|
||||
_NEW_SEC_NAME=$new_name
|
||||
_OLD_SEC_TYPE=$old_type
|
||||
_NEW_SEC_TYPE=${new_type:-$old_type}
|
||||
[ -n "$_NEW_SEC_TYPE" ] || \
|
||||
eval "_NEW_SEC_TYPE=\$CONFIG_${_OLD_SEC_NAME}_TYPE"
|
||||
|
||||
if [ -n "$_NEW_SEC_NAME" ]; then
|
||||
uci set "$_NEW_CONFIG"."$_NEW_SEC_NAME"="$_NEW_SEC_TYPE"
|
||||
else
|
||||
_NEW_SEC_NAME="$(uci -q add "$_NEW_CONFIG" "$_NEW_SEC_TYPE")"
|
||||
fi
|
||||
|
||||
[ -n "$_NEW_SEC_NAME" ] || return 1
|
||||
}
|
||||
|
||||
_section_rule_cb(){
|
||||
local rule="$1"
|
||||
local section="$2"
|
||||
local value
|
||||
|
||||
[ -n "$rule" ] || return 0
|
||||
|
||||
json_select "$section"
|
||||
json_get_vars cb old_name new_name new_type old_type remove
|
||||
[ -n "$cb" ] && {
|
||||
eval "$cb \"\$old_name\" \"\$new_name\" \"\$old_type\" \"\$new_type\""
|
||||
[ "$?" -eq 0 ] && {
|
||||
json_select ..
|
||||
return 0
|
||||
}
|
||||
}
|
||||
|
||||
_init_section
|
||||
[ $? -ne 0 ] && {
|
||||
logger -t "Migration" "Unable to init section"
|
||||
json_select ..
|
||||
|
||||
return 1
|
||||
}
|
||||
|
||||
json_for_each_item _option_rule_cb options
|
||||
json_select ..
|
||||
[ -n "$remove" ] && {
|
||||
_del_uci_element "$old_name"
|
||||
uci_commit "$_OLD_CONFIG"
|
||||
}
|
||||
}
|
||||
|
||||
_init_config() {
|
||||
json_select config
|
||||
json_get_vars old_name new_name
|
||||
|
||||
[ -n "$old_name" ] || return 1
|
||||
[ -f "$CFG_PATH$old_name" ] || return 1
|
||||
[ -f "$CFG_PATH$new_name" ] || touch $CFG_PATH$new_name
|
||||
|
||||
config_load "$old_name"
|
||||
_NEW_CONFIG="${new_name:-$old_name}"
|
||||
_OLD_CONFIG="$old_name"
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
migrate() {
|
||||
local remove
|
||||
local json_file="$1"
|
||||
|
||||
[ -f "$json_file" ] || return 0
|
||||
|
||||
json_init
|
||||
json_load_file "$json_file"
|
||||
json_select
|
||||
_init_config
|
||||
[ $? -ne 0 ] && {
|
||||
logger -t "Migration" "Unable to load config"
|
||||
return 1
|
||||
}
|
||||
|
||||
json_for_each_item _section_rule_cb sections
|
||||
uci_commit "$_NEW_CONFIG"
|
||||
|
||||
json_get_vars remove
|
||||
[ -n "$remove" ] && rm "$CFG_PATH$_OLD_CONFIG"
|
||||
}
|
||||
|
|
@ -1,313 +0,0 @@
|
|||
# 1: destination variable
|
||||
# 2: interface
|
||||
# 3: path
|
||||
# 4: separator
|
||||
# 5: limit
|
||||
__network_ifstatus() {
|
||||
local __tmp
|
||||
|
||||
[ -z "$__NETWORK_CACHE" ] && {
|
||||
__tmp="$(ubus call network.interface dump 2>&1)"
|
||||
case "$?" in
|
||||
4) : ;;
|
||||
0) export __NETWORK_CACHE="$__tmp" ;;
|
||||
*) echo "$__tmp" >&2 ;;
|
||||
esac
|
||||
}
|
||||
|
||||
__tmp="$(jsonfilter ${4:+-F "$4"} ${5:+-l "$5"} -s "${__NETWORK_CACHE:-{}}" -e "$1=@.interface${2:+[@.interface='$2']}$3")"
|
||||
|
||||
[ -z "$__tmp" ] && \
|
||||
unset "$1" && \
|
||||
return 1
|
||||
|
||||
eval "$__tmp"
|
||||
}
|
||||
|
||||
# determine first IPv4 address of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_ipaddr() {
|
||||
__network_ifstatus "$1" "$2" "['ipv4-address'][0].address";
|
||||
}
|
||||
|
||||
# determine first IPv6 address of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_ipaddr6() {
|
||||
__network_ifstatus "$1" "$2" "['ipv6-address'][0].address" || \
|
||||
__network_ifstatus "$1" "$2" "['ipv6-prefix-assignment'][0]['local-address'].address" || \
|
||||
return 1
|
||||
}
|
||||
|
||||
# determine first IPv4 subnet of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_subnet() {
|
||||
__network_ifstatus "$1" "$2" "['ipv4-address'][0]['address','mask']" "/"
|
||||
}
|
||||
|
||||
# determine first IPv6 subnet of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_subnet6() {
|
||||
local __nets __addr
|
||||
|
||||
if network_get_subnets6 __nets "$2"; then
|
||||
# Attempt to return first non-fe80::/10, non-fc::/7 range
|
||||
for __addr in $__nets; do
|
||||
case "$__addr" in fe[8ab]?:*|f[cd]??:*)
|
||||
continue
|
||||
esac
|
||||
export "$1=$__addr"
|
||||
return 0
|
||||
done
|
||||
|
||||
# Attempt to return first non-fe80::/10 range
|
||||
for __addr in $__nets; do
|
||||
case "$__addr" in fe[8ab]?:*)
|
||||
continue
|
||||
esac
|
||||
export "$1=$__addr"
|
||||
return 0
|
||||
done
|
||||
|
||||
# Return first item
|
||||
for __addr in $__nets; do
|
||||
export "$1=$__addr"
|
||||
return 0
|
||||
done
|
||||
fi
|
||||
|
||||
unset "$1"
|
||||
return 1
|
||||
}
|
||||
|
||||
# determine first IPv6 prefix of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_prefix6() {
|
||||
__network_ifstatus "$1" "$2" "['ipv6-prefix'][0]['address','mask']" "/"
|
||||
}
|
||||
|
||||
# determine all IPv4 addresses of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_ipaddrs() {
|
||||
__network_ifstatus "$1" "$2" "['ipv4-address'][*].address"
|
||||
}
|
||||
|
||||
# determine all IPv6 addresses of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_ipaddrs6() {
|
||||
local __addr
|
||||
local __list=""
|
||||
|
||||
if __network_ifstatus "__addr" "$2" "['ipv6-address'][*].address"; then
|
||||
for __addr in $__addr; do
|
||||
__list="${__list:+$__list }${__addr}"
|
||||
done
|
||||
fi
|
||||
|
||||
if __network_ifstatus "__addr" "$2" "['ipv6-prefix-assignment'][*]['local-address'].address"; then
|
||||
for __addr in $__addr; do
|
||||
__list="${__list:+$__list }${__addr}"
|
||||
done
|
||||
fi
|
||||
|
||||
if [ -n "$__list" ]; then
|
||||
export "$1=$__list"
|
||||
return 0
|
||||
fi
|
||||
|
||||
unset "$1"
|
||||
return 1
|
||||
}
|
||||
|
||||
# determine all IP addresses of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_ipaddrs_all() {
|
||||
local __addr __addr6
|
||||
|
||||
network_get_ipaddrs __addr "$2"
|
||||
network_get_ipaddrs6 __addr6 "$2"
|
||||
|
||||
if [ -n "$__addr" -o -n "$__addr6" ]; then
|
||||
export "$1=${__addr:+$__addr }$__addr6"
|
||||
return 0
|
||||
fi
|
||||
|
||||
unset "$1"
|
||||
return 1
|
||||
}
|
||||
|
||||
# determine all IPv4 subnets of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_subnets() {
|
||||
__network_ifstatus "$1" "$2" "['ipv4-address'][*]['address','mask']" "/ "
|
||||
}
|
||||
|
||||
# determine all IPv6 subnets of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_subnets6() {
|
||||
local __addr __mask
|
||||
local __list=""
|
||||
|
||||
if __network_ifstatus "__addr" "$2" "['ipv6-address'][*]['address','mask']" "/ "; then
|
||||
for __addr in $__addr; do
|
||||
__list="${__list:+$__list }${__addr}"
|
||||
done
|
||||
fi
|
||||
|
||||
if __network_ifstatus "__addr" "$2" "['ipv6-prefix-assignment'][*]['local-address'].address" && \
|
||||
__network_ifstatus "__mask" "$2" "['ipv6-prefix-assignment'][*].mask"; then
|
||||
for __addr in $__addr; do
|
||||
__list="${__list:+$__list }${__addr}/${__mask%% *}"
|
||||
__mask="${__mask#* }"
|
||||
done
|
||||
fi
|
||||
|
||||
if [ -n "$__list" ]; then
|
||||
export "$1=$__list"
|
||||
return 0
|
||||
fi
|
||||
|
||||
unset "$1"
|
||||
return 1
|
||||
}
|
||||
|
||||
# determine all IPv6 prefixes of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_prefixes6() {
|
||||
__network_ifstatus "$1" "$2" "['ipv6-prefix'][*]['address','mask']" "/ "
|
||||
}
|
||||
|
||||
# determine IPv4 gateway of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
# 3: consider inactive gateway if "true" (optional)
|
||||
network_get_gateway() {
|
||||
__network_ifstatus "$1" "$2" ".route[@.target='0.0.0.0' && !@.table].nexthop" "" 1 && \
|
||||
return 0
|
||||
|
||||
[ "$3" = 1 -o "$3" = "true" ] && \
|
||||
__network_ifstatus "$1" "$2" ".inactive.route[@.target='0.0.0.0' && !@.table].nexthop" "" 1
|
||||
}
|
||||
|
||||
# determine IPv6 gateway of given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
# 3: consider inactive gateway if "true" (optional)
|
||||
network_get_gateway6() {
|
||||
__network_ifstatus "$1" "$2" ".route[@.target='::' && !@.table].nexthop" "" 1 && \
|
||||
return 0
|
||||
|
||||
[ "$3" = 1 -o "$3" = "true" ] && \
|
||||
__network_ifstatus "$1" "$2" ".inactive.route[@.target='::' && !@.table].nexthop" "" 1
|
||||
}
|
||||
|
||||
# determine the DNS servers of the given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
# 3: consider inactive servers if "true" (optional)
|
||||
network_get_dnsserver() {
|
||||
__network_ifstatus "$1" "$2" "['dns-server'][*]" && return 0
|
||||
|
||||
[ "$3" = 1 -o "$3" = "true" ] && \
|
||||
__network_ifstatus "$1" "$2" ".inactive['dns-server'][*]"
|
||||
}
|
||||
|
||||
# determine the domains of the given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
# 3: consider inactive domains if "true" (optional)
|
||||
network_get_dnssearch() {
|
||||
__network_ifstatus "$1" "$2" "['dns-search'][*]" && return 0
|
||||
|
||||
[ "$3" = 1 -o "$3" = "true" ] && \
|
||||
__network_ifstatus "$1" "$2" ".inactive['dns-search'][*]"
|
||||
}
|
||||
|
||||
# 1: destination variable
|
||||
# 2: addr
|
||||
# 3: inactive
|
||||
# 4: limit
|
||||
__network_wan()
|
||||
{
|
||||
limit=1
|
||||
[ -n "$4" ] && limit="$4"
|
||||
__network_ifstatus "$1" "" \
|
||||
"[@.route[@.target='$2' && !@.table]].interface" "" $limit && \
|
||||
return 0
|
||||
|
||||
[ "$3" = 1 -o "$3" = "true" ] && \
|
||||
__network_ifstatus "$1" "" \
|
||||
"[@.inactive.route[@.target='$2' && !@.table]].interface" "" $limit
|
||||
}
|
||||
|
||||
# find the logical interface which holds the current IPv4 default route
|
||||
# 1: destination variable
|
||||
# 2: consider inactive default routes if "true" (optional)
|
||||
network_find_wan() { __network_wan "$1" "0.0.0.0" "$2" "$3"; }
|
||||
|
||||
# find the logical interface which holds the current IPv6 default route
|
||||
# 1: destination variable
|
||||
# 2: consider inactive default routes if "true" (optional)
|
||||
network_find_wan6() { __network_wan "$1" "::" "$2"; }
|
||||
|
||||
# test whether the given logical interface is running
|
||||
# 1: interface
|
||||
network_is_up()
|
||||
{
|
||||
local __up
|
||||
__network_ifstatus "__up" "$1" ".up" && [ "$__up" = 1 ]
|
||||
}
|
||||
|
||||
# determine the protocol of the given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_protocol() { __network_ifstatus "$1" "$2" ".proto"; }
|
||||
|
||||
# determine the uptime of the given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_uptime() { __network_ifstatus "$1" "$2" ".uptime"; }
|
||||
|
||||
# determine the metric of the given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_metric() { __network_ifstatus "$1" "$2" ".metric"; }
|
||||
|
||||
# determine the layer 3 linux network device of the given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_device() { __network_ifstatus "$1" "$2" ".l3_device"; }
|
||||
|
||||
# determine the layer 2 linux network device of the given logical interface
|
||||
# 1: destination variable
|
||||
# 2: interface
|
||||
network_get_physdev() { __network_ifstatus "$1" "$2" ".device"; }
|
||||
|
||||
# defer netifd actions on the given linux network device
|
||||
# 1: device name
|
||||
network_defer_device()
|
||||
{
|
||||
ubus call network.device set_state \
|
||||
"$(printf '{ "name": "%s", "defer": true }' "$1")" 2>/dev/null
|
||||
}
|
||||
|
||||
# continue netifd actions on the given linux network device
|
||||
# 1: device name
|
||||
network_ready_device()
|
||||
{
|
||||
ubus call network.device set_state \
|
||||
"$(printf '{ "name": "%s", "defer": false }' "$1")" 2>/dev/null
|
||||
}
|
||||
|
||||
# flush the internal value cache to force re-reading values from ubus
|
||||
network_flush_cache() { unset __NETWORK_CACHE; }
|
||||
|
|
@ -1,143 +0,0 @@
|
|||
#!/bin/ash
|
||||
|
||||
. /lib/functions.sh
|
||||
. /usr/share/libubox/jshn.sh
|
||||
|
||||
ucidef_add_static_modem_info() {
|
||||
#Parameters: model usb_id sim_count other_params
|
||||
local model usb_id count
|
||||
local modem_counter=0
|
||||
local sim_count=1
|
||||
|
||||
model="$1"
|
||||
usb_id="$2"
|
||||
|
||||
[ -n "$3" ] && sim_count="$3"
|
||||
|
||||
json_get_keys count modems
|
||||
[ -n "$count" ] && modem_counter="$(echo "$count" | wc -w)"
|
||||
|
||||
json_select_array "modems"
|
||||
json_add_object
|
||||
json_add_string id "$usb_id"
|
||||
json_add_string num "$((modem_counter + 1))"
|
||||
json_add_boolean builtin 1
|
||||
json_add_int simcount "$sim_count"
|
||||
|
||||
for i in "$@"; do
|
||||
case "$i" in
|
||||
primary)
|
||||
json_add_boolean primary 1
|
||||
;;
|
||||
gps_out)
|
||||
json_add_boolean gps_out 1
|
||||
;;
|
||||
esac
|
||||
done
|
||||
|
||||
json_close_object
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_add_serial_capabilities() {
|
||||
json_select_array serial
|
||||
json_add_object
|
||||
[ -n "$1" ] && {
|
||||
json_select_array devices
|
||||
for d in $1; do
|
||||
json_add_string "" $d
|
||||
done
|
||||
json_select ..
|
||||
}
|
||||
|
||||
json_select_array bauds
|
||||
for b in $2; do
|
||||
json_add_string "" $b
|
||||
done
|
||||
json_select ..
|
||||
|
||||
json_select_array data_bits
|
||||
for n in $3; do
|
||||
json_add_string "" $n
|
||||
done
|
||||
json_select ..
|
||||
|
||||
json_select_array flow_control
|
||||
for n in $4; do
|
||||
json_add_string "" $n
|
||||
done
|
||||
json_select ..
|
||||
|
||||
json_select_array stop_bits
|
||||
for n in $5; do
|
||||
json_add_string "" $n
|
||||
done
|
||||
json_select ..
|
||||
|
||||
json_select_array parity_types
|
||||
for n in $6; do
|
||||
json_add_string "" $n
|
||||
done
|
||||
json_select ..
|
||||
|
||||
json_add_string "path" $7
|
||||
|
||||
json_close_object
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_add_wlan_bssid_limit() {
|
||||
json_select_object wlan
|
||||
json_add_object "$1"
|
||||
json_add_int bssid_limit "$2"
|
||||
json_close_object
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_hwinfo() {
|
||||
local args=" $* "
|
||||
local options='
|
||||
dual_sim
|
||||
at_sim
|
||||
wifi
|
||||
dual_band_ssid
|
||||
wps
|
||||
mobile
|
||||
gps
|
||||
usb
|
||||
poe
|
||||
bluetooth
|
||||
ethernet
|
||||
sfp_port
|
||||
ios
|
||||
sfp_switch
|
||||
rs232
|
||||
rs485
|
||||
console
|
||||
dual_modem
|
||||
sd_card
|
||||
sw_rst_on_init
|
||||
dsa
|
||||
hw_nat
|
||||
'
|
||||
|
||||
json_select_object hwinfo
|
||||
|
||||
for opt in $options; do
|
||||
if [[ "$args" =~ " $(echo "$opt" | tr -d '\011\012\015\040') " ]]; then
|
||||
json_add_boolean "$opt" 1
|
||||
else
|
||||
json_add_boolean "$opt" 0
|
||||
fi
|
||||
done
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_release_version() {
|
||||
json_add_string release_version "$1"
|
||||
}
|
||||
|
||||
ucidef_set_usb_jack() {
|
||||
json_add_string "usb_jack" "$1"
|
||||
}
|
||||
|
|
@ -1,68 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
. /usr/share/libubox/jshn.sh
|
||||
|
||||
is_ios_enabled() {
|
||||
local ios
|
||||
json_load_file "/etc/board.json" &&
|
||||
json_select hwinfo &&
|
||||
json_get_var ios ios && [ "$ios" = "1" ]
|
||||
}
|
||||
|
||||
# set_tty_options <device_path> <baudrate> <databits> <parity> <stopbits> <flowcontrol> <duplex> <echo>
|
||||
set_tty_options() {
|
||||
local PARITY_TMP=""
|
||||
local SBITS_TMP=""
|
||||
local FCTRL_TMP=""
|
||||
|
||||
case "$4" in
|
||||
"odd") PARITY_TMP="parenb parodd -cmspar" ;;
|
||||
"even") PARITY_TMP="parenb -parodd -cmspar" ;;
|
||||
"mark") PARITY_TMP="parenb parodd cmspar";;
|
||||
"space") PARITY_TMP="parenb -parodd cmspar";;
|
||||
*) PARITY_TMP="-parenb -parodd -cmspar" ;;
|
||||
esac
|
||||
|
||||
case "$5" in
|
||||
1) SBITS_TMP="-cstopb" ;;
|
||||
2) SBITS_TMP="cstopb" ;;
|
||||
*) SBITS_TMP="-cstopb" ;;
|
||||
esac
|
||||
|
||||
case "$6" in
|
||||
"none") FCTRL_TMP="-crtscts -ixon -ixoff" ;;
|
||||
"rts/cts") FCTRL_TMP="crtscts -ixon -ixoff" ;;
|
||||
"xon/xoff") FCTRL_TMP="-crtscts ixon ixoff" ;;
|
||||
*) FCTRL_TMP="-crtscts -ixon -ixoff" ;;
|
||||
esac
|
||||
|
||||
case "$7" in
|
||||
0 | 1)
|
||||
echo "$7" >/sys/class/gpio/rs485_rx_en/value
|
||||
;;
|
||||
esac
|
||||
|
||||
if [ "$8" == "1" ]; then
|
||||
FCTRL_TMP="$FCTRL_TMP echo"
|
||||
else
|
||||
FCTRL_TMP="$FCTRL_TMP -echo"
|
||||
fi
|
||||
|
||||
local stty_retries=0
|
||||
while ! stty -F "$1" "$2" cs"$3" $PARITY_TMP "$SBITS_TMP" $FCTRL_TMP; do
|
||||
if [ $stty_retries -lt 5 ]; then
|
||||
stty_retries=$((stty_retries + 1))
|
||||
echo "stty was unable to set all the parameters, retrying in 10 seconds"
|
||||
sleep 10
|
||||
else
|
||||
echo "stty failed, continuing anyway"
|
||||
break
|
||||
fi
|
||||
done
|
||||
}
|
||||
|
||||
to_lower() {
|
||||
tr '[A-Z]' '[a-z]' <<-EOF
|
||||
$@
|
||||
EOF
|
||||
}
|
||||
|
|
@ -1,726 +0,0 @@
|
|||
#!/bin/ash
|
||||
|
||||
. /lib/functions.sh
|
||||
. /usr/share/libubox/jshn.sh
|
||||
|
||||
json_select_array() {
|
||||
local _json_no_warning=1
|
||||
|
||||
json_select "$1"
|
||||
[ $? = 0 ] && return
|
||||
|
||||
json_add_array "$1"
|
||||
json_close_array
|
||||
|
||||
json_select "$1"
|
||||
}
|
||||
|
||||
json_select_object() {
|
||||
local _json_no_warning=1
|
||||
|
||||
json_select "$1"
|
||||
[ $? = 0 ] && return
|
||||
|
||||
json_add_object "$1"
|
||||
json_close_object
|
||||
|
||||
json_select "$1"
|
||||
}
|
||||
|
||||
ucidef_set_interface() {
|
||||
local network=$1; shift
|
||||
|
||||
[ -z "$network" ] && return
|
||||
|
||||
json_select_object network
|
||||
json_select_object "$network"
|
||||
|
||||
while [ -n "$1" ]; do
|
||||
local opt=$1; shift
|
||||
local val=$1; shift
|
||||
|
||||
[ -n "$opt" -a -n "$val" ] || break
|
||||
|
||||
[ "$opt" = "device" -a "$val" != "${val/ //}" ] && {
|
||||
json_select_array "ports"
|
||||
for e in $val; do json_add_string "" "$e"; done
|
||||
json_close_array
|
||||
} || {
|
||||
json_add_string "$opt" "$val"
|
||||
}
|
||||
done
|
||||
|
||||
if ! json_is_a proto string; then
|
||||
case "$network" in
|
||||
lan) json_add_string proto static ;;
|
||||
wan) json_add_string proto dhcp ;;
|
||||
*) json_add_string proto none ;;
|
||||
esac
|
||||
fi
|
||||
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_interface_default_macaddr() {
|
||||
local network="$1" ifname
|
||||
|
||||
json_select_object 'network'
|
||||
json_select_object "$network"
|
||||
if json_is_a ports array; then
|
||||
json_select_array 'ports'
|
||||
json_get_keys port_id
|
||||
for i in $port_id; do
|
||||
json_get_var port "$i"
|
||||
ifname="${ifname} $port"
|
||||
done
|
||||
json_select ..
|
||||
else
|
||||
json_get_var ifname 'device'
|
||||
fi
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
for i in $ifname; do
|
||||
local macaddr="$2"; shift
|
||||
[ -n "$macaddr" ] || break
|
||||
json_select_object 'network-device'
|
||||
json_select_object "$i"
|
||||
json_add_string 'macaddr' "$macaddr"
|
||||
json_select ..
|
||||
json_select ..
|
||||
done
|
||||
}
|
||||
|
||||
ucidef_set_board_id() {
|
||||
json_select_object model
|
||||
json_add_string id "$1"
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_board_platform() {
|
||||
json_select_object model
|
||||
json_add_string platform "$1"
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_model_name() {
|
||||
json_select_object model
|
||||
json_add_string name "$1"
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_compat_version() {
|
||||
json_select_object system
|
||||
json_add_string compat_version "${1:-1.0}"
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_interface_lan() {
|
||||
ucidef_set_interface "lan" device "$1" proto "${2:-static}"
|
||||
}
|
||||
|
||||
ucidef_set_interface_wan() {
|
||||
ucidef_set_interface "wan" device "$1" proto "${2:-dhcp}"
|
||||
}
|
||||
|
||||
ucidef_set_interfaces_lan_wan() {
|
||||
local lan_if="$1"
|
||||
local wan_if="$2"
|
||||
|
||||
ucidef_set_interface_lan "$lan_if"
|
||||
ucidef_set_interface_wan "$wan_if"
|
||||
}
|
||||
|
||||
_ucidef_add_switch_port() {
|
||||
# inherited: $num $device $need_tag $want_untag $role $index $prev_role
|
||||
# inherited: $n_cpu $n_ports $n_vlan $cpu0 $cpu1 $cpu2 $cpu3 $cpu4 $cpu5
|
||||
|
||||
n_ports=$((n_ports + 1))
|
||||
|
||||
json_select_array ports
|
||||
json_add_object
|
||||
json_add_int num "$num"
|
||||
[ -n "$device" ] && json_add_string device "$device"
|
||||
[ -n "$need_tag" ] && json_add_boolean need_tag "$need_tag"
|
||||
[ -n "$want_untag" ] && json_add_boolean want_untag "$want_untag"
|
||||
[ -n "$role" ] && json_add_string role "$role"
|
||||
[ -n "$index" ] && json_add_int index "$index"
|
||||
json_close_object
|
||||
json_select ..
|
||||
|
||||
# record pointer to cpu entry for lookup in _ucidef_finish_switch_roles()
|
||||
[ -n "$device" ] && {
|
||||
export "cpu$n_cpu=$n_ports"
|
||||
n_cpu=$((n_cpu + 1))
|
||||
}
|
||||
|
||||
# create/append object to role list
|
||||
[ -n "$role" ] && {
|
||||
json_select_array roles
|
||||
|
||||
if [ "$role" != "$prev_role" ]; then
|
||||
json_add_object
|
||||
json_add_string role "$role"
|
||||
json_add_string ports "$num"
|
||||
json_close_object
|
||||
|
||||
prev_role="$role"
|
||||
n_vlan=$((n_vlan + 1))
|
||||
else
|
||||
json_select_object "$n_vlan"
|
||||
json_get_var port ports
|
||||
json_add_string ports "$port $num"
|
||||
json_select ..
|
||||
fi
|
||||
|
||||
json_select ..
|
||||
}
|
||||
}
|
||||
|
||||
_ucidef_finish_switch_roles() {
|
||||
# inherited: $name $n_cpu $n_vlan $cpu0 $cpu1 $cpu2 $cpu3 $cpu4 $cpu5
|
||||
local index role roles num device need_tag want_untag port ports
|
||||
|
||||
json_select switch
|
||||
json_select "$name"
|
||||
json_get_keys roles roles
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
for index in $roles; do
|
||||
eval "port=\$cpu$(((index - 1) % n_cpu))"
|
||||
|
||||
json_select switch
|
||||
json_select "$name"
|
||||
json_select ports
|
||||
json_select "$port"
|
||||
json_get_vars num device need_tag want_untag
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
if [ ${need_tag:-0} -eq 1 -o ${want_untag:-0} -ne 1 ]; then
|
||||
num="${num}t"
|
||||
device="${device}.${index}"
|
||||
fi
|
||||
|
||||
json_select roles
|
||||
json_select "$index"
|
||||
json_get_vars role ports
|
||||
json_add_string ports "$ports $num"
|
||||
json_add_string device "$device"
|
||||
json_select ..
|
||||
json_select ..
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
json_select_object network
|
||||
local devices
|
||||
|
||||
json_select_object "$role"
|
||||
# attach previous interfaces (for multi-switch devices)
|
||||
json_get_var devices device
|
||||
if ! list_contains devices "$device"; then
|
||||
devices="${devices:+$devices }$device"
|
||||
fi
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
ucidef_set_interface "$role" device "$devices"
|
||||
done
|
||||
}
|
||||
|
||||
ucidef_set_ar8xxx_switch_mib() {
|
||||
local name="$1"
|
||||
local type="$2"
|
||||
local interval="$3"
|
||||
|
||||
json_select_object switch
|
||||
json_select_object "$name"
|
||||
json_add_int ar8xxx_mib_type $type
|
||||
json_add_int ar8xxx_mib_poll_interval $interval
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_add_switch() {
|
||||
local enabled=1
|
||||
if [ "$1" = "enabled" ]; then
|
||||
shift
|
||||
enabled="$1"
|
||||
shift
|
||||
fi
|
||||
|
||||
local name="$1"; shift
|
||||
local port num role device index need_tag prev_role
|
||||
local cpu0 cpu1 cpu2 cpu3 cpu4 cpu5
|
||||
local n_cpu=0 n_vlan=0 n_ports=0
|
||||
|
||||
json_select_object switch
|
||||
json_select_object "$name"
|
||||
json_add_boolean enable "$enabled"
|
||||
json_add_boolean reset 1
|
||||
|
||||
for port in "$@"; do
|
||||
case "$port" in
|
||||
[0-9]*@*)
|
||||
num="${port%%@*}"
|
||||
device="${port##*@}"
|
||||
need_tag=0
|
||||
want_untag=0
|
||||
[ "${num%t}" != "$num" ] && {
|
||||
num="${num%t}"
|
||||
need_tag=1
|
||||
}
|
||||
[ "${num%u}" != "$num" ] && {
|
||||
num="${num%u}"
|
||||
want_untag=1
|
||||
}
|
||||
;;
|
||||
[0-9]*:*:[0-9]*)
|
||||
num="${port%%:*}"
|
||||
index="${port##*:}"
|
||||
role="${port#[0-9]*:}"; role="${role%:*}"
|
||||
;;
|
||||
[0-9]*:*)
|
||||
num="${port%%:*}"
|
||||
role="${port##*:}"
|
||||
;;
|
||||
esac
|
||||
|
||||
if [ -n "$num" ] && [ -n "$device$role" ]; then
|
||||
_ucidef_add_switch_port
|
||||
fi
|
||||
|
||||
unset num device role index need_tag want_untag
|
||||
done
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
_ucidef_finish_switch_roles
|
||||
}
|
||||
|
||||
ucidef_add_switch_attr() {
|
||||
local name="$1"
|
||||
local key="$2"
|
||||
local val="$3"
|
||||
|
||||
json_select_object switch
|
||||
json_select_object "$name"
|
||||
|
||||
case "$val" in
|
||||
true|false) [ "$val" != "true" ]; json_add_boolean "$key" $? ;;
|
||||
[0-9]) json_add_int "$key" "$val" ;;
|
||||
*) json_add_string "$key" "$val" ;;
|
||||
esac
|
||||
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_add_switch_port_attr() {
|
||||
local name="$1"
|
||||
local port="$2"
|
||||
local key="$3"
|
||||
local val="$4"
|
||||
local ports i num
|
||||
|
||||
json_select_object switch
|
||||
json_select_object "$name"
|
||||
|
||||
json_get_keys ports ports
|
||||
json_select_array ports
|
||||
|
||||
for i in $ports; do
|
||||
json_select "$i"
|
||||
json_get_var num num
|
||||
|
||||
if [ -n "$num" ] && [ $num -eq $port ]; then
|
||||
json_select_object attr
|
||||
|
||||
case "$val" in
|
||||
true|false) [ "$val" != "true" ]; json_add_boolean "$key" $? ;;
|
||||
[0-9]) json_add_int "$key" "$val" ;;
|
||||
*) json_add_string "$key" "$val" ;;
|
||||
esac
|
||||
|
||||
json_select ..
|
||||
fi
|
||||
|
||||
json_select ..
|
||||
done
|
||||
|
||||
json_select ..
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_interface_macaddr() {
|
||||
local network="$1"
|
||||
local macaddr="$2"
|
||||
|
||||
ucidef_set_interface "$network" macaddr "$macaddr"
|
||||
}
|
||||
|
||||
ucidef_add_atm_bridge() {
|
||||
local vpi="$1"
|
||||
local vci="$2"
|
||||
local encaps="$3"
|
||||
local payload="$4"
|
||||
local nameprefix="$5"
|
||||
|
||||
json_select_object dsl
|
||||
json_select_object atmbridge
|
||||
json_add_int vpi "$vpi"
|
||||
json_add_int vci "$vci"
|
||||
json_add_string encaps "$encaps"
|
||||
json_add_string payload "$payload"
|
||||
json_add_string nameprefix "$nameprefix"
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_add_adsl_modem() {
|
||||
local annex="$1"
|
||||
local firmware="$2"
|
||||
|
||||
json_select_object dsl
|
||||
json_select_object modem
|
||||
json_add_string type "adsl"
|
||||
json_add_string annex "$annex"
|
||||
json_add_string firmware "$firmware"
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_add_vdsl_modem() {
|
||||
local annex="$1"
|
||||
local tone="$2"
|
||||
local xfer_mode="$3"
|
||||
|
||||
json_select_object dsl
|
||||
json_select_object modem
|
||||
json_add_string type "vdsl"
|
||||
json_add_string annex "$annex"
|
||||
json_add_string tone "$tone"
|
||||
json_add_string xfer_mode "$xfer_mode"
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_led_ataport() {
|
||||
_ucidef_set_led_trigger "$1" "$2" "$3" ata"$4"
|
||||
}
|
||||
|
||||
_ucidef_set_led_common() {
|
||||
local cfg="led_$1"
|
||||
local name="$2"
|
||||
local sysfs="$3"
|
||||
|
||||
json_select_object led
|
||||
|
||||
json_select_object "$1"
|
||||
json_add_string name "$name"
|
||||
json_add_string sysfs "$sysfs"
|
||||
}
|
||||
|
||||
ucidef_set_led_default() {
|
||||
local default="$4"
|
||||
|
||||
_ucidef_set_led_common "$1" "$2" "$3"
|
||||
|
||||
json_add_string default "$default"
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_led_gpio() {
|
||||
local gpio="$4"
|
||||
local inverted="$5"
|
||||
|
||||
_ucidef_set_led_common "$1" "$2" "$3"
|
||||
|
||||
json_add_string trigger "$trigger"
|
||||
json_add_string type gpio
|
||||
json_add_int gpio "$gpio"
|
||||
json_add_boolean inverted "$inverted"
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_led_ide() {
|
||||
_ucidef_set_led_trigger "$1" "$2" "$3" disk-activity
|
||||
}
|
||||
|
||||
ucidef_set_led_netdev() {
|
||||
local dev="$4"
|
||||
local mode="${5:-link tx rx}"
|
||||
|
||||
_ucidef_set_led_common "$1" "$2" "$3"
|
||||
|
||||
json_add_string type netdev
|
||||
json_add_string device "$dev"
|
||||
json_add_string mode "$mode"
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_led_oneshot() {
|
||||
_ucidef_set_led_timer $1 $2 $3 "oneshot" $4 $5
|
||||
}
|
||||
|
||||
ucidef_set_led_portstate() {
|
||||
local port_state="$4"
|
||||
|
||||
_ucidef_set_led_common "$1" "$2" "$3"
|
||||
|
||||
json_add_string trigger port_state
|
||||
json_add_string type portstate
|
||||
json_add_string port_state "$port_state"
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_led_rssi() {
|
||||
local iface="$4"
|
||||
local minq="$5"
|
||||
local maxq="$6"
|
||||
local offset="${7:-0}"
|
||||
local factor="${8:-1}"
|
||||
|
||||
_ucidef_set_led_common "$1" "$2" "$3"
|
||||
|
||||
json_add_string type rssi
|
||||
json_add_string name "$name"
|
||||
json_add_string iface "$iface"
|
||||
json_add_string minq "$minq"
|
||||
json_add_string maxq "$maxq"
|
||||
json_add_string offset "$offset"
|
||||
json_add_string factor "$factor"
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_led_switch() {
|
||||
local trigger_name="$4"
|
||||
local port_mask="$5"
|
||||
local speed_mask="$6"
|
||||
local mode="$7"
|
||||
|
||||
_ucidef_set_led_common "$1" "$2" "$3"
|
||||
|
||||
json_add_string trigger "$trigger_name"
|
||||
json_add_string type switch
|
||||
json_add_string mode "$mode"
|
||||
json_add_string port_mask "$port_mask"
|
||||
json_add_string speed_mask "$speed_mask"
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
_ucidef_set_led_timer() {
|
||||
local trigger_name="$4"
|
||||
local delayon="$5"
|
||||
local delayoff="$6"
|
||||
|
||||
_ucidef_set_led_common "$1" "$2" "$3"
|
||||
|
||||
json_add_string type "$trigger_name"
|
||||
json_add_string trigger "$trigger_name"
|
||||
json_add_int delayon "$delayon"
|
||||
json_add_int delayoff "$delayoff"
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_led_timer() {
|
||||
_ucidef_set_led_timer $1 $2 $3 "timer" $4 $5
|
||||
}
|
||||
|
||||
_ucidef_set_led_trigger() {
|
||||
local trigger_name="$4"
|
||||
|
||||
_ucidef_set_led_common "$1" "$2" "$3"
|
||||
|
||||
json_add_string trigger "$trigger_name"
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_led_usbdev() {
|
||||
local dev="$4"
|
||||
|
||||
_ucidef_set_led_common "$1" "$2" "$3"
|
||||
|
||||
json_add_string type usb
|
||||
json_add_string device "$dev"
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_led_usbhost() {
|
||||
_ucidef_set_led_trigger "$1" "$2" "$3" usb-host
|
||||
}
|
||||
|
||||
ucidef_set_led_usbport() {
|
||||
local obj="$1"
|
||||
local name="$2"
|
||||
local sysfs="$3"
|
||||
shift
|
||||
shift
|
||||
shift
|
||||
|
||||
_ucidef_set_led_common "$obj" "$name" "$sysfs"
|
||||
|
||||
json_add_string type usbport
|
||||
json_select_array ports
|
||||
for port in "$@"; do
|
||||
json_add_string port "$port"
|
||||
done
|
||||
json_select ..
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_led_wlan() {
|
||||
_ucidef_set_led_trigger "$1" "$2" "$3" "$4"
|
||||
}
|
||||
|
||||
ucidef_set_rssimon() {
|
||||
local dev="$1"
|
||||
local refresh="$2"
|
||||
local threshold="$3"
|
||||
|
||||
json_select_object rssimon
|
||||
|
||||
json_select_object "$dev"
|
||||
[ -n "$refresh" ] && json_add_int refresh "$refresh"
|
||||
[ -n "$threshold" ] && json_add_int threshold "$threshold"
|
||||
json_select ..
|
||||
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_add_gpio_switch() {
|
||||
local cfg="$1"
|
||||
local name="$2"
|
||||
local pin="$3"
|
||||
local default="${4:-0}"
|
||||
|
||||
json_select_object gpioswitch
|
||||
json_select_object "$cfg"
|
||||
json_add_string name "$name"
|
||||
json_add_int pin "$pin"
|
||||
json_add_int default "$default"
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_hostname() {
|
||||
local hostname="$1"
|
||||
|
||||
json_select_object system
|
||||
json_add_string hostname "$hostname"
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_ntpserver() {
|
||||
local server
|
||||
|
||||
json_select_object system
|
||||
json_select_array ntpserver
|
||||
for server in "$@"; do
|
||||
json_add_string "" "$server"
|
||||
done
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
ucidef_set_network_options() {
|
||||
json_add_object "network_options"
|
||||
n=$#
|
||||
|
||||
for i in $(seq $((n / 2))); do
|
||||
opt="$1"
|
||||
val="$2"
|
||||
|
||||
if [ "$val" -eq "$val" ] 2>/dev/null; then
|
||||
json_add_int "$opt" "$val"
|
||||
else
|
||||
[ "$val" = "true" ] && val=1 || val=0
|
||||
json_add_boolean "$opt" "$val"
|
||||
fi
|
||||
shift; shift
|
||||
done
|
||||
json_close_object
|
||||
}
|
||||
|
||||
ucidef_set_poe() {
|
||||
json_add_object poe
|
||||
json_add_int "chip_count" "$1"
|
||||
json_add_int "budget" "$2"
|
||||
json_add_int "poe_ports" "$3"
|
||||
shift 3
|
||||
json_add_array ports
|
||||
while [ $# -gt 0 ]
|
||||
do
|
||||
json_add_object ""
|
||||
json_add_string "name" "$1"
|
||||
json_add_string "class" "$2"
|
||||
json_add_int "budget" "$3"
|
||||
json_close_object
|
||||
shift 3
|
||||
done
|
||||
json_close_array
|
||||
json_add_array poe_chips
|
||||
json_close_array
|
||||
json_close_object
|
||||
}
|
||||
|
||||
ucidef_set_poe_chip() {
|
||||
json_select_object poe
|
||||
json_select_array poe_chips
|
||||
json_add_object ""
|
||||
for port in "$@"; do
|
||||
case "$port" in
|
||||
0X*)
|
||||
json_add_string address "$port"
|
||||
;;
|
||||
[0-9]:*)
|
||||
json_add_string chan"${port%%:*}" "${port##*:}"
|
||||
;;
|
||||
esac
|
||||
done
|
||||
json_close_object
|
||||
json_select ..
|
||||
json_select ..
|
||||
}
|
||||
|
||||
board_config_update() {
|
||||
json_init
|
||||
[ -f ${CFG} ] && json_load "$(cat ${CFG})"
|
||||
|
||||
# auto-initialize model id and name if applicable
|
||||
if ! json_is_a model object; then
|
||||
json_select_object model
|
||||
[ -f "/tmp/sysinfo/board_name" ] && \
|
||||
json_add_string id "$(cat /tmp/sysinfo/board_name)"
|
||||
[ -f "/tmp/sysinfo/model" ] && \
|
||||
json_add_string name "$(cat /tmp/sysinfo/model)"
|
||||
json_select ..
|
||||
fi
|
||||
}
|
||||
|
||||
board_config_flush() {
|
||||
json_dump -i -o ${CFG}
|
||||
}
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
set_state() {
|
||||
local label="$1"
|
||||
local disable
|
||||
|
||||
[ -e "/sys/class/gpio/${label}_power/value" ] || return
|
||||
|
||||
config_get disable ${label} disable
|
||||
|
||||
[ "${disable}" -eq 1 ] && \
|
||||
/sbin/mctl -s -m "${label}" -c || \
|
||||
/sbin/mctl -p -m "${label}" -c
|
||||
}
|
||||
|
||||
do_power_modem() {
|
||||
[ -f /etc/board.json ] || return
|
||||
|
||||
[ -z "$(uci -q get system.modem.disable)" ] && /sbin/mctl -p -a -c || {
|
||||
config_load system
|
||||
config_foreach set_state mctl
|
||||
}
|
||||
}
|
||||
|
||||
boot_hook_add preinit_main do_power_modem
|
||||
|
|
@ -1,383 +0,0 @@
|
|||
find_mmc_part() {
|
||||
local DEVNAME PARTNAME
|
||||
|
||||
if grep -q "$1" /proc/mtd; then
|
||||
echo "" && return 0
|
||||
fi
|
||||
|
||||
for DEVNAME in /sys/block/mmcblk0/mmcblk*p*; do
|
||||
PARTNAME=$(grep PARTNAME ${DEVNAME}/uevent | cut -f2 -d'=')
|
||||
[ "$PARTNAME" = "$1" ] && echo "/dev/$(basename $DEVNAME)" && return 0
|
||||
done
|
||||
}
|
||||
|
||||
get_full_section_name() {
|
||||
local img=$1
|
||||
local sec=$2
|
||||
|
||||
dumpimage -l ${img} | grep "^ Image.*(${sec})" | \
|
||||
sed 's,^ Image.*(\(.*\)),\1,'
|
||||
}
|
||||
|
||||
image_contains() {
|
||||
local img=$1
|
||||
local sec=$2
|
||||
dumpimage -l ${img} | grep -q "^ Image.*(${sec}.*)" || return 1
|
||||
}
|
||||
|
||||
print_sections() {
|
||||
local img=$1
|
||||
|
||||
dumpimage -l ${img} | awk '/^ Image.*(.*)/ { print gensub(/Image .* \((.*)\)/,"\\1", $0) }'
|
||||
}
|
||||
|
||||
image_has_mandatory_section() {
|
||||
local img=$1
|
||||
local mandatory_sections=$2
|
||||
|
||||
for sec in ${mandatory_sections}; do
|
||||
image_contains $img ${sec} || {\
|
||||
return 1
|
||||
}
|
||||
done
|
||||
}
|
||||
|
||||
image_demux() {
|
||||
local img=$1
|
||||
|
||||
for sec in $(print_sections ${img}); do
|
||||
local fullname=$(get_full_section_name ${img} ${sec})
|
||||
|
||||
local position=$(dumpimage -l ${img} | grep "(${fullname})" | awk '{print $2}')
|
||||
dumpimage -i ${img} -o /tmp/${fullname}.bin -T "flat_dt" -p "${position}" ${fullname} > /dev/null || { \
|
||||
echo "Error while extracting \"${sec}\" from ${img}"
|
||||
return 1
|
||||
}
|
||||
done
|
||||
return 0
|
||||
}
|
||||
|
||||
image_is_FIT() {
|
||||
if ! dumpimage -l $1 > /dev/null 2>&1; then
|
||||
echo "$1 is not a valid FIT image"
|
||||
return 1
|
||||
fi
|
||||
return 0
|
||||
}
|
||||
|
||||
switch_layout() {
|
||||
local layout=$1
|
||||
local boot_layout=`find / -name boot_layout`
|
||||
|
||||
# Layout switching is only required as the boot images (up to u-boot)
|
||||
# use 512 user data bytes per code word, whereas Linux uses 516 bytes.
|
||||
# It's only applicable for NAND flash. So let's return if we don't have
|
||||
# one.
|
||||
|
||||
[ -n "$boot_layout" ] || return
|
||||
|
||||
case "${layout}" in
|
||||
boot|1) echo 1 > $boot_layout;;
|
||||
linux|0) echo 0 > $boot_layout;;
|
||||
*) echo "Unknown layout \"${layout}\"";;
|
||||
esac
|
||||
}
|
||||
|
||||
do_flash_mtd() {
|
||||
local bin=$1
|
||||
local mtdname=$2
|
||||
local append=""
|
||||
|
||||
local mtdpart=$(grep "\"${mtdname}\"" /proc/mtd | awk -F: '{print $1}')
|
||||
local pgsz=$(cat /sys/class/mtd/${mtdpart}/writesize)
|
||||
[ -f "$CONF_TAR" -a "$SAVE_CONFIG" -eq 1 -a "$2" == "rootfs" ] && append="-j $CONF_TAR"
|
||||
|
||||
dd if=/tmp/${bin}.bin bs=${pgsz} conv=sync | mtd $append -e "/dev/${mtdpart}" write - "/dev/${mtdpart}"
|
||||
}
|
||||
|
||||
do_flash_emmc() {
|
||||
local bin=$1
|
||||
local emmcblock=$2
|
||||
|
||||
dd if=/dev/zero of=${emmcblock}
|
||||
dd if=/tmp/${bin}.bin of=${emmcblock}
|
||||
}
|
||||
|
||||
do_flash_partition() {
|
||||
local bin=$1
|
||||
local mtdname=$2
|
||||
local emmcblock="$(find_mmc_part "$mtdname")"
|
||||
|
||||
if [ -e "$emmcblock" ]; then
|
||||
do_flash_emmc $bin $emmcblock
|
||||
else
|
||||
do_flash_mtd $bin $mtdname
|
||||
fi
|
||||
}
|
||||
|
||||
do_flash_bootconfig() {
|
||||
local bin=$1
|
||||
local mtdname=$2
|
||||
|
||||
# Fail safe upgrade
|
||||
if [ -f /proc/boot_info/getbinary_${bin} ]; then
|
||||
cat /proc/boot_info/getbinary_${bin} > /tmp/${bin}.bin
|
||||
do_flash_partition $bin $mtdname
|
||||
fi
|
||||
}
|
||||
|
||||
do_flash_failsafe_partition() {
|
||||
local bin=$1
|
||||
local mtdname=$2
|
||||
local emmcblock
|
||||
local primaryboot
|
||||
|
||||
# Fail safe upgrade
|
||||
[ -f /proc/boot_info/$mtdname/upgradepartition ] && {
|
||||
default_mtd=$mtdname
|
||||
mtdname=$(cat /proc/boot_info/$mtdname/upgradepartition)
|
||||
primaryboot=$(cat /proc/boot_info/$default_mtd/primaryboot)
|
||||
if [ $primaryboot -eq 0 ]; then
|
||||
echo 1 > /proc/boot_info/$default_mtd/primaryboot
|
||||
else
|
||||
echo 0 > /proc/boot_info/$default_mtd/primaryboot
|
||||
fi
|
||||
}
|
||||
|
||||
emmcblock="$(find_mmc_part "$mtdname")"
|
||||
|
||||
if [ -e "$emmcblock" ]; then
|
||||
do_flash_emmc $bin $emmcblock
|
||||
else
|
||||
do_flash_mtd $bin $mtdname
|
||||
fi
|
||||
|
||||
}
|
||||
|
||||
do_flash_ubi() {
|
||||
local bin=$1
|
||||
local mtdname=$2
|
||||
local mtdpart
|
||||
local primaryboot
|
||||
|
||||
mtdpart=$(grep "\"${mtdname}\"" /proc/mtd | awk -F: '{print $1}')
|
||||
ubidetach -p /dev/${mtdpart}
|
||||
|
||||
# Fail safe upgrade
|
||||
[ -f /proc/boot_info/$mtdname/upgradepartition ] && {
|
||||
primaryboot=$(cat /proc/boot_info/$mtdname/primaryboot)
|
||||
if [ $primaryboot -eq 0 ]; then
|
||||
echo 1 > /proc/boot_info/$mtdname/primaryboot
|
||||
else
|
||||
echo 0 > /proc/boot_info/$mtdname/primaryboot
|
||||
fi
|
||||
|
||||
mtdname=$(cat /proc/boot_info/$mtdname/upgradepartition)
|
||||
}
|
||||
|
||||
mtdpart=$(grep "\"${mtdname}\"" /proc/mtd | awk -F: '{print $1}')
|
||||
ubiformat /dev/${mtdpart} -y -f /tmp/${bin}.bin
|
||||
}
|
||||
|
||||
do_flash_tz() {
|
||||
local sec=$1
|
||||
local mtdpart=$(grep "\"0:QSEE\"" /proc/mtd | awk -F: '{print $1}')
|
||||
local emmcblock="$(find_mmc_part "0:QSEE")"
|
||||
|
||||
if [ -n "$mtdpart" -o -e "$emmcblock" ]; then
|
||||
do_flash_failsafe_partition ${sec} "0:QSEE"
|
||||
else
|
||||
do_flash_failsafe_partition ${sec} "0:TZ"
|
||||
fi
|
||||
}
|
||||
|
||||
do_flash_ddr() {
|
||||
local sec=$1
|
||||
local mtdpart=$(grep "\"0:CDT\"" /proc/mtd | awk -F: '{print $1}')
|
||||
local emmcblock="$(find_mmc_part "0:CDT")"
|
||||
|
||||
if [ -n "$mtdpart" -o -e "$emmcblock" ]; then
|
||||
do_flash_failsafe_partition ${sec} "0:CDT"
|
||||
else
|
||||
do_flash_failsafe_partition ${sec} "0:DDRPARAMS"
|
||||
fi
|
||||
}
|
||||
|
||||
to_upper () {
|
||||
echo $1 | awk '{print toupper($0)}'
|
||||
}
|
||||
|
||||
flash_section() {
|
||||
local sec=$1
|
||||
|
||||
local board=$(board_name)
|
||||
case "${sec}" in
|
||||
hlos*) switch_layout linux; do_flash_failsafe_partition ${sec} "0:HLOS";;
|
||||
rootfs*) switch_layout linux; do_flash_failsafe_partition ${sec} "rootfs";;
|
||||
fs*) switch_layout linux; do_flash_failsafe_partition ${sec} "rootfs";;
|
||||
ubi*) switch_layout linux; do_flash_ubi ${sec} "rootfs";;
|
||||
#sbl1*) switch_layout boot; do_flash_partition ${sec} "0:SBL1";;
|
||||
#sbl2*) switch_layout boot; do_flash_failsafe_partition ${sec} "0:SBL2";;
|
||||
#sbl3*) switch_layout boot; do_flash_failsafe_partition ${sec} "0:SBL3";;
|
||||
#mibib*) switch_layout boot; do_flash_partition ${sec} "0:MIBIB";;
|
||||
#dtb-$(to_upper $board)*) switch_layout boot; do_flash_partition ${sec} "0:DTB";;
|
||||
u-boot*) switch_layout boot; do_flash_failsafe_partition ${sec} "0:APPSBL";;
|
||||
#ddr-$(to_upper $board)*) switch_layout boot; do_flash_ddr ${sec};;
|
||||
ddr-${board}-*) switch_layout boot; do_flash_failsafe_partition ${sec} "0:CDT";;
|
||||
#ssd*) switch_layout boot; do_flash_partition ${sec} "0:SSD";;
|
||||
tz*) switch_layout boot; do_flash_tz ${sec};;
|
||||
#rpm*) switch_layout boot; do_flash_failsafe_partition ${sec} "0:RPM";;
|
||||
*) echo "Section ${sec} ignored"; return 1;;
|
||||
esac
|
||||
|
||||
echo "Flashed ${sec}"
|
||||
}
|
||||
|
||||
erase_emmc_config() {
|
||||
local emmcblock="$(find_mmc_part "rootfs_data")"
|
||||
if [ -e "$emmcblock" ]; then
|
||||
dd if=/dev/zero of=${emmcblock}
|
||||
mkfs.ext4 "$emmcblock"
|
||||
fi
|
||||
}
|
||||
|
||||
platform_pre_upgrade() {
|
||||
cp /sbin/upgraded /tmp
|
||||
ubus call system nandupgrade "{\"path\": \"$1\" }"
|
||||
}
|
||||
|
||||
platform_check_image_ipq() {
|
||||
local board=$(board_name)
|
||||
|
||||
local mandatory_nand="ubi"
|
||||
local mandatory_nor_emmc="hlos fs"
|
||||
local mandatory_nor="hlos"
|
||||
local mandatory_section_found=0
|
||||
local optional="sbl2 u-boot ddr-${board} ssd tz rpm"
|
||||
local ignored="mibib bootconfig sbl1"
|
||||
|
||||
image_is_FIT $1 || return 1
|
||||
|
||||
image_has_mandatory_section $1 ${mandatory_nand} && {\
|
||||
mandatory_section_found=1
|
||||
}
|
||||
|
||||
image_has_mandatory_section $1 ${mandatory_nor_emmc} && {\
|
||||
mandatory_section_found=1
|
||||
}
|
||||
|
||||
image_has_mandatory_section $1 ${mandatory_nor} && {\
|
||||
mandatory_section_found=1
|
||||
}
|
||||
|
||||
if [ $mandatory_section_found -eq 0 ]; then
|
||||
echo "Error: mandatory section(s) missing from \"$1\". Abort..."
|
||||
return 1
|
||||
fi
|
||||
|
||||
for sec in ${optional}; do
|
||||
image_contains $1 ${sec} || {\
|
||||
echo "Warning: optional section \"${sec}\" missing from \"$1\". Continue..."
|
||||
}
|
||||
done
|
||||
|
||||
for sec in ${ignored}; do
|
||||
image_contains $1 ${sec} && {\
|
||||
echo "Warning: section \"${sec}\" will be ignored from \"$1\". Continue..."
|
||||
}
|
||||
done
|
||||
|
||||
image_demux $1 || {\
|
||||
echo "Error: \"$1\" couldn't be extracted. Abort..."
|
||||
return 1
|
||||
}
|
||||
|
||||
[ -f /tmp/hlos_version ] && rm -f /tmp/*_version
|
||||
dumpimage -c $1 2>/dev/null
|
||||
return $?
|
||||
}
|
||||
|
||||
platform_version_upgrade() {
|
||||
local version_files="appsbl_version sbl_version tz_version hlos_version rpm_version"
|
||||
local sys="/sys/devices/system/qfprom/qfprom0/"
|
||||
local tmp="/tmp/"
|
||||
|
||||
for file in $version_files; do
|
||||
[ -f "${tmp}${file}" ] && {
|
||||
echo "Updating "${sys}${file}" with `cat "${tmp}${file}"`"
|
||||
echo `cat "${tmp}${file}"` > "${sys}${file}"
|
||||
rm -f "${tmp}${file}"
|
||||
}
|
||||
done
|
||||
}
|
||||
|
||||
|
||||
# The U-Boot loader of the OpenMesh devices requires image sizes and
|
||||
# checksums to be provided in the U-Boot environment.
|
||||
# The OpenMesh devices come with 2 main partitions - while one is active
|
||||
# sysupgrade will flash the other. The boot order is changed to boot the
|
||||
# newly flashed partition. If the new partition can't be booted due to
|
||||
# upgrade failures the previously used partition is loaded.
|
||||
|
||||
platform_do_upgrade_ipq() {
|
||||
local board=$(board_name)
|
||||
|
||||
# verify some things exist before erasing
|
||||
if [ ! -e $1 ]; then
|
||||
echo "Error: Can't find $1 after switching to ramfs, aborting upgrade!"
|
||||
reboot
|
||||
fi
|
||||
|
||||
for sec in $(print_sections $1); do
|
||||
if [ ! -e /tmp/${sec}.bin ]; then
|
||||
echo "Error: Cant' find ${sec} after switching to ramfs, aborting upgrade!"
|
||||
reboot
|
||||
fi
|
||||
done
|
||||
|
||||
case "$board" in
|
||||
teltonika,rutx)
|
||||
for sec in $(print_sections $1); do
|
||||
flash_section ${sec}
|
||||
done
|
||||
|
||||
switch_layout linux
|
||||
# update bootconfig to register that fw upgrade has been done
|
||||
do_flash_bootconfig bootconfig "0:BOOTCONFIG"
|
||||
do_flash_bootconfig bootconfig1 "0:BOOTCONFIG1"
|
||||
platform_version_upgrade
|
||||
|
||||
erase_emmc_config
|
||||
return 0;
|
||||
;;
|
||||
esac
|
||||
|
||||
echo "Upgrade failed!"
|
||||
return 1;
|
||||
}
|
||||
|
||||
platform_copy_config_ipq() {
|
||||
local emmcblock="$(find_mmc_part "rootfs_data")"
|
||||
mkdir -p /tmp/overlay
|
||||
|
||||
if [ -e "$emmcblock" ]; then
|
||||
mount -t ext4 "$emmcblock" /tmp/overlay
|
||||
cp /tmp/sysupgrade.tgz /tmp/overlay/
|
||||
sync
|
||||
umount /tmp/overlay
|
||||
else
|
||||
local mtdname=rootfs
|
||||
local mtdpart
|
||||
|
||||
[ -f /proc/boot_info/$mtdname/upgradepartition ] && {
|
||||
mtdname=$(cat /proc/boot_info/$mtdname/upgradepartition)
|
||||
}
|
||||
|
||||
mtdpart=$(grep "\"${mtdname}\"" /proc/mtd | awk -F: '{print $1}')
|
||||
ubiattach -p /dev/${mtdpart}
|
||||
mount -t ubifs ubi0:rootfs_data /tmp/overlay
|
||||
cp /tmp/sysupgrade.tgz /tmp/overlay/
|
||||
sync
|
||||
umount /tmp/overlay
|
||||
fi
|
||||
}
|
||||
|
|
@ -1,222 +0,0 @@
|
|||
PART_NAME=firmware
|
||||
REQUIRE_IMAGE_METADATA=1
|
||||
|
||||
RAMFS_COPY_BIN='fw_printenv fw_setenv'
|
||||
RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
|
||||
|
||||
platform_check_image() {
|
||||
case "$(board_name)" in
|
||||
asus,rt-ac42u |\
|
||||
asus,rt-ac58u)
|
||||
local ubidev=$(nand_find_ubi $CI_UBIPART)
|
||||
local asus_root=$(nand_find_volume $ubidev jffs2)
|
||||
|
||||
[ -n "$asus_root" ] || return 0
|
||||
|
||||
cat << EOF
|
||||
jffs2 partition is still present.
|
||||
There's probably no space left
|
||||
to install the filesystem.
|
||||
|
||||
You need to delete the jffs2 partition first:
|
||||
# ubirmvol /dev/ubi0 --name=jffs2
|
||||
|
||||
Once this is done. Retry.
|
||||
EOF
|
||||
return 1
|
||||
;;
|
||||
teltonika,rutx)
|
||||
platform_check_image_ipq "$1"
|
||||
;;
|
||||
zte,mf286d)
|
||||
CI_UBIPART="rootfs"
|
||||
local mtdnum="$( find_mtd_index $CI_UBIPART )"
|
||||
[ ! "$mtdnum" ] && return 1
|
||||
ubiattach -m "$mtdnum" || true
|
||||
local ubidev="$( nand_find_ubi $CI_UBIPART )"
|
||||
local ubi_rootfs=$(nand_find_volume $ubidev ubi_rootfs)
|
||||
local ubi_rootfs_data=$(nand_find_volume $ubidev ubi_rootfs_data)
|
||||
|
||||
[ -n "$ubi_rootfs" ] || [ -n "$ubi_rootfs_data" ] || return 0
|
||||
|
||||
cat << EOF
|
||||
ubi_rootfs partition is still present.
|
||||
|
||||
You need to delete the stock partition first:
|
||||
# ubirmvol /dev/ubi0 -N ubi_rootfs
|
||||
Please also delete ubi_rootfs_data, if exist:
|
||||
# ubirmvol /dev/ubi0 -N ubi_rootfs_data
|
||||
|
||||
Once this is done. Retry.
|
||||
EOF
|
||||
return 1
|
||||
;;
|
||||
esac
|
||||
return 0;
|
||||
}
|
||||
|
||||
askey_do_upgrade() {
|
||||
local tar_file="$1"
|
||||
|
||||
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
|
||||
board_dir=${board_dir%/}
|
||||
|
||||
tar Oxf $tar_file ${board_dir}/root | mtd write - rootfs
|
||||
|
||||
nand_do_upgrade "$1"
|
||||
}
|
||||
|
||||
zyxel_do_upgrade() {
|
||||
local tar_file="$1"
|
||||
|
||||
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
|
||||
board_dir=${board_dir%/}
|
||||
|
||||
tar Oxf $tar_file ${board_dir}/kernel | mtd write - kernel
|
||||
|
||||
if [ -n "$UPGRADE_BACKUP" ]; then
|
||||
tar Oxf $tar_file ${board_dir}/root | mtd -j "$UPGRADE_BACKUP" write - rootfs
|
||||
else
|
||||
tar Oxf $tar_file ${board_dir}/root | mtd write - rootfs
|
||||
fi
|
||||
}
|
||||
|
||||
platform_do_upgrade_mikrotik_nand() {
|
||||
local fw_mtd=$(find_mtd_part kernel)
|
||||
fw_mtd="${fw_mtd/block/}"
|
||||
[ -n "$fw_mtd" ] || return
|
||||
|
||||
local board_dir=$(tar tf "$1" | grep -m 1 '^sysupgrade-.*/$')
|
||||
board_dir=${board_dir%/}
|
||||
[ -n "$board_dir" ] || return
|
||||
|
||||
local kernel_len=$(tar xf "$1" ${board_dir}/kernel -O | wc -c)
|
||||
[ -n "$kernel_len" ] || return
|
||||
|
||||
tar xf "$1" ${board_dir}/kernel -O | ubiformat "$fw_mtd" -y -S $kernel_len -f -
|
||||
|
||||
CI_KERNPART="none"
|
||||
nand_do_upgrade "$1"
|
||||
}
|
||||
|
||||
platform_do_upgrade() {
|
||||
case "$(board_name)" in
|
||||
8dev,jalapeno |\
|
||||
aruba,ap-303 |\
|
||||
aruba,ap-303h |\
|
||||
aruba,ap-365 |\
|
||||
avm,fritzbox-7530 |\
|
||||
avm,fritzrepeater-1200 |\
|
||||
avm,fritzrepeater-3000 |\
|
||||
buffalo,wtr-m2133hp |\
|
||||
cilab,meshpoint-one |\
|
||||
edgecore,ecw5211 |\
|
||||
edgecore,oap100 |\
|
||||
engenius,eap2200 |\
|
||||
glinet,gl-ap1300 |\
|
||||
luma,wrtq-329acn |\
|
||||
mobipromo,cm520-79f |\
|
||||
netgear,wac510 |\
|
||||
p2w,r619ac-64m |\
|
||||
p2w,r619ac-128m |\
|
||||
qxwlan,e2600ac-c2)
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
glinet,gl-b2200)
|
||||
CI_KERNPART="0:HLOS"
|
||||
CI_ROOTPART="rootfs"
|
||||
CI_DATAPART="rootfs_data"
|
||||
emmc_do_upgrade "$1"
|
||||
;;
|
||||
alfa-network,ap120c-ac)
|
||||
part="$(awk -F 'ubi.mtd=' '{printf $2}' /proc/cmdline | sed -e 's/ .*$//')"
|
||||
if [ "$part" = "rootfs1" ]; then
|
||||
fw_setenv active 2 || exit 1
|
||||
CI_UBIPART="rootfs2"
|
||||
else
|
||||
fw_setenv active 1 || exit 1
|
||||
CI_UBIPART="rootfs1"
|
||||
fi
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
asus,map-ac2200)
|
||||
CI_KERNPART="linux"
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
asus,rt-ac42u |\
|
||||
asus,rt-ac58u)
|
||||
CI_KERNPART="linux"
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
cellc,rtl30vw)
|
||||
CI_UBIPART="ubifs"
|
||||
askey_do_upgrade "$1"
|
||||
;;
|
||||
compex,wpj419)
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
linksys,ea6350v3 |\
|
||||
linksys,ea8300 |\
|
||||
linksys,mr8300)
|
||||
platform_do_upgrade_linksys "$1"
|
||||
;;
|
||||
meraki,mr33)
|
||||
CI_KERNPART="part.safe"
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
mikrotik,cap-ac|\
|
||||
mikrotik,hap-ac2|\
|
||||
mikrotik,lhgg-60ad|\
|
||||
mikrotik,sxtsq-5-ac)
|
||||
[ "$(rootfs_type)" = "tmpfs" ] && mtd erase firmware
|
||||
default_do_upgrade "$1"
|
||||
;;
|
||||
mikrotik,hap-ac3)
|
||||
platform_do_upgrade_mikrotik_nand "$1"
|
||||
;;
|
||||
netgear,rbr50 |\
|
||||
netgear,rbs50 |\
|
||||
netgear,srr60 |\
|
||||
netgear,srs60)
|
||||
platform_do_upgrade_netgear_orbi_upgrade "$1"
|
||||
;;
|
||||
openmesh,a42 |\
|
||||
openmesh,a62 |\
|
||||
plasmacloud,pa1200 |\
|
||||
plasmacloud,pa2200)
|
||||
PART_NAME="inactive"
|
||||
platform_do_upgrade_dualboot_datachk "$1"
|
||||
;;
|
||||
teltonika,rutx12 |\
|
||||
teltonika,rutx)
|
||||
platform_do_upgrade_ipq "$1"
|
||||
;;
|
||||
teltonika,rutx10 |\
|
||||
teltonika,rutx50 |\
|
||||
zte,mf18a |\
|
||||
zte,mf286d |\
|
||||
zte,mf287plus |\
|
||||
zte,mf289f)
|
||||
CI_UBIPART="rootfs"
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
zyxel,nbg6617)
|
||||
zyxel_do_upgrade "$1"
|
||||
;;
|
||||
*)
|
||||
default_do_upgrade "$1"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
platform_copy_config() {
|
||||
case "$(board_name)" in
|
||||
glinet,gl-b2200)
|
||||
emmc_copy_config
|
||||
;;
|
||||
teltonika,rutx)
|
||||
platform_copy_config_ipq
|
||||
;;
|
||||
esac
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,147 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
. /lib/functions.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
export IMAGE="$1"
|
||||
COMMAND="$2"
|
||||
|
||||
export INTERACTIVE=0
|
||||
export VERBOSE=1
|
||||
export CONFFILES=/tmp/sysupgrade.conffiles
|
||||
|
||||
RAMFS_COPY_BIN= # extra programs for temporary ramfs root
|
||||
RAMFS_COPY_DATA= # extra data files
|
||||
|
||||
include /lib/upgrade
|
||||
|
||||
|
||||
supivot() { # <new_root> <old_root>
|
||||
/bin/mount | grep "on $1 type" 2>&- 1>&- || /bin/mount -o bind $1 $1
|
||||
mkdir -p $1$2 $1/proc $1/sys $1/dev $1/tmp $1/overlay && \
|
||||
/bin/mount -o noatime,move /proc $1/proc && \
|
||||
pivot_root $1 $1$2 || {
|
||||
/bin/umount -l $1 $1
|
||||
return 1
|
||||
}
|
||||
|
||||
/bin/mount -o noatime,move $2/sys /sys
|
||||
/bin/mount -o noatime,move $2/dev /dev
|
||||
/bin/mount -o noatime,move $2/tmp /tmp
|
||||
/bin/mount -o noatime,move $2/overlay /overlay 2>&-
|
||||
return 0
|
||||
}
|
||||
|
||||
switch_to_ramfs() {
|
||||
for binary in \
|
||||
/bin/busybox /bin/ash /bin/sh /bin/mount /bin/umount \
|
||||
pivot_root mount_root reboot sync kill sleep \
|
||||
md5sum hexdump cat zcat bzcat dd tar \
|
||||
ls basename find cp mv rm mkdir rmdir mknod touch chmod \
|
||||
'[' printf wc grep awk sed cut \
|
||||
mtd partx losetup mkfs.ext4 nandwrite flash_erase \
|
||||
ubiupdatevol ubiattach ubiblock ubiformat \
|
||||
ubidetach ubirsvol ubirmvol ubimkvol \
|
||||
snapshot snapshot_tool date jshn dtbtool dtc mkbootimg \
|
||||
ubinize-image.sh sysupgrade-tar.sh which ubinize mktemp \
|
||||
dumpimage ledman fwtool \
|
||||
$RAMFS_COPY_BIN
|
||||
do
|
||||
local file="$(command -v "$binary" 2>/dev/null)"
|
||||
[ -n "$file" ] && install_bin "$file"
|
||||
done
|
||||
install_file /etc/resolv.conf \
|
||||
/lib/*.sh \
|
||||
/lib/functions/*.sh \
|
||||
/lib/upgrade/*.sh \
|
||||
/lib/upgrade/do_stage2 \
|
||||
/usr/share/libubox/jshn.sh \
|
||||
/etc/board.json \
|
||||
$RAMFS_COPY_DATA
|
||||
|
||||
[ -L "/lib64" ] && ln -s /lib $RAM_ROOT/lib64
|
||||
|
||||
supivot $RAM_ROOT /mnt || {
|
||||
v "Failed to switch over to ramfs. Please reboot."
|
||||
exit 1
|
||||
}
|
||||
|
||||
/bin/mount -o remount,ro /mnt
|
||||
/bin/umount -l /mnt
|
||||
|
||||
grep /overlay /proc/mounts > /dev/null && {
|
||||
/bin/mount -o noatime,remount,ro /overlay
|
||||
/bin/umount -l /overlay
|
||||
}
|
||||
}
|
||||
|
||||
kill_remaining() { # [ <signal> [ <loop> ] ]
|
||||
local loop_limit=10
|
||||
|
||||
local sig="${1:-TERM}"
|
||||
local loop="${2:-0}"
|
||||
local run=true
|
||||
local stat
|
||||
local proc_ppid=$(cut -d' ' -f4 /proc/$$/stat)
|
||||
|
||||
vn "Sending $sig to remaining processes ..."
|
||||
|
||||
while $run; do
|
||||
run=false
|
||||
for stat in /proc/[0-9]*/stat; do
|
||||
[ -f "$stat" ] || continue
|
||||
|
||||
local pid name state ppid rest
|
||||
read pid name state ppid rest < $stat
|
||||
name="${name#(}"; name="${name%)}"
|
||||
|
||||
# Skip PID1, our parent, ourself and our children
|
||||
[ $pid -ne 1 -a $pid -ne $proc_ppid -a $pid -ne $$ -a $ppid -ne $$ ] || continue
|
||||
|
||||
local cmdline
|
||||
read cmdline < /proc/$pid/cmdline
|
||||
|
||||
# Skip kernel threads
|
||||
[ -n "$cmdline" ] || continue
|
||||
|
||||
_vn " $name"
|
||||
kill -$sig $pid 2>/dev/null
|
||||
|
||||
[ $loop -eq 1 ] && run=true
|
||||
done
|
||||
|
||||
let loop_limit--
|
||||
[ $loop_limit -eq 0 ] && {
|
||||
_v
|
||||
v "Failed to kill all processes."
|
||||
exit 1
|
||||
}
|
||||
done
|
||||
_v
|
||||
}
|
||||
|
||||
[ -n "$(pgrep telnetd)" ] && {
|
||||
killall -9 telnetd
|
||||
}
|
||||
|
||||
[ -n "$(pgrep dropbear)" ] && {
|
||||
killall -9 dropbear
|
||||
}
|
||||
|
||||
killall -9 ash
|
||||
|
||||
kill_remaining TERM
|
||||
sleep 3
|
||||
kill_remaining KILL 1
|
||||
|
||||
sleep 1
|
||||
|
||||
echo 3 > /proc/sys/vm/drop_caches
|
||||
|
||||
if [ -n "$(rootfs_type)" ]; then
|
||||
v "Switching to ramdisk..."
|
||||
switch_to_ramfs
|
||||
fi
|
||||
|
||||
# Exec new shell from ramfs
|
||||
exec /bin/busybox ash -c "$COMMAND"
|
||||
|
|
@ -1,120 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
. /usr/share/libubox/jshn.sh
|
||||
|
||||
PS_ON=1
|
||||
PS_OFF=2
|
||||
|
||||
MPS=0
|
||||
MLBL="modem"
|
||||
|
||||
modem_reset() {
|
||||
local label="$1"
|
||||
|
||||
[ -e "/sys/class/gpio/${label}_reset/value" ] || return
|
||||
|
||||
echo 1 > "/sys/class/gpio/${label}_reset/value"
|
||||
sleep 1
|
||||
echo 0 > "/sys/class/gpio/${label}_reset/value"
|
||||
}
|
||||
|
||||
modem_off() {
|
||||
local label="$1"
|
||||
|
||||
[ -e "/sys/class/gpio/${label}_reset/value" ] || return
|
||||
|
||||
echo 1 > "/sys/class/gpio/${label}_reset/value"
|
||||
}
|
||||
|
||||
modem_power() {
|
||||
local label="$1"
|
||||
|
||||
[ -e "/sys/class/gpio/${label}_power/value" ] || return
|
||||
|
||||
# simulate power press
|
||||
echo 1 > "/sys/class/gpio/${label}_power/value"
|
||||
sleep 1
|
||||
echo 0 > "/sys/class/gpio/${label}_power/value"
|
||||
}
|
||||
|
||||
modem_list() {
|
||||
local list="modem"
|
||||
local label
|
||||
|
||||
[ "$(modem_fetch_primary)" -eq 0 ] && {
|
||||
echo "${list}"
|
||||
return
|
||||
}
|
||||
|
||||
for m in /sys/class/gpio/modem*_power; do
|
||||
label="$(basename $m | awk -F_ '{print $1}')"
|
||||
[ "${label}" != "modem" ] && list="${list},${label}"
|
||||
done
|
||||
|
||||
echo "${list}"
|
||||
}
|
||||
|
||||
modem_fetch_primary() {
|
||||
local modem modems primary
|
||||
|
||||
json_init
|
||||
json_load_file "/etc/board.json"
|
||||
|
||||
json_get_keys modems modems
|
||||
json_select modems
|
||||
|
||||
for modem in $modems; do
|
||||
json_select "$modem"
|
||||
json_get_vars primary
|
||||
|
||||
[ -n "$primary" ] && {
|
||||
echo 1
|
||||
return
|
||||
}
|
||||
|
||||
json_select ..
|
||||
done
|
||||
echo 0
|
||||
}
|
||||
|
||||
modem_is_available() {
|
||||
local label="$1"
|
||||
[ -e "/sys/class/gpio/${label}_power/value" ]
|
||||
}
|
||||
|
||||
usage() {
|
||||
cat <<EOF
|
||||
Usage $0 <option>
|
||||
Control modem power state.
|
||||
|
||||
Options:
|
||||
-p, --power-on power on modem
|
||||
-s, --shutdown shutdown modem
|
||||
-r, --reboot reboot modem
|
||||
-m, --modem <label> use specified modem instead of default one
|
||||
|
||||
Available modem labels:
|
||||
$(modem_list)
|
||||
EOF
|
||||
exit 1
|
||||
}
|
||||
|
||||
while [ -n "$1" ]; do
|
||||
case "$1" in
|
||||
-p | --power-on) MPS="${PS_ON}";;
|
||||
-s | --shutdown) MPS="${PS_OFF}";;
|
||||
-r | --reboot) MPS="${PS_ON}";;
|
||||
-m | --modem) MLBL="$2"; shift;;
|
||||
-*) echo "Invalid option: $1"; usage;;
|
||||
*) break;;
|
||||
esac
|
||||
shift
|
||||
done
|
||||
|
||||
[ "${MPS}" -eq 0 ] && usage
|
||||
modem_is_available "${MLBL}" || usage
|
||||
|
||||
case "${MPS}" in
|
||||
"${PS_ON}") modem_reset "${MLBL}"; sleep 1; modem_power "${MLBL}";;
|
||||
"${PS_OFF}") modem_off "${MLBL}";;
|
||||
esac
|
||||
|
|
@ -1,10 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
while [[ $# -gt 0 ]]; do
|
||||
case $1 in
|
||||
-n|--name)
|
||||
echo $(dd if=/dev/mtd13 bs=1 count=12 skip=16 2>/dev/null)
|
||||
shift
|
||||
;;
|
||||
esac
|
||||
done
|
||||
Binary file not shown.
|
|
@ -1,540 +0,0 @@
|
|||
CONFIG_ALIGNMENT_TRAP=y
|
||||
# CONFIG_APQ_GCC_8084 is not set
|
||||
# CONFIG_APQ_MMCC_8084 is not set
|
||||
CONFIG_ARCH_32BIT_OFF_T=y
|
||||
CONFIG_ARCH_FORCE_MAX_ORDER=11
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_IPQ40XX=y
|
||||
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
||||
# CONFIG_ARCH_MDM9615 is not set
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
# CONFIG_ARCH_MOXART is not set
|
||||
# CONFIG_ARCH_MSM8909 is not set
|
||||
# CONFIG_ARCH_MSM8916 is not set
|
||||
# CONFIG_ARCH_MSM8960 is not set
|
||||
# CONFIG_ARCH_MSM8974 is not set
|
||||
# CONFIG_ARCH_MSM8X60 is not set
|
||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
CONFIG_ARCH_MULTI_V4=y
|
||||
CONFIG_ARCH_MULTI_V4T=y
|
||||
CONFIG_ARCH_MULTI_V5=y
|
||||
CONFIG_ARCH_MULTI_V6_V7=y
|
||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
|
||||
CONFIG_ARCH_QCOM=y
|
||||
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
|
||||
CONFIG_ARM_CPUIDLE=y
|
||||
# CONFIG_ARM_CPU_TOPOLOGY is not set
|
||||
CONFIG_ARM_CRYPTO=y
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=6
|
||||
CONFIG_ARM_L1_CACHE_SHIFT_6=y
|
||||
CONFIG_ARM_PATCH_IDIV=y
|
||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
||||
# CONFIG_ARM_QCOM_CPUFREQ_HW is not set
|
||||
# CONFIG_ARM_QCOM_CPUFREQ_NVMEM is not set
|
||||
# CONFIG_ARM_QCOM_SPM_CPUIDLE is not set
|
||||
# CONFIG_ARM_SMMU is not set
|
||||
CONFIG_ARM_THUMB=y
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_ARM_VIRT_EXT=y
|
||||
CONFIG_AT803X_PHY=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
CONFIG_BCH=y
|
||||
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BOUNCE=y
|
||||
# CONFIG_CACHE_L2X0 is not set
|
||||
CONFIG_CLKSRC_QCOM=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMDLINE_PARTITION=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_QCOM=y
|
||||
CONFIG_COMPAT_32BIT_TIME=y
|
||||
CONFIG_CPUFREQ_DT=y
|
||||
CONFIG_CPUFREQ_DT_PLATDEV=y
|
||||
CONFIG_CPU_32v6K=y
|
||||
CONFIG_CPU_32v7=y
|
||||
CONFIG_CPU_ABRT_EV7=y
|
||||
# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
|
||||
CONFIG_CPU_CACHE_V7=y
|
||||
CONFIG_CPU_CACHE_VIPT=y
|
||||
CONFIG_CPU_COPY_V6=y
|
||||
CONFIG_CPU_CP15=y
|
||||
CONFIG_CPU_CP15_MMU=y
|
||||
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
|
||||
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_HAS_ASID=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_LADDER=y
|
||||
CONFIG_CPU_IDLE_GOV_MENU=y
|
||||
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
|
||||
CONFIG_CPU_PABRT_V7=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CPU_SPECTRE=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_CPU_THUMB_CAPABLE=y
|
||||
CONFIG_CPU_TLB_V7=y
|
||||
CONFIG_CPU_V7=y
|
||||
CONFIG_CRC16=y
|
||||
# CONFIG_CRC32_SARWATE is not set
|
||||
CONFIG_CRC32_SLICEBY8=y
|
||||
CONFIG_CRC8=y
|
||||
CONFIG_CRYPTO_AES_ARM=y
|
||||
CONFIG_CRYPTO_AES_ARM_BS=y
|
||||
CONFIG_CRYPTO_BLAKE2S_ARM=y
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
CONFIG_CRYPTO_CRYPTD=y
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
CONFIG_CRYPTO_DES=y
|
||||
CONFIG_CRYPTO_DEV_QCE=y
|
||||
# CONFIG_CRYPTO_DEV_QCE_ENABLE_AEAD is not set
|
||||
# CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL is not set
|
||||
# CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA is not set
|
||||
CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER=y
|
||||
CONFIG_CRYPTO_DEV_QCE_SKCIPHER=y
|
||||
CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN=512
|
||||
CONFIG_CRYPTO_DEV_QCOM_RNG=y
|
||||
CONFIG_CRYPTO_DRBG=y
|
||||
CONFIG_CRYPTO_DRBG_HMAC=y
|
||||
CONFIG_CRYPTO_DRBG_MENU=y
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_HASH_INFO=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_HW=y
|
||||
CONFIG_CRYPTO_JITTERENTROPY=y
|
||||
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
|
||||
CONFIG_CRYPTO_LIB_DES=y
|
||||
CONFIG_CRYPTO_LIB_SHA256=y
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
CONFIG_CRYPTO_RNG=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_RNG_DEFAULT=y
|
||||
CONFIG_CRYPTO_SEQIV=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA256_ARM=y
|
||||
CONFIG_CRYPTO_SHA512=y
|
||||
CONFIG_CRYPTO_SIMD=y
|
||||
CONFIG_CRYPTO_XTS=y
|
||||
CONFIG_CRYPTO_ZSTD=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
|
||||
CONFIG_DEBUG_MISC=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_OPS=y
|
||||
CONFIG_DMA_REMAP=y
|
||||
CONFIG_DMA_SHARED_BUFFER=y
|
||||
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DT_IDLE_STATES=y
|
||||
CONFIG_DYNAMIC_DEBUG=y
|
||||
CONFIG_EDAC_ATOMIC_SCRUB=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_EXTCON=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
CONFIG_FWNODE_MDIO=y
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_CPU_VULNERABILITIES=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_GETTIMEOFDAY=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GENERIC_VDSO_32=y
|
||||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
CONFIG_GPIO_74X164=y
|
||||
CONFIG_GPIO_CDEV=y
|
||||
CONFIG_GPIO_WATCHDOG=y
|
||||
CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y
|
||||
CONFIG_GRO_CELLS=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDEN_BRANCH_PREDICTOR=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HAVE_SMP=y
|
||||
CONFIG_HIGHMEM=y
|
||||
# CONFIG_HIGHPTE is not set
|
||||
CONFIG_HWSPINLOCK=y
|
||||
CONFIG_HWSPINLOCK_QCOM=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_OPTEE=y
|
||||
CONFIG_HZ_FIXED=0
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_HELPER_AUTO=y
|
||||
# CONFIG_I2C_QCOM_CCI is not set
|
||||
CONFIG_I2C_QUP=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
# CONFIG_IOMMU_DEBUGFS is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
|
||||
CONFIG_IOMMU_SUPPORT=y
|
||||
CONFIG_IO_URING=y
|
||||
# CONFIG_IPQ_APSS_PLL is not set
|
||||
CONFIG_IPQ_GCC_4019=y
|
||||
# CONFIG_IPQ_GCC_6018 is not set
|
||||
# CONFIG_IPQ_GCC_806X is not set
|
||||
# CONFIG_IPQ_GCC_8074 is not set
|
||||
# CONFIG_IPQ_LCC_806X is not set
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_KMAP_LOCAL=y
|
||||
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
|
||||
# CONFIG_KPSS_XCC is not set
|
||||
# CONFIG_KRAITCC is not set
|
||||
CONFIG_LEDS_LP5523=y
|
||||
CONFIG_LEDS_LP5562=y
|
||||
CONFIG_LEDS_LP55XX_COMMON=y
|
||||
CONFIG_LEDS_TLC591XX=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
CONFIG_MDIO_BITBANG=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MDIO_DEVRES=y
|
||||
CONFIG_MDIO_GPIO=y
|
||||
CONFIG_MDIO_IPQ4019=y
|
||||
# CONFIG_MDM_GCC_9615 is not set
|
||||
# CONFIG_MDM_LCC_9615 is not set
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
# CONFIG_MFD_HI6421_SPMI is not set
|
||||
# CONFIG_MFD_QCOM_RPM is not set
|
||||
# CONFIG_MFD_SPMI_PMIC is not set
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_CQHCI=y
|
||||
# CONFIG_MSM_GCC_8909 is not set
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
|
||||
CONFIG_MMC_SDHCI_MSM=y
|
||||
# CONFIG_MMC_SDHCI_PCI is not set
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
# CONFIG_MSM_GCC_8660 is not set
|
||||
# CONFIG_MSM_GCC_8916 is not set
|
||||
# CONFIG_MSM_GCC_8939 is not set
|
||||
# CONFIG_MSM_GCC_8960 is not set
|
||||
# CONFIG_MSM_GCC_8974 is not set
|
||||
# CONFIG_MSM_GCC_8976 is not set
|
||||
# CONFIG_MSM_GCC_8994 is not set
|
||||
# CONFIG_MSM_GCC_8996 is not set
|
||||
# CONFIG_MSM_GCC_8998 is not set
|
||||
# CONFIG_MSM_GPUCC_8998 is not set
|
||||
# CONFIG_MSM_LCC_8960 is not set
|
||||
# CONFIG_MSM_MMCC_8960 is not set
|
||||
# CONFIG_MSM_MMCC_8974 is not set
|
||||
# CONFIG_MSM_MMCC_8996 is not set
|
||||
# CONFIG_MSM_MMCC_8998 is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_NAND_CORE=y
|
||||
CONFIG_MTD_NAND_ECC=y
|
||||
CONFIG_MTD_NAND_ECC_SW_BCH=y
|
||||
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
|
||||
CONFIG_MTD_NAND_QCOM=y
|
||||
# CONFIG_MTD_QCOMSMEM_PARTS is not set
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_SPLIT_FIRMWARE=y
|
||||
CONFIG_MTD_SPLIT_FIT_FW=y
|
||||
CONFIG_MTD_SPLIT_WRGG_FW=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=20
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEON=y
|
||||
CONFIG_NET_DEVLINK=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_QCA8K_IPQ4019=y
|
||||
CONFIG_NET_DSA_TAG_IPQ4019=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NET_PTP_CLASSIFY=y
|
||||
CONFIG_NET_SELFTESTS=y
|
||||
CONFIG_NET_SWITCHDEV=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=4
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_NVMEM_QCOM_QFPROM=y
|
||||
# CONFIG_NVMEM_SPMI_SDAM is not set
|
||||
CONFIG_NVMEM_SYSFS=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_OPTEE=y
|
||||
CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_DW=y
|
||||
CONFIG_PCIE_DW_HOST=y
|
||||
CONFIG_PCIE_QCOM=y
|
||||
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYLINK=y
|
||||
# CONFIG_PHY_QCOM_APQ8064_SATA is not set
|
||||
CONFIG_PHY_QCOM_IPQ4019_USB=y
|
||||
# CONFIG_PHY_QCOM_IPQ806X_SATA is not set
|
||||
# CONFIG_PHY_QCOM_IPQ806X_USB is not set
|
||||
# CONFIG_PHY_QCOM_PCIE2 is not set
|
||||
# CONFIG_PHY_QCOM_QMP is not set
|
||||
# CONFIG_PHY_QCOM_QUSB2 is not set
|
||||
# CONFIG_PHY_QCOM_USB_HS_28NM is not set
|
||||
# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set
|
||||
# CONFIG_PHY_QCOM_USB_SS is not set
|
||||
CONFIG_PHYS_OFFSET=0
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_APQ8064 is not set
|
||||
# CONFIG_PINCTRL_APQ8084 is not set
|
||||
CONFIG_PINCTRL_IPQ4019=y
|
||||
# CONFIG_PINCTRL_IPQ6018 is not set
|
||||
# CONFIG_PINCTRL_IPQ8064 is not set
|
||||
# CONFIG_PINCTRL_IPQ8074 is not set
|
||||
# CONFIG_PINCTRL_MDM9615 is not set
|
||||
CONFIG_PINCTRL_MSM=y
|
||||
# CONFIG_PINCTRL_MSM8226 is not set
|
||||
# CONFIG_PINCTRL_MSM8660 is not set
|
||||
# CONFIG_PINCTRL_MSM8909 is not set
|
||||
# CONFIG_PINCTRL_MSM8916 is not set
|
||||
# CONFIG_PINCTRL_MSM8960 is not set
|
||||
# CONFIG_PINCTRL_MSM8976 is not set
|
||||
# CONFIG_PINCTRL_MSM8994 is not set
|
||||
# CONFIG_PINCTRL_MSM8996 is not set
|
||||
# CONFIG_PINCTRL_MSM8998 is not set
|
||||
# CONFIG_PINCTRL_QCOM_SPMI_PMIC is not set
|
||||
# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
|
||||
# CONFIG_PINCTRL_QCS404 is not set
|
||||
# CONFIG_PINCTRL_SC7180 is not set
|
||||
# CONFIG_PINCTRL_SDM660 is not set
|
||||
# CONFIG_PINCTRL_SDM845 is not set
|
||||
# CONFIG_PINCTRL_SM8150 is not set
|
||||
# CONFIG_PINCTRL_SM8250 is not set
|
||||
# CONFIG_PINCTRL_SDX65 is not set
|
||||
# CONFIG_PHY_QCOM_EDP is not set
|
||||
CONFIG_PM_OPP=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_MSM=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PPS=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PTP_1588_CLOCK=y
|
||||
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
|
||||
CONFIG_QCA807X_PHY=y
|
||||
# CONFIG_QCM_GCC_2290 is not set
|
||||
# CONFIG_QCM_DISPCC_2290 is not set
|
||||
CONFIG_QCOM_A53PLL=y
|
||||
# CONFIG_QCOM_ADM is not set
|
||||
CONFIG_QCOM_BAM_DMA=y
|
||||
# CONFIG_QCOM_COMMAND_DB is not set
|
||||
# CONFIG_QCOM_CPR is not set
|
||||
# CONFIG_QCOM_EBI2 is not set
|
||||
# CONFIG_QCOM_GENI_SE is not set
|
||||
# CONFIG_QCOM_GSBI is not set
|
||||
# CONFIG_QCOM_HFPLL is not set
|
||||
# CONFIG_QCOM_ICC_BWMON is not set
|
||||
# CONFIG_QCOM_IOMMU is not set
|
||||
CONFIG_QCOM_IPQ4019_ESS_EDMA=y
|
||||
# CONFIG_QCOM_LLCC is not set
|
||||
# CONFIG_QCOM_OCMEM is not set
|
||||
# CONFIG_QCOM_PDC is not set
|
||||
# CONFIG_QCOM_RMTFS_MEM is not set
|
||||
# CONFIG_QCOM_RPMH is not set
|
||||
CONFIG_QCOM_SCM=y
|
||||
# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
|
||||
CONFIG_QCOM_SMEM=y
|
||||
# CONFIG_QCOM_SMSM is not set
|
||||
# CONFIG_QCOM_SOCINFO is not set
|
||||
# CONFIG_QCOM_SPM is not set
|
||||
# CONFIG_QCOM_STATS is not set
|
||||
CONFIG_QCOM_TCSR=y
|
||||
# CONFIG_QCOM_TSENS is not set
|
||||
CONFIG_QCOM_WDT=y
|
||||
# CONFIG_QCS_GCC_404 is not set
|
||||
# CONFIG_QCS_Q6SSTOP_404 is not set
|
||||
# CONFIG_QCS_TURING_404 is not set
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_I2C=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
# CONFIG_REGULATOR_QCOM_LABIBB is not set
|
||||
# CONFIG_REGULATOR_QCOM_SPMI is not set
|
||||
# CONFIG_REGULATOR_QCOM_USB_VBUS is not set
|
||||
CONFIG_REGULATOR_VCTRL=y
|
||||
CONFIG_REGULATOR_VQMMC_IPQ4019=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
# CONFIG_RESET_QCOM_AOSS is not set
|
||||
# CONFIG_RESET_QCOM_PDC is not set
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
# CONFIG_RTC_DRV_OPTEE is not set
|
||||
CONFIG_RTC_I2C_AND_SPI=y
|
||||
CONFIG_RTC_MC146818_LIB=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
# CONFIG_SC_CAMCC_7280 is not set
|
||||
# CONFIG_SC_DISPCC_7180 is not set
|
||||
# CONFIG_SC_GCC_7180 is not set
|
||||
# CONFIG_SC_GCC_8280XP is not set
|
||||
# CONFIG_SC_GPUCC_7180 is not set
|
||||
# CONFIG_SC_LPASS_CORECC_7180 is not set
|
||||
# CONFIG_SC_LPASSCC_7280 is not set
|
||||
# CONFIG_SC_LPASS_CORECC_7280 is not set
|
||||
# CONFIG_SC_MSS_7180 is not set
|
||||
# CONFIG_SC_VIDEOCC_7180 is not set
|
||||
# CONFIG_SDM_CAMCC_845 is not set
|
||||
# CONFIG_SDM_DISPCC_845 is not set
|
||||
# CONFIG_SDM_GCC_660 is not set
|
||||
# CONFIG_SDM_GCC_845 is not set
|
||||
# CONFIG_SDM_GPUCC_845 is not set
|
||||
# CONFIG_SDM_LPASSCC_845 is not set
|
||||
# CONFIG_SDM_VIDEOCC_845 is not set
|
||||
# CONFIG_SDX_GCC_65 is not set
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SERIAL_MSM=y
|
||||
CONFIG_SERIAL_MSM_CONSOLE=y
|
||||
CONFIG_SGL_ALLOC=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SMP_ON_UP=y
|
||||
# CONFIG_SM_CAMCC_8450 is not set
|
||||
# CONFIG_SM_GCC_8150 is not set
|
||||
# CONFIG_SM_GCC_8250 is not set
|
||||
# CONFIG_SM_GCC_8450 is not set
|
||||
# CONFIG_SM_GPUCC_6350 is not set
|
||||
# CONFIG_SM_GPUCC_8150 is not set
|
||||
# CONFIG_SM_GPUCC_8250 is not set
|
||||
# CONFIG_SM_GPUCC_8350 is not set
|
||||
# CONFIG_SM_VIDEOCC_8150 is not set
|
||||
# CONFIG_SM_VIDEOCC_8250 is not set
|
||||
CONFIG_SOCK_RX_QUEUE_MAPPING=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_BITBANG=y
|
||||
CONFIG_SPI_GPIO=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPI_QUP=y
|
||||
CONFIG_SPMI=y
|
||||
# CONFIG_SPMI_HISI3670 is not set
|
||||
CONFIG_SPMI_MSM_PMIC_ARB=y
|
||||
# CONFIG_SPMI_PMIC_CLKDIV is not set
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SWP_EMULATE=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_TEE=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
# CONFIG_TRUSTED_KEYS_TEE is not set
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_UNWINDER_ARM=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_VFPv3=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XXHASH=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZSTD_COMPRESS=y
|
||||
CONFIG_ZSTD_DECOMPRESS=y
|
||||
|
|
@ -1 +0,0 @@
|
|||
/ { platform = "RUTX"; };
|
||||
|
|
@ -1,24 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX08";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-STM32.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX08 STM32";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,106 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX09";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_sim_select {
|
||||
gpio-export,name = "sim_sel";
|
||||
gpio-export,output = <1>;
|
||||
gpios = <&shift_io 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&shift_io 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&shift_io 22 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&shift_io 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_2 {
|
||||
label = "mob_gen_2";
|
||||
gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_2 {
|
||||
label = "mob_ssid_2";
|
||||
gpios = <&shift_io 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_4 {
|
||||
label = "mob_ssid_4";
|
||||
gpios = <&shift_io 14 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&shift_io 15 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,108 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-STM32.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX09 STM32";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_sim_select {
|
||||
gpio-export,name = "sim_sel";
|
||||
gpio-export,output = <1>;
|
||||
gpios = <&stm32_io 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&stm32_io 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&stm32_io 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&stm32_io 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_2 {
|
||||
label = "mob_gen_2";
|
||||
gpios = <&stm32_io 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&stm32_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&stm32_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&stm32_io 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_2 {
|
||||
label = "mob_ssid_2";
|
||||
gpios = <&stm32_io 8 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&stm32_io 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_4 {
|
||||
label = "mob_ssid_4";
|
||||
gpios = <&stm32_io 10 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&stm32_io 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,38 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX10";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wifi_24 {
|
||||
label = "wifi_gen_2";
|
||||
gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wifi_50 {
|
||||
label = "wifi_gen_5";
|
||||
gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,40 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-STM32.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX10 STM32";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wifi_24 {
|
||||
label = "wifi_gen_2";
|
||||
gpios = <&stm32_io 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wifi_50 {
|
||||
label = "wifi_gen_5";
|
||||
gpios = <&stm32_io 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,121 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX11";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_sim_select {
|
||||
gpio-export,name = "sim_sel";
|
||||
gpio-export,output = <1>;
|
||||
gpios = <&shift_io 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&shift_io 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&shift_io 22 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&shift_io 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_wifi {
|
||||
label = "wan_wifi_4";
|
||||
gpios = <&shift_io 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_2 {
|
||||
label = "mob_gen_2";
|
||||
gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_2 {
|
||||
label = "mob_ssid_2";
|
||||
gpios = <&shift_io 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_4 {
|
||||
label = "mob_ssid_4";
|
||||
gpios = <&shift_io 14 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&shift_io 15 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_wifi_24 {
|
||||
label = "wifi_gen_2";
|
||||
gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wifi_50 {
|
||||
label = "wifi_gen_5";
|
||||
gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,123 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-STM32.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX11 STM32";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_sim_select {
|
||||
gpio-export,name = "sim_sel";
|
||||
gpio-export,output = <1>;
|
||||
gpios = <&stm32_io 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&stm32_io 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&stm32_io 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&stm32_io 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_wifi {
|
||||
label = "wan_wifi_4";
|
||||
gpios = <&stm32_io 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_2 {
|
||||
label = "mob_gen_2";
|
||||
gpios = <&stm32_io 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&stm32_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&stm32_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&stm32_io 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_2 {
|
||||
label = "mob_ssid_2";
|
||||
gpios = <&stm32_io 8 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&stm32_io 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_4 {
|
||||
label = "mob_ssid_4";
|
||||
gpios = <&stm32_io 10 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&stm32_io 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_wifi_24 {
|
||||
label = "wifi_gen_2";
|
||||
gpios = <&stm32_io 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wifi_50 {
|
||||
label = "wifi_gen_5";
|
||||
gpios = <&stm32_io 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,148 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX12";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 16 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 17 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem2_reset {
|
||||
gpio-export,name = "modem2_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem2_power {
|
||||
gpio-export,name = "modem2_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&shift_io 14 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&shift_io 15 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_wifi {
|
||||
label = "wan_wifi_4";
|
||||
gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_2 {
|
||||
label = "mob_gen_2";
|
||||
gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&shift_io 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&shift_io 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led2_gen_2 {
|
||||
label = "mob2_gen_2";
|
||||
gpios = <&shift_io 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led2_gen_3 {
|
||||
label = "mob2_gen_3";
|
||||
gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led2_gen_4 {
|
||||
label = "mob2_gen_4";
|
||||
gpios = <&shift_io 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led2_ssid_1 {
|
||||
label = "mob2_ssid_1";
|
||||
gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led2_ssid_3 {
|
||||
label = "mob2_ssid_3";
|
||||
gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led2_ssid_5 {
|
||||
label = "mob2_ssid_5";
|
||||
gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_wifi_24 {
|
||||
label = "wifi_gen_2";
|
||||
gpios = <&shift_io 22 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wifi_50 {
|
||||
label = "wifi_gen_5";
|
||||
gpios = <&shift_io 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,150 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-STM32.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX12 STM32";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem2_reset {
|
||||
gpio-export,name = "modem2_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem2_power {
|
||||
gpio-export,name = "modem2_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 14 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&stm32_io 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&stm32_io 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&stm32_io 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_wifi {
|
||||
label = "wan_wifi_4";
|
||||
gpios = <&stm32_io 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_2 {
|
||||
label = "mob_gen_2";
|
||||
gpios = <&stm32_io 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&stm32_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&stm32_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led2_gen_2 {
|
||||
label = "mob2_gen_2";
|
||||
gpios = <&stm32_io 32 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led2_gen_3 {
|
||||
label = "mob2_gen_3";
|
||||
gpios = <&stm32_io 33 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led2_gen_4 {
|
||||
label = "mob2_gen_4";
|
||||
gpios = <&stm32_io 34 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&stm32_io 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&stm32_io 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&stm32_io 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led2_ssid_1 {
|
||||
label = "mob2_ssid_1";
|
||||
gpios = <&stm32_io 31 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led2_ssid_3 {
|
||||
label = "mob2_ssid_3";
|
||||
gpios = <&stm32_io 30 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led2_ssid_5 {
|
||||
label = "mob2_ssid_5";
|
||||
gpios = <&stm32_io 29 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_wifi_24 {
|
||||
label = "wifi_gen_2";
|
||||
gpios = <&stm32_io 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wifi_50 {
|
||||
label = "wifi_gen_5";
|
||||
gpios = <&stm32_io 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,98 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX14";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&shift_io 14 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&shift_io 15 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_wifi {
|
||||
label = "wan_wifi_4";
|
||||
gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&shift_io 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_wifi_24 {
|
||||
label = "wifi_gen_2";
|
||||
gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wifi_50 {
|
||||
label = "wifi_gen_5";
|
||||
gpios = <&shift_io 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,100 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-STM32.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX14 STM32";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpio-export,direction_may_change;
|
||||
gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&stm32_io 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&stm32_io 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&stm32_io 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_wifi {
|
||||
label = "wan_wifi_4";
|
||||
gpios = <&stm32_io 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&stm32_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&stm32_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&stm32_io 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&stm32_io 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&stm32_io 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_wifi_24 {
|
||||
label = "wifi_gen_2";
|
||||
gpios = <&stm32_io 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wifi_50 {
|
||||
label = "wifi_gen_5";
|
||||
gpios = <&stm32_io 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,110 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTX50";
|
||||
|
||||
soc {
|
||||
|
||||
ext_io {
|
||||
shift_io: shift_io@0 {
|
||||
registers-number = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_out_1 {
|
||||
gpio-export,name = "gpio23";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_in_1 {
|
||||
gpio-export,name = "gpio24";
|
||||
gpio-export,input = <0>;
|
||||
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&shift_io 14 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&shift_io 15 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_wifi {
|
||||
label = "wan_wifi_4";
|
||||
gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&shift_io 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_5 {
|
||||
label = "mob_gen_5";
|
||||
gpios = <&shift_io 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_wifi_24 {
|
||||
label = "wifi_gen_2";
|
||||
gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wifi_50 {
|
||||
label = "wifi_gen_5";
|
||||
gpios = <&shift_io 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,83 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-shiftreg.dtsi"
|
||||
#include "qcom-ipq4018-rutx-i2c.dtsi" // SFP
|
||||
|
||||
/ {
|
||||
model = "RUTXR1";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_sim_select {
|
||||
gpio-export,name = "sim_sel";
|
||||
gpio-export,output = <1>;
|
||||
gpios = <&shift_io 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&shift_io 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&shift_io 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_mob {
|
||||
label = "wan_mob_5";
|
||||
gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,82 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-STM32.dtsi"
|
||||
|
||||
/ {
|
||||
model = "RUTXR1 STM32";
|
||||
|
||||
soc {
|
||||
gpio-export {
|
||||
compatible = "gpio-export";
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_modem_reset {
|
||||
gpio-export,name = "modem_reset";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_modem_power {
|
||||
gpio-export,name = "modem_power";
|
||||
gpio-export,output = <0>;
|
||||
gpios = <&stm32_io 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_sim_select {
|
||||
gpio-export,name = "sim_sel";
|
||||
gpio-export,output = <1>;
|
||||
gpios = <&stm32_io 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_wan_sim1 {
|
||||
label = "wan_sim_1";
|
||||
gpios = <&stm32_io 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_sim2 {
|
||||
label = "wan_sim_2";
|
||||
gpios = <&stm32_io 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_eth {
|
||||
label = "wan_eth_3";
|
||||
gpios = <&stm32_io 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_wan_mob {
|
||||
label = "wan_mob_5";
|
||||
gpios = <&stm32_io 16 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_3 {
|
||||
label = "mob_gen_3";
|
||||
gpios = <&stm32_io 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_gen_4 {
|
||||
label = "mob_gen_4";
|
||||
gpios = <&stm32_io 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_ssid_1 {
|
||||
label = "mob_ssid_1";
|
||||
gpios = <&stm32_io 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_3 {
|
||||
label = "mob_ssid_3";
|
||||
gpios = <&stm32_io 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led_ssid_5 {
|
||||
label = "mob_ssid_5";
|
||||
gpios = <&stm32_io 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,21 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-common.dtsi"
|
||||
#include "qcom-ipq4018-rutx-i2c.dtsi"
|
||||
|
||||
/ {
|
||||
io_expander = "stm32";
|
||||
|
||||
soc {
|
||||
i2c_0: i2c@78b7000 {
|
||||
stm32_io: stm32@74 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "tlt,stm32v1";
|
||||
reg = <0x74>;
|
||||
gpio-controller;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <5 2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,84 +0,0 @@
|
|||
#include "qcom-ipq4019-ap.dk01.1.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "platform_name.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "teltonika,rutx", "qcom,ap-dk01.1-c2", "qcom,ipq4019";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
mdio@90000 {
|
||||
status = "ok";
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy-reset-gpio = <&tlmm 62 0>;
|
||||
|
||||
ethphy4: ethernet-phy@4 {
|
||||
qcom,fiber-enable;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@1000000 {
|
||||
mdio_pins: mdio_pinmux {
|
||||
mux_1 {
|
||||
pins = "gpio53";
|
||||
function = "mdio";
|
||||
bias-pull-up;
|
||||
};
|
||||
mux_2 {
|
||||
pins = "gpio52";
|
||||
function = "mdc";
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi_0: spi@78b5000 {
|
||||
cs-gpios = <&tlmm 54 0>, <&tlmm 63 0>;
|
||||
num-cs = <2>;
|
||||
|
||||
mx25l25635f@0 {
|
||||
compatible = "n25q128a11", "mx25l25635f", "jedec,spi-nor";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0>;
|
||||
spi-max-frequency = <24000000>;
|
||||
};
|
||||
|
||||
mt29f@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-nand","spinand,mt29f";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
gpios = <&tlmm 4 1>;
|
||||
linux,code = <0x198>;
|
||||
};
|
||||
};
|
||||
|
||||
usb3: usb3@8af8800 {
|
||||
dwc3@8a00000 {
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_u3_susphy_quirk;
|
||||
};
|
||||
};
|
||||
|
||||
usb2: usb2@60f8800 {
|
||||
dwc3@6000000 {
|
||||
snps,dis_u2_susphy_quirk;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,20 +0,0 @@
|
|||
/ {
|
||||
soc {
|
||||
pinctrl@1000000 {
|
||||
i2c_0_pins: i2c_0_pinmux {
|
||||
mux {
|
||||
pins = "gpio58", "gpio59";
|
||||
function = "blsp_i2c0";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */
|
||||
pinctrl-0 = <&i2c_0_pins>;
|
||||
pinctrl-names = "default";
|
||||
clock-frequency = <400000>;
|
||||
status = "ok";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
#include "qcom-ipq4018-rutx-common.dtsi"
|
||||
|
||||
/ {
|
||||
io_expander = "shiftreg_1";
|
||||
|
||||
soc {
|
||||
ext_io {
|
||||
compatible = "spi-gpio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio-sck = <&tlmm 1 GPIO_ACTIVE_HIGH>; // SRCLK
|
||||
gpio-mosi = <&tlmm 3 GPIO_ACTIVE_HIGH>; // SER
|
||||
cs-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; // RCLK
|
||||
num-chipselects = <1>;
|
||||
|
||||
shift_io: shift_io@0 {
|
||||
compatible = "fairchild,74hc595";
|
||||
reg = <0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
registers-number = <3>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,859 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (c) 2020 Sartura Ltd.
|
||||
*
|
||||
* Author: Robert Marko <robert.marko@sartura.hr>
|
||||
*
|
||||
* Qualcomm QCA8072 and QCA8075 PHY driver
|
||||
*/
|
||||
|
||||
#include <linux/version.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/phy.h>
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/ethtool_netlink.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/sfp.h>
|
||||
|
||||
#include <dt-bindings/net/qcom-qca807x.h>
|
||||
|
||||
#define PHY_ID_QCA8072 0x004dd0b2
|
||||
#define PHY_ID_QCA8075 0x004dd0b1
|
||||
#define PHY_ID_QCA807X_PSGMII 0x06820805
|
||||
|
||||
/* Downshift */
|
||||
#define QCA807X_SMARTSPEED_EN BIT(5)
|
||||
#define QCA807X_SMARTSPEED_RETRY_LIMIT_MASK GENMASK(4, 2)
|
||||
#define QCA807X_SMARTSPEED_RETRY_LIMIT_DEFAULT 5
|
||||
#define QCA807X_SMARTSPEED_RETRY_LIMIT_MIN 2
|
||||
#define QCA807X_SMARTSPEED_RETRY_LIMIT_MAX 9
|
||||
|
||||
/* Cable diagnostic test (CDT) */
|
||||
#define QCA807X_CDT 0x16
|
||||
#define QCA807X_CDT_ENABLE BIT(15)
|
||||
#define QCA807X_CDT_ENABLE_INTER_PAIR_SHORT BIT(13)
|
||||
#define QCA807X_CDT_STATUS BIT(11)
|
||||
#define QCA807X_CDT_MMD3_STATUS 0x8064
|
||||
#define QCA807X_CDT_MDI0_STATUS_MASK GENMASK(15, 12)
|
||||
#define QCA807X_CDT_MDI1_STATUS_MASK GENMASK(11, 8)
|
||||
#define QCA807X_CDT_MDI2_STATUS_MASK GENMASK(7, 4)
|
||||
#define QCA807X_CDT_MDI3_STATUS_MASK GENMASK(3, 0)
|
||||
#define QCA807X_CDT_RESULTS_INVALID 0x0
|
||||
#define QCA807X_CDT_RESULTS_OK 0x1
|
||||
#define QCA807X_CDT_RESULTS_OPEN 0x2
|
||||
#define QCA807X_CDT_RESULTS_SAME_SHORT 0x3
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK 0x4
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK 0x8
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK 0xc
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN 0x6
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN 0xa
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN 0xe
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT 0x7
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT 0xb
|
||||
#define QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT 0xf
|
||||
#define QCA807X_CDT_RESULTS_BUSY 0x9
|
||||
#define QCA807X_CDT_MMD3_MDI0_LENGTH 0x8065
|
||||
#define QCA807X_CDT_MMD3_MDI1_LENGTH 0x8066
|
||||
#define QCA807X_CDT_MMD3_MDI2_LENGTH 0x8067
|
||||
#define QCA807X_CDT_MMD3_MDI3_LENGTH 0x8068
|
||||
#define QCA807X_CDT_SAME_SHORT_LENGTH_MASK GENMASK(15, 8)
|
||||
#define QCA807X_CDT_CROSS_SHORT_LENGTH_MASK GENMASK(7, 0)
|
||||
|
||||
#define QCA807X_CHIP_CONFIGURATION 0x1f
|
||||
#define QCA807X_BT_BX_REG_SEL BIT(15)
|
||||
#define QCA807X_BT_BX_REG_SEL_FIBER 0
|
||||
#define QCA807X_BT_BX_REG_SEL_COPPER 1
|
||||
#define QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK GENMASK(3, 0)
|
||||
#define QCA807X_CHIP_CONFIGURATION_MODE_QSGMII_SGMII 4
|
||||
#define QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER 3
|
||||
#define QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_ALL_COPPER 0
|
||||
|
||||
#define QCA807X_MEDIA_SELECT_STATUS 0x1a
|
||||
#define QCA807X_MEDIA_DETECTED_COPPER BIT(5)
|
||||
#define QCA807X_MEDIA_DETECTED_1000_BASE_X BIT(4)
|
||||
#define QCA807X_MEDIA_DETECTED_100_BASE_FX BIT(3)
|
||||
|
||||
#define QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION 0x807e
|
||||
#define QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION_EN BIT(0)
|
||||
|
||||
#define QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH 0x801a
|
||||
#define QCA807X_CONTROL_DAC_MASK GENMASK(2, 0)
|
||||
|
||||
#define QCA807X_MMD7_LED_100N_1 0x8074
|
||||
#define QCA807X_MMD7_LED_100N_2 0x8075
|
||||
#define QCA807X_MMD7_LED_1000N_1 0x8076
|
||||
#define QCA807X_MMD7_LED_1000N_2 0x8077
|
||||
#define QCA807X_LED_TXACT_BLK_EN_2 BIT(10)
|
||||
#define QCA807X_LED_RXACT_BLK_EN_2 BIT(9)
|
||||
#define QCA807X_LED_GT_ON_EN_2 BIT(6)
|
||||
#define QCA807X_LED_HT_ON_EN_2 BIT(5)
|
||||
#define QCA807X_LED_BT_ON_EN_2 BIT(4)
|
||||
#define QCA807X_GPIO_FORCE_EN BIT(15)
|
||||
#define QCA807X_GPIO_FORCE_MODE_MASK GENMASK(14, 13)
|
||||
|
||||
#define QCA807X_INTR_ENABLE 0x12
|
||||
#define QCA807X_INTR_STATUS 0x13
|
||||
#define QCA807X_INTR_ENABLE_AUTONEG_ERR BIT(15)
|
||||
#define QCA807X_INTR_ENABLE_SPEED_CHANGED BIT(14)
|
||||
#define QCA807X_INTR_ENABLE_DUPLEX_CHANGED BIT(13)
|
||||
#define QCA807X_INTR_ENABLE_LINK_FAIL BIT(11)
|
||||
#define QCA807X_INTR_ENABLE_LINK_SUCCESS BIT(10)
|
||||
|
||||
#define QCA807X_FUNCTION_CONTROL 0x10
|
||||
#define QCA807X_FC_MDI_CROSSOVER_MODE_MASK GENMASK(6, 5)
|
||||
#define QCA807X_FC_MDI_CROSSOVER_AUTO 3
|
||||
#define QCA807X_FC_MDI_CROSSOVER_MANUAL_MDIX 1
|
||||
#define QCA807X_FC_MDI_CROSSOVER_MANUAL_MDI 0
|
||||
|
||||
#define QCA807X_PHY_SPECIFIC_STATUS 0x11
|
||||
#define QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED BIT(11)
|
||||
#define QCA807X_SS_SPEED_MASK GENMASK(15, 14)
|
||||
#define QCA807X_SS_SPEED_1000 2
|
||||
#define QCA807X_SS_SPEED_100 1
|
||||
#define QCA807X_SS_SPEED_10 0
|
||||
#define QCA807X_SS_DUPLEX BIT(13)
|
||||
#define QCA807X_SS_MDIX BIT(6)
|
||||
|
||||
/* PSGMII PHY specific */
|
||||
#define PSGMII_QSGMII_DRIVE_CONTROL_1 0xb
|
||||
#define PSGMII_QSGMII_TX_DRIVER_MASK GENMASK(7, 4)
|
||||
#define PSGMII_MODE_CTRL 0x6d
|
||||
#define PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK BIT(0)
|
||||
#define PSGMII_MMD3_SERDES_CONTROL 0x805a
|
||||
|
||||
struct qca807x_gpio_priv {
|
||||
struct phy_device *phy;
|
||||
};
|
||||
|
||||
static int qca807x_get_downshift(struct phy_device *phydev, u8 *data)
|
||||
{
|
||||
int val, cnt, enable;
|
||||
|
||||
val = phy_read(phydev, MII_NWAYTEST);
|
||||
if (val < 0)
|
||||
return val;
|
||||
|
||||
enable = FIELD_GET(QCA807X_SMARTSPEED_EN, val);
|
||||
cnt = FIELD_GET(QCA807X_SMARTSPEED_RETRY_LIMIT_MASK, val) + 2;
|
||||
|
||||
*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_set_downshift(struct phy_device *phydev, u8 cnt)
|
||||
{
|
||||
int ret, val;
|
||||
|
||||
if (cnt > QCA807X_SMARTSPEED_RETRY_LIMIT_MAX ||
|
||||
(cnt < QCA807X_SMARTSPEED_RETRY_LIMIT_MIN && cnt != DOWNSHIFT_DEV_DISABLE))
|
||||
return -EINVAL;
|
||||
|
||||
if (!cnt) {
|
||||
ret = phy_clear_bits(phydev, MII_NWAYTEST, QCA807X_SMARTSPEED_EN);
|
||||
} else {
|
||||
val = QCA807X_SMARTSPEED_EN;
|
||||
val |= FIELD_PREP(QCA807X_SMARTSPEED_RETRY_LIMIT_MASK, cnt - 2);
|
||||
|
||||
phy_modify(phydev, MII_NWAYTEST,
|
||||
QCA807X_SMARTSPEED_EN |
|
||||
QCA807X_SMARTSPEED_RETRY_LIMIT_MASK,
|
||||
val);
|
||||
}
|
||||
|
||||
ret = genphy_soft_reset(phydev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int qca807x_get_tunable(struct phy_device *phydev,
|
||||
struct ethtool_tunable *tuna, void *data)
|
||||
{
|
||||
switch (tuna->id) {
|
||||
case ETHTOOL_PHY_DOWNSHIFT:
|
||||
return qca807x_get_downshift(phydev, data);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
static int qca807x_set_tunable(struct phy_device *phydev,
|
||||
struct ethtool_tunable *tuna, const void *data)
|
||||
{
|
||||
switch (tuna->id) {
|
||||
case ETHTOOL_PHY_DOWNSHIFT:
|
||||
return qca807x_set_downshift(phydev, *(const u8 *)data);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
static bool qca807x_distance_valid(int result)
|
||||
{
|
||||
switch (result) {
|
||||
case QCA807X_CDT_RESULTS_OPEN:
|
||||
case QCA807X_CDT_RESULTS_SAME_SHORT:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT:
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
static int qca807x_report_length(struct phy_device *phydev,
|
||||
int pair, int result)
|
||||
{
|
||||
int length;
|
||||
int ret;
|
||||
|
||||
ret = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA807X_CDT_MMD3_MDI0_LENGTH + pair);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
switch (result) {
|
||||
case ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT:
|
||||
length = (FIELD_GET(QCA807X_CDT_SAME_SHORT_LENGTH_MASK, ret) * 800) / 10;
|
||||
break;
|
||||
case ETHTOOL_A_CABLE_RESULT_CODE_OPEN:
|
||||
case ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT:
|
||||
length = (FIELD_GET(QCA807X_CDT_CROSS_SHORT_LENGTH_MASK, ret) * 800) / 10;
|
||||
break;
|
||||
}
|
||||
|
||||
ethnl_cable_test_fault_length(phydev, pair, length);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_cable_test_report_trans(int result)
|
||||
{
|
||||
switch (result) {
|
||||
case QCA807X_CDT_RESULTS_OK:
|
||||
return ETHTOOL_A_CABLE_RESULT_CODE_OK;
|
||||
case QCA807X_CDT_RESULTS_OPEN:
|
||||
return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
|
||||
case QCA807X_CDT_RESULTS_SAME_SHORT:
|
||||
return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OK:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_OPEN:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI1_SAME_SHORT:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI2_SAME_SHORT:
|
||||
case QCA807X_CDT_RESULTS_CROSS_SHORT_WITH_MDI3_SAME_SHORT:
|
||||
return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
|
||||
default:
|
||||
return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
|
||||
}
|
||||
}
|
||||
|
||||
static int qca807x_cable_test_report(struct phy_device *phydev)
|
||||
{
|
||||
int pair0, pair1, pair2, pair3;
|
||||
int ret;
|
||||
|
||||
ret = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA807X_CDT_MMD3_STATUS);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
pair0 = FIELD_GET(QCA807X_CDT_MDI0_STATUS_MASK, ret);
|
||||
pair1 = FIELD_GET(QCA807X_CDT_MDI1_STATUS_MASK, ret);
|
||||
pair2 = FIELD_GET(QCA807X_CDT_MDI2_STATUS_MASK, ret);
|
||||
pair3 = FIELD_GET(QCA807X_CDT_MDI3_STATUS_MASK, ret);
|
||||
|
||||
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
|
||||
qca807x_cable_test_report_trans(pair0));
|
||||
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
|
||||
qca807x_cable_test_report_trans(pair1));
|
||||
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
|
||||
qca807x_cable_test_report_trans(pair2));
|
||||
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
|
||||
qca807x_cable_test_report_trans(pair3));
|
||||
|
||||
if (qca807x_distance_valid(pair0))
|
||||
qca807x_report_length(phydev, 0, qca807x_cable_test_report_trans(pair0));
|
||||
if (qca807x_distance_valid(pair1))
|
||||
qca807x_report_length(phydev, 1, qca807x_cable_test_report_trans(pair1));
|
||||
if (qca807x_distance_valid(pair2))
|
||||
qca807x_report_length(phydev, 2, qca807x_cable_test_report_trans(pair2));
|
||||
if (qca807x_distance_valid(pair3))
|
||||
qca807x_report_length(phydev, 3, qca807x_cable_test_report_trans(pair3));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_cable_test_get_status(struct phy_device *phydev,
|
||||
bool *finished)
|
||||
{
|
||||
int val;
|
||||
|
||||
*finished = false;
|
||||
|
||||
val = phy_read(phydev, QCA807X_CDT);
|
||||
if (!((val & QCA807X_CDT_ENABLE) && (val & QCA807X_CDT_STATUS))) {
|
||||
*finished = true;
|
||||
|
||||
return qca807x_cable_test_report(phydev);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_cable_test_start(struct phy_device *phydev)
|
||||
{
|
||||
int val, ret;
|
||||
|
||||
val = phy_read(phydev, QCA807X_CDT);
|
||||
/* Enable inter-pair short check as well */
|
||||
val &= ~QCA807X_CDT_ENABLE_INTER_PAIR_SHORT;
|
||||
val |= QCA807X_CDT_ENABLE;
|
||||
ret = phy_write(phydev, QCA807X_CDT, val);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_GPIOLIB
|
||||
static int qca807x_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
return GPIO_LINE_DIRECTION_OUT;
|
||||
}
|
||||
|
||||
static int qca807x_gpio_get_reg(unsigned int offset)
|
||||
{
|
||||
return QCA807X_MMD7_LED_100N_2 + (offset % 2) * 2;
|
||||
}
|
||||
|
||||
static int qca807x_gpio_get(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
struct qca807x_gpio_priv *priv = gpiochip_get_data(gc);
|
||||
int val;
|
||||
|
||||
val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
|
||||
|
||||
return FIELD_GET(QCA807X_GPIO_FORCE_MODE_MASK, val);
|
||||
}
|
||||
|
||||
static void qca807x_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
|
||||
{
|
||||
struct qca807x_gpio_priv *priv = gpiochip_get_data(gc);
|
||||
int val;
|
||||
|
||||
val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
|
||||
val &= ~QCA807X_GPIO_FORCE_MODE_MASK;
|
||||
val |= QCA807X_GPIO_FORCE_EN;
|
||||
val |= FIELD_PREP(QCA807X_GPIO_FORCE_MODE_MASK, value);
|
||||
|
||||
phy_write_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset), val);
|
||||
}
|
||||
|
||||
static int qca807x_gpio_dir_out(struct gpio_chip *gc, unsigned int offset, int value)
|
||||
{
|
||||
qca807x_gpio_set(gc, offset, value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_gpio(struct phy_device *phydev)
|
||||
{
|
||||
struct device *dev = &phydev->mdio.dev;
|
||||
struct qca807x_gpio_priv *priv;
|
||||
struct gpio_chip *gc;
|
||||
|
||||
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->phy = phydev;
|
||||
|
||||
gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
|
||||
if (!gc)
|
||||
return -ENOMEM;
|
||||
|
||||
gc->label = dev_name(dev);
|
||||
gc->base = -1;
|
||||
gc->ngpio = 2;
|
||||
gc->parent = dev;
|
||||
gc->owner = THIS_MODULE;
|
||||
gc->can_sleep = true;
|
||||
gc->get_direction = qca807x_gpio_get_direction;
|
||||
gc->direction_output = qca807x_gpio_dir_out;
|
||||
gc->get = qca807x_gpio_get;
|
||||
gc->set = qca807x_gpio_set;
|
||||
|
||||
return devm_gpiochip_add_data(dev, gc, priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
static int qca807x_read_copper_status(struct phy_device *phydev)
|
||||
{
|
||||
int ss, err, old_link = phydev->link;
|
||||
|
||||
/* Update the link, but return if there was an error */
|
||||
err = genphy_update_link(phydev);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* why bother the PHY if nothing can have changed */
|
||||
if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link)
|
||||
return 0;
|
||||
|
||||
phydev->speed = SPEED_UNKNOWN;
|
||||
phydev->duplex = DUPLEX_UNKNOWN;
|
||||
phydev->pause = 0;
|
||||
phydev->asym_pause = 0;
|
||||
|
||||
err = genphy_read_lpa(phydev);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* Read the QCA807x PHY-Specific Status register copper page,
|
||||
* which indicates the speed and duplex that the PHY is actually
|
||||
* using, irrespective of whether we are in autoneg mode or not.
|
||||
*/
|
||||
ss = phy_read(phydev, QCA807X_PHY_SPECIFIC_STATUS);
|
||||
if (ss < 0)
|
||||
return ss;
|
||||
|
||||
if (ss & QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED) {
|
||||
int sfc;
|
||||
|
||||
sfc = phy_read(phydev, QCA807X_FUNCTION_CONTROL);
|
||||
if (sfc < 0)
|
||||
return sfc;
|
||||
|
||||
switch (FIELD_GET(QCA807X_SS_SPEED_MASK, ss)) {
|
||||
case QCA807X_SS_SPEED_10:
|
||||
phydev->speed = SPEED_10;
|
||||
break;
|
||||
case QCA807X_SS_SPEED_100:
|
||||
phydev->speed = SPEED_100;
|
||||
break;
|
||||
case QCA807X_SS_SPEED_1000:
|
||||
phydev->speed = SPEED_1000;
|
||||
break;
|
||||
}
|
||||
if (ss & QCA807X_SS_DUPLEX)
|
||||
phydev->duplex = DUPLEX_FULL;
|
||||
else
|
||||
phydev->duplex = DUPLEX_HALF;
|
||||
|
||||
if (ss & QCA807X_SS_MDIX)
|
||||
phydev->mdix = ETH_TP_MDI_X;
|
||||
else
|
||||
phydev->mdix = ETH_TP_MDI;
|
||||
|
||||
switch (FIELD_GET(QCA807X_FC_MDI_CROSSOVER_MODE_MASK, sfc)) {
|
||||
case QCA807X_FC_MDI_CROSSOVER_MANUAL_MDI:
|
||||
phydev->mdix_ctrl = ETH_TP_MDI;
|
||||
break;
|
||||
case QCA807X_FC_MDI_CROSSOVER_MANUAL_MDIX:
|
||||
phydev->mdix_ctrl = ETH_TP_MDI_X;
|
||||
break;
|
||||
case QCA807X_FC_MDI_CROSSOVER_AUTO:
|
||||
phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete)
|
||||
phy_resolve_aneg_pause(phydev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_read_fiber_status(struct phy_device *phydev)
|
||||
{
|
||||
int ss, err, lpa, old_link = phydev->link;
|
||||
|
||||
/* Update the link, but return if there was an error */
|
||||
err = genphy_update_link(phydev);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* why bother the PHY if nothing can have changed */
|
||||
if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link)
|
||||
return 0;
|
||||
|
||||
phydev->speed = SPEED_UNKNOWN;
|
||||
phydev->duplex = DUPLEX_UNKNOWN;
|
||||
phydev->pause = 0;
|
||||
phydev->asym_pause = 0;
|
||||
|
||||
if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
|
||||
lpa = phy_read(phydev, MII_LPA);
|
||||
if (lpa < 0)
|
||||
return lpa;
|
||||
|
||||
linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
|
||||
phydev->lp_advertising, lpa & LPA_LPACK);
|
||||
linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
|
||||
phydev->lp_advertising, lpa & LPA_1000XFULL);
|
||||
linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
|
||||
phydev->lp_advertising, lpa & LPA_1000XPAUSE);
|
||||
linkmode_mod_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
|
||||
phydev->lp_advertising,
|
||||
lpa & LPA_1000XPAUSE_ASYM);
|
||||
|
||||
phy_resolve_aneg_linkmode(phydev);
|
||||
}
|
||||
|
||||
/* Read the QCA807x PHY-Specific Status register fiber page,
|
||||
* which indicates the speed and duplex that the PHY is actually
|
||||
* using, irrespective of whether we are in autoneg mode or not.
|
||||
*/
|
||||
ss = phy_read(phydev, QCA807X_PHY_SPECIFIC_STATUS);
|
||||
if (ss < 0)
|
||||
return ss;
|
||||
|
||||
if (ss & QCA807X_SS_SPEED_AND_DUPLEX_RESOLVED) {
|
||||
switch (FIELD_GET(QCA807X_SS_SPEED_MASK, ss)) {
|
||||
case QCA807X_SS_SPEED_100:
|
||||
phydev->speed = SPEED_100;
|
||||
break;
|
||||
case QCA807X_SS_SPEED_1000:
|
||||
phydev->speed = SPEED_1000;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ss & QCA807X_SS_DUPLEX)
|
||||
phydev->duplex = DUPLEX_FULL;
|
||||
else
|
||||
phydev->duplex = DUPLEX_HALF;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_read_status(struct phy_device *phydev)
|
||||
{
|
||||
if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) {
|
||||
switch (phydev->port) {
|
||||
case PORT_FIBRE:
|
||||
return qca807x_read_fiber_status(phydev);
|
||||
case PORT_TP:
|
||||
return qca807x_read_copper_status(phydev);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
} else
|
||||
return qca807x_read_copper_status(phydev);
|
||||
}
|
||||
|
||||
static int qca807x_config_intr(struct phy_device *phydev)
|
||||
{
|
||||
int ret, val;
|
||||
|
||||
val = phy_read(phydev, QCA807X_INTR_ENABLE);
|
||||
|
||||
if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
|
||||
/* Check for combo port as it has fewer interrupts */
|
||||
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
|
||||
val |= QCA807X_INTR_ENABLE_SPEED_CHANGED;
|
||||
val |= QCA807X_INTR_ENABLE_LINK_FAIL;
|
||||
val |= QCA807X_INTR_ENABLE_LINK_SUCCESS;
|
||||
} else {
|
||||
val |= QCA807X_INTR_ENABLE_AUTONEG_ERR;
|
||||
val |= QCA807X_INTR_ENABLE_SPEED_CHANGED;
|
||||
val |= QCA807X_INTR_ENABLE_DUPLEX_CHANGED;
|
||||
val |= QCA807X_INTR_ENABLE_LINK_FAIL;
|
||||
val |= QCA807X_INTR_ENABLE_LINK_SUCCESS;
|
||||
}
|
||||
ret = phy_write(phydev, QCA807X_INTR_ENABLE, val);
|
||||
} else {
|
||||
ret = phy_write(phydev, QCA807X_INTR_ENABLE, 0);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
|
||||
static int qca807x_ack_intr(struct phy_device *phydev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = phy_read(phydev, QCA807X_INTR_STATUS);
|
||||
|
||||
return (ret < 0) ? ret : 0;
|
||||
}
|
||||
#else
|
||||
static irqreturn_t qca807x_handle_interrupt(struct phy_device *phydev)
|
||||
{
|
||||
int irq_status, int_enabled;
|
||||
|
||||
irq_status = phy_read(phydev, QCA807X_INTR_STATUS);
|
||||
if (irq_status < 0) {
|
||||
phy_error(phydev);
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
/* Read the current enabled interrupts */
|
||||
int_enabled = phy_read(phydev, QCA807X_INTR_ENABLE);
|
||||
if (int_enabled < 0) {
|
||||
phy_error(phydev);
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
/* See if this was one of our enabled interrupts */
|
||||
if (!(irq_status & int_enabled))
|
||||
return IRQ_NONE;
|
||||
|
||||
phy_trigger_machine(phydev);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int qca807x_led_config(struct phy_device *phydev)
|
||||
{
|
||||
struct device_node *node = phydev->mdio.dev.of_node;
|
||||
bool led_config = false;
|
||||
int val;
|
||||
|
||||
val = phy_read_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_LED_1000N_1);
|
||||
if (val < 0)
|
||||
return val;
|
||||
|
||||
if (of_property_read_bool(node, "qcom,single-led-1000")) {
|
||||
val |= QCA807X_LED_TXACT_BLK_EN_2;
|
||||
val |= QCA807X_LED_RXACT_BLK_EN_2;
|
||||
val |= QCA807X_LED_GT_ON_EN_2;
|
||||
|
||||
led_config = true;
|
||||
}
|
||||
|
||||
if (of_property_read_bool(node, "qcom,single-led-100")) {
|
||||
val |= QCA807X_LED_HT_ON_EN_2;
|
||||
|
||||
led_config = true;
|
||||
}
|
||||
|
||||
if (of_property_read_bool(node, "qcom,single-led-10")) {
|
||||
val |= QCA807X_LED_BT_ON_EN_2;
|
||||
|
||||
led_config = true;
|
||||
}
|
||||
|
||||
if (led_config)
|
||||
return phy_write_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_LED_1000N_1, val);
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qca807x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
|
||||
{
|
||||
struct phy_device *phydev = upstream;
|
||||
__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
|
||||
DECLARE_PHY_INTERFACE_MASK(interfaces);
|
||||
phy_interface_t iface;
|
||||
int ret;
|
||||
|
||||
sfp_parse_support(phydev->sfp_bus, id, support, interfaces);
|
||||
iface = sfp_select_interface(phydev->sfp_bus, support);
|
||||
|
||||
dev_info(&phydev->mdio.dev, "%s SFP module inserted\n", phy_modes(iface));
|
||||
|
||||
switch (iface) {
|
||||
case PHY_INTERFACE_MODE_1000BASEX:
|
||||
case PHY_INTERFACE_MODE_100BASEX:
|
||||
/* Set PHY mode to PSGMII combo (1/4 copper + combo ports) mode */
|
||||
ret = phy_modify(phydev,
|
||||
QCA807X_CHIP_CONFIGURATION,
|
||||
QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK,
|
||||
QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER);
|
||||
/* Enable fiber mode autodection (1000Base-X or 100Base-FX) */
|
||||
ret = phy_set_bits_mmd(phydev,
|
||||
MDIO_MMD_AN,
|
||||
QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION,
|
||||
QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION_EN);
|
||||
/* Select fiber page */
|
||||
ret = phy_clear_bits(phydev,
|
||||
QCA807X_CHIP_CONFIGURATION,
|
||||
QCA807X_BT_BX_REG_SEL);
|
||||
|
||||
phydev->port = PORT_FIBRE;
|
||||
break;
|
||||
default:
|
||||
dev_err(&phydev->mdio.dev, "Incompatible SFP module inserted\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void qca807x_sfp_remove(void *upstream)
|
||||
{
|
||||
struct phy_device *phydev = upstream;
|
||||
|
||||
/* Select copper page */
|
||||
phy_set_bits(phydev,
|
||||
QCA807X_CHIP_CONFIGURATION,
|
||||
QCA807X_BT_BX_REG_SEL);
|
||||
|
||||
phydev->port = PORT_TP;
|
||||
}
|
||||
|
||||
static const struct sfp_upstream_ops qca807x_sfp_ops = {
|
||||
.attach = phy_sfp_attach,
|
||||
.detach = phy_sfp_detach,
|
||||
.module_insert = qca807x_sfp_insert,
|
||||
.module_remove = qca807x_sfp_remove,
|
||||
};
|
||||
|
||||
static int qca807x_config(struct phy_device *phydev)
|
||||
{
|
||||
struct device_node *node = phydev->mdio.dev.of_node;
|
||||
int control_dac, ret = 0;
|
||||
u32 of_control_dac;
|
||||
|
||||
/* Check for Combo port */
|
||||
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
|
||||
int psgmii_serdes;
|
||||
|
||||
/* Prevent PSGMII going into hibernation via PSGMII self test */
|
||||
psgmii_serdes = phy_read_mmd(phydev, MDIO_MMD_PCS, PSGMII_MMD3_SERDES_CONTROL);
|
||||
psgmii_serdes &= ~BIT(1);
|
||||
ret = phy_write_mmd(phydev, MDIO_MMD_PCS,
|
||||
PSGMII_MMD3_SERDES_CONTROL,
|
||||
psgmii_serdes);
|
||||
}
|
||||
|
||||
if (!of_property_read_u32(node, "qcom,control-dac", &of_control_dac)) {
|
||||
control_dac = phy_read_mmd(phydev, MDIO_MMD_AN,
|
||||
QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH);
|
||||
control_dac &= ~QCA807X_CONTROL_DAC_MASK;
|
||||
control_dac |= FIELD_PREP(QCA807X_CONTROL_DAC_MASK, of_control_dac);
|
||||
ret = phy_write_mmd(phydev, MDIO_MMD_AN,
|
||||
QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH,
|
||||
control_dac);
|
||||
}
|
||||
|
||||
/* Optionally configure LED-s */
|
||||
if (IS_ENABLED(CONFIG_GPIOLIB)) {
|
||||
/* Check whether PHY-s pins are used as GPIO-s */
|
||||
if (!of_property_read_bool(node, "gpio-controller"))
|
||||
ret = qca807x_led_config(phydev);
|
||||
} else {
|
||||
ret = qca807x_led_config(phydev);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int qca807x_probe(struct phy_device *phydev)
|
||||
{
|
||||
struct device_node *node = phydev->mdio.dev.of_node;
|
||||
int ret = 0;
|
||||
|
||||
if (IS_ENABLED(CONFIG_GPIOLIB)) {
|
||||
/* Do not register a GPIO controller unless flagged for it */
|
||||
if (of_property_read_bool(node, "gpio-controller"))
|
||||
ret = qca807x_gpio(phydev);
|
||||
}
|
||||
|
||||
/* Attach SFP bus on combo port*/
|
||||
if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
|
||||
ret = phy_sfp_probe(phydev, &qca807x_sfp_ops);
|
||||
linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported);
|
||||
linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->advertising);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int qca807x_psgmii_config(struct phy_device *phydev)
|
||||
{
|
||||
struct device_node *node = phydev->mdio.dev.of_node;
|
||||
int tx_amp, ret = 0;
|
||||
u32 tx_driver_strength;
|
||||
|
||||
/* Workaround to enable AZ transmitting ability */
|
||||
ret = phy_clear_bits_mmd(phydev,
|
||||
MDIO_MMD_PMAPMD,
|
||||
PSGMII_MODE_CTRL,
|
||||
PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK);
|
||||
|
||||
/* PSGMII/QSGMII TX amp set to DT defined value instead of default 600mV */
|
||||
if (!of_property_read_u32(node, "qcom,tx-driver-strength", &tx_driver_strength)) {
|
||||
tx_amp = phy_read(phydev, PSGMII_QSGMII_DRIVE_CONTROL_1);
|
||||
tx_amp &= ~PSGMII_QSGMII_TX_DRIVER_MASK;
|
||||
tx_amp |= FIELD_PREP(PSGMII_QSGMII_TX_DRIVER_MASK, tx_driver_strength);
|
||||
ret = phy_write(phydev, PSGMII_QSGMII_DRIVE_CONTROL_1, tx_amp);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct phy_driver qca807x_drivers[] = {
|
||||
{
|
||||
PHY_ID_MATCH_EXACT(PHY_ID_QCA8072),
|
||||
.name = "Qualcomm QCA8072",
|
||||
.flags = PHY_POLL_CABLE_TEST,
|
||||
/* PHY_GBIT_FEATURES */
|
||||
.probe = qca807x_probe,
|
||||
.config_init = qca807x_config,
|
||||
.read_status = qca807x_read_status,
|
||||
.config_intr = qca807x_config_intr,
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
|
||||
.ack_interrupt = qca807x_ack_intr,
|
||||
#else
|
||||
.handle_interrupt = qca807x_handle_interrupt,
|
||||
#endif
|
||||
.soft_reset = genphy_soft_reset,
|
||||
.get_tunable = qca807x_get_tunable,
|
||||
.set_tunable = qca807x_set_tunable,
|
||||
.resume = genphy_resume,
|
||||
.suspend = genphy_suspend,
|
||||
.cable_test_start = qca807x_cable_test_start,
|
||||
.cable_test_get_status = qca807x_cable_test_get_status,
|
||||
},
|
||||
{
|
||||
PHY_ID_MATCH_EXACT(PHY_ID_QCA8075),
|
||||
.name = "Qualcomm QCA8075",
|
||||
.flags = PHY_POLL_CABLE_TEST,
|
||||
/* PHY_GBIT_FEATURES */
|
||||
.probe = qca807x_probe,
|
||||
.config_init = qca807x_config,
|
||||
.read_status = qca807x_read_status,
|
||||
.config_intr = qca807x_config_intr,
|
||||
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
|
||||
.ack_interrupt = qca807x_ack_intr,
|
||||
#else
|
||||
.handle_interrupt = qca807x_handle_interrupt,
|
||||
#endif
|
||||
.soft_reset = genphy_soft_reset,
|
||||
.get_tunable = qca807x_get_tunable,
|
||||
.set_tunable = qca807x_set_tunable,
|
||||
.resume = genphy_resume,
|
||||
.suspend = genphy_suspend,
|
||||
.cable_test_start = qca807x_cable_test_start,
|
||||
.cable_test_get_status = qca807x_cable_test_get_status,
|
||||
},
|
||||
{
|
||||
PHY_ID_MATCH_EXACT(PHY_ID_QCA807X_PSGMII),
|
||||
.name = "Qualcomm QCA807x PSGMII",
|
||||
.probe = qca807x_psgmii_config,
|
||||
},
|
||||
};
|
||||
module_phy_driver(qca807x_drivers);
|
||||
|
||||
static struct mdio_device_id __maybe_unused qca807x_tbl[] = {
|
||||
{ PHY_ID_MATCH_EXACT(PHY_ID_QCA8072) },
|
||||
{ PHY_ID_MATCH_EXACT(PHY_ID_QCA8075) },
|
||||
{ PHY_ID_MATCH_MODEL(PHY_ID_QCA807X_PSGMII) },
|
||||
{ }
|
||||
};
|
||||
|
||||
MODULE_AUTHOR("Robert Marko");
|
||||
MODULE_DESCRIPTION("Qualcomm QCA807x PHY driver");
|
||||
MODULE_DEVICE_TABLE(mdio, qca807x_tbl);
|
||||
MODULE_LICENSE("GPL");
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,80 +0,0 @@
|
|||
[ipq40xx]
|
||||
dirname=ipq40xx
|
||||
nand_available=true
|
||||
nor_available=true
|
||||
emmc_available=true
|
||||
spi_nand_available=true
|
||||
norplusnand_available=true
|
||||
norplusemmc_available=false
|
||||
nand_pagesize=2048
|
||||
nand_pages_per_block=64
|
||||
nand_total_blocks=4096
|
||||
nand_partition=nand-partition.xml
|
||||
nor_pagesize=256
|
||||
nor_pages_per_block=256
|
||||
nor_total_blocks=512
|
||||
nor_partition=nor-partition.xml
|
||||
bootconfig=bootconfig.xml
|
||||
nand_bootconfig=nand_bootconfig.bin
|
||||
nor_bootconfig=nor_bootconfig.bin
|
||||
bootconfig1=bootconfig1.xml
|
||||
nand_bootconfig1=nand_bootconfig1.bin
|
||||
nor_bootconfig1=nor_bootconfig1.bin
|
||||
emmc_pagesize=512
|
||||
emmc_blocksize=512
|
||||
emmc_total_blocks=7634944
|
||||
emmc_partition=emmc-partition.xml
|
||||
smem_info=["smem-ipq40xx.xml"]
|
||||
cdt_info=["pcddr_40xx.xml"]
|
||||
cdt_info_default=pcddr_40xx.xml
|
||||
nand_partition_mbn=nand-system-partition-ipq40xx.bin
|
||||
nor_partition_mbn=nor-system-partition-ipq40xx.bin
|
||||
emmc_partition_mbn=gpt_main0.bin
|
||||
nand_flash_conf=nand-apps-flash.conf
|
||||
nor_flash_conf=nor-apps-flash.conf
|
||||
emmc_flash_conf=emmc-apps-flash.conf
|
||||
machid=0x8010000
|
||||
norplusnand_partition=nor-plus-nand-parition.xml
|
||||
norplusnand_flash_conf=norplusnand-apps-flash.conf
|
||||
norplusnand_partition_mbn=norplusnand-system-partition-ipq40xx.bin
|
||||
|
||||
|
||||
[AP.DK01.1-C2]
|
||||
dirname=AP.DK01.1-C2
|
||||
nand_available=false
|
||||
nor_available=false
|
||||
emmc_available=false
|
||||
spi_nand_available=true
|
||||
norplusnand_available=true
|
||||
norplusemmc_available=false
|
||||
nand_pagesize=2048
|
||||
nand_pages_per_block=64
|
||||
nand_total_blocks=4096
|
||||
nand_partition=nand-partition.xml
|
||||
nor_pagesize=256
|
||||
nor_pages_per_block=256
|
||||
nor_total_blocks=512
|
||||
nor_partition=nor-partition.xml
|
||||
bootconfig=bootconfig.xml
|
||||
nand_bootconfig=nand_bootconfig.bin
|
||||
nor_bootconfig=nor_bootconfig.bin
|
||||
bootconfig1=bootconfig1.xml
|
||||
nand_bootconfig1=nand_bootconfig1.bin
|
||||
nor_bootconfig1=nor_bootconfig1.bin
|
||||
emmc_pagesize=512
|
||||
emmc_blocksize=512
|
||||
emmc_total_blocks=7634944
|
||||
emmc_partition=emmc-partition.xml
|
||||
smem_info=["smem-AP.DK01.1-C2.xml"]
|
||||
cdt_info=["pcddr_AP.DK01.1-C2_64M16.xml", "pcddr_AP.DK01.1-C2_128M16.xml", "pcddr_AP.DK01.1-C2_256M16.xml"]
|
||||
cdt_info_default=pcddr_AP.DK01.1-C2.xml
|
||||
nand_partition_mbn=nand-system-partition-ipq40xx.bin
|
||||
nor_partition_mbn=nor-system-partition-ipq40xx.bin
|
||||
emmc_partition_mbn=gpt_main0.bin
|
||||
nand_flash_conf=nand-apps-flash.conf
|
||||
nor_flash_conf=nor-apps-flash.conf
|
||||
emmc_flash_conf=emmc-apps-flash.conf
|
||||
machid=0x8010100
|
||||
norplusnand_partition=nor-plus-nand-parition.xml
|
||||
norplusnand_flash_conf=norplusnand-apps-flash.conf
|
||||
norplusnand_partition_mbn=norplusnand-system-partition-ipq40xx.bin
|
||||
|
|
@ -1,79 +0,0 @@
|
|||
[ipq40xx]
|
||||
dirname=ipq40xx
|
||||
nand_available=true
|
||||
nor_available=true
|
||||
emmc_available=true
|
||||
spi_nand_available=true
|
||||
norplusnand_available=true
|
||||
norplusemmc_available=false
|
||||
nand_pagesize=2048
|
||||
nand_pages_per_block=64
|
||||
nand_total_blocks=4096
|
||||
nand_partition=nand-partition.xml
|
||||
nor_pagesize=256
|
||||
nor_pages_per_block=256
|
||||
nor_total_blocks=512
|
||||
nor_partition=nor-partition.xml
|
||||
bootconfig=bootconfig.xml
|
||||
nand_bootconfig=nand_bootconfig.bin
|
||||
nor_bootconfig=nor_bootconfig.bin
|
||||
bootconfig1=bootconfig1.xml
|
||||
nand_bootconfig1=nand_bootconfig1.bin
|
||||
nor_bootconfig1=nor_bootconfig1.bin
|
||||
emmc_pagesize=512
|
||||
emmc_blocksize=512
|
||||
emmc_total_blocks=7634944
|
||||
emmc_partition=emmc-partition.xml
|
||||
smem_info=["smem-ipq40xx.xml"]
|
||||
cdt_info=["pcddr_40xx.xml"]
|
||||
cdt_info_default=pcddr_40xx.xml
|
||||
nand_partition_mbn=nand-system-partition-ipq40xx.bin
|
||||
nor_partition_mbn=nor-system-partition-ipq40xx.bin
|
||||
emmc_partition_mbn=gpt_main0.bin
|
||||
nand_flash_conf=nand-flash.conf
|
||||
nor_flash_conf=nor-flash.conf
|
||||
emmc_flash_conf=emmc-flash.conf
|
||||
machid=0x8010000
|
||||
norplusnand_partition=nor-plus-nand-parition.xml
|
||||
norplusnand_flash_conf=norplusnand-flash.conf
|
||||
norplusnand_partition_mbn=norplusnand-system-partition-ipq40xx.bin
|
||||
|
||||
[AP.DK01.1-C2]
|
||||
dirname=AP.DK01.1-C2
|
||||
nand_available=false
|
||||
nor_available=false
|
||||
emmc_available=false
|
||||
spi_nand_available=true
|
||||
norplusnand_available=true
|
||||
norplusemmc_available=false
|
||||
nand_pagesize=2048
|
||||
nand_pages_per_block=64
|
||||
nand_total_blocks=4096
|
||||
nand_partition=nand-partition.xml
|
||||
nor_pagesize=256
|
||||
nor_pages_per_block=256
|
||||
nor_total_blocks=512
|
||||
nor_partition=nor-partition.xml
|
||||
bootconfig=bootconfig.xml
|
||||
nand_bootconfig=nand_bootconfig.bin
|
||||
nor_bootconfig=nor_bootconfig.bin
|
||||
bootconfig1=bootconfig1.xml
|
||||
nand_bootconfig1=nand_bootconfig1.bin
|
||||
nor_bootconfig1=nor_bootconfig1.bin
|
||||
emmc_pagesize=512
|
||||
emmc_blocksize=512
|
||||
emmc_total_blocks=7634944
|
||||
emmc_partition=emmc-partition.xml
|
||||
smem_info=["smem-AP.DK01.1-C2.xml"]
|
||||
cdt_info=["pcddr_AP.DK01.1-C2_64M16.xml", "pcddr_AP.DK01.1-C2_128M16.xml", "pcddr_AP.DK01.1-C2_256M16.xml"]
|
||||
cdt_info_default=pcddr_AP.DK01.1-C2.xml
|
||||
nand_partition_mbn=nand-system-partition-ipq40xx.bin
|
||||
nor_partition_mbn=nor-system-partition-ipq40xx.bin
|
||||
emmc_partition_mbn=gpt_main0.bin
|
||||
nand_flash_conf=nand-flash.conf
|
||||
nor_flash_conf=nor-flash.conf
|
||||
emmc_flash_conf=emmc-flash.conf
|
||||
machid=0x8010100
|
||||
norplusnand_partition=nor-plus-nand-parition.xml
|
||||
norplusnand_flash_conf=norplusnand-flash.conf
|
||||
norplusnand_partition_mbn=norplusnand-system-partition-ipq40xx.bin
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
[ubi]
|
||||
partition = rootfs
|
||||
filename = file.ubi
|
||||
|
||||
[ubi_1]
|
||||
partition = rootfs_1
|
||||
filename = file.ubi
|
||||
primary = ubi
|
||||
|
||||
[u-boot]
|
||||
partition = 0:APPSBL
|
||||
filename = file.elf
|
||||
|
||||
[u-boot_1]
|
||||
partition = 0:APPSBL_1
|
||||
filename = file.elf
|
||||
primary = u-boot
|
||||
|
|
@ -1,53 +0,0 @@
|
|||
[mibib]
|
||||
partition = 0:MIBIB
|
||||
filename = norplusnand-system-partition-ipq40xx.bin
|
||||
|
||||
[sbl1]
|
||||
partition = 0:SBL1
|
||||
filename = sbl1_nor.mbn
|
||||
|
||||
[bootconfig]
|
||||
partition = 0:BOOTCONFIG
|
||||
filename = nor_bootconfig.bin
|
||||
|
||||
[bootconfig_1]
|
||||
partition = 0:BOOTCONFIG1
|
||||
filename = nor_bootconfig1.bin
|
||||
|
||||
[ddr-teltonika,rutx]
|
||||
partition = 0:CDT
|
||||
filename = cdt-AP.DK01.1-C2.bin
|
||||
if_machid = 0x8010100
|
||||
|
||||
[ddr-teltonika,rutx_1]
|
||||
partition = 0:CDT_1
|
||||
filename = cdt-AP.DK01.1-C2.bin
|
||||
if_machid = 0x8010100
|
||||
primary = ddr-teltonika,rutx
|
||||
|
||||
[tz]
|
||||
partition = 0:QSEE
|
||||
filename = tz.mbn
|
||||
|
||||
[tz_1]
|
||||
partition = 0:QSEE_1
|
||||
filename = tz.mbn
|
||||
primary = tz
|
||||
|
||||
[u-boot]
|
||||
partition = 0:APPSBL
|
||||
filename = file.elf
|
||||
|
||||
[u-boot_1]
|
||||
partition = 0:APPSBL_1
|
||||
filename = file.elf
|
||||
primary = u-boot
|
||||
|
||||
[ubi]
|
||||
partition = rootfs
|
||||
filename = file.ubi
|
||||
|
||||
[ubi_1]
|
||||
partition = rootfs_1
|
||||
filename = file.ubi
|
||||
primary = ubi
|
||||
Binary file not shown.
File diff suppressed because it is too large
Load diff
|
|
@ -1,115 +0,0 @@
|
|||
From f2b87dc1028b710ec8ce25808b9d21f92b376184 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Lamparter <chunkeey@googlemail.com>
|
||||
Date: Sun, 11 Mar 2018 14:41:31 +0100
|
||||
Subject: [PATCH 2/2] clk: fix apss cpu overclocking
|
||||
|
||||
There's an interaction issue between the clk changes:"
|
||||
clk: qcom: ipq4019: Add the apss cpu pll divider clock node
|
||||
clk: qcom: ipq4019: remove fixed clocks and add pll clocks
|
||||
" and the cpufreq-dt.
|
||||
|
||||
cpufreq-dt is now spamming the kernel-log with the following:
|
||||
|
||||
[ 1099.190658] cpu cpu0: dev_pm_opp_set_rate: failed to find current OPP
|
||||
for freq 761142857 (-34)
|
||||
|
||||
This only happens on certain devices like the Compex WPJ428
|
||||
and AVM FritzBox!4040. However, other devices like the Asus
|
||||
RT-AC58U and Meraki MR33 work just fine.
|
||||
|
||||
The issue stem from the fact that all higher CPU-Clocks
|
||||
are achieved by switching the clock-parent to the P_DDRPLLAPSS
|
||||
(ddrpllapss). Which is set by Qualcomm's proprietary bootcode
|
||||
as part of the DDR calibration.
|
||||
|
||||
For example, the FB4040 uses 256 MiB Nanya NT5CC128M16IP clocked
|
||||
at round 533 MHz (ddrpllsdcc = 190285714 Hz).
|
||||
|
||||
whereas the 128 MiB Nanya NT5CC64M16GP-DI in the ASUS RT-AC58U is
|
||||
clocked at a slightly higher 537 MHz ( ddrpllsdcc = 192000000 Hz).
|
||||
|
||||
This patch attempts to fix the issue by modifying
|
||||
clk_cpu_div_round_rate(), clk_cpu_div_set_rate(), clk_cpu_div_recalc_rate()
|
||||
to use a new qcom_find_freq_close() function, which returns the closest
|
||||
matching frequency, instead of the next higher. This way, the SoC in
|
||||
the FB4040 (with its max clock speed of 710.4 MHz) will no longer
|
||||
try to overclock to 761 MHz.
|
||||
|
||||
Fixes: d83dcacea18 ("clk: qcom: ipq4019: Add the apss cpu pll divider clock node")
|
||||
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
|
||||
Signed-off-by: John Crispin <john@phrozen.org>
|
||||
---
|
||||
drivers/clk/qcom/gcc-ipq4019.c | 34 +++++++++++++++++++++++++++++++---
|
||||
1 file changed, 31 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/drivers/clk/qcom/gcc-ipq4019.c
|
||||
+++ b/drivers/clk/qcom/gcc-ipq4019.c
|
||||
@@ -1243,6 +1243,29 @@ static const struct clk_fepll_vco gcc_fe
|
||||
.reg = 0x2f020,
|
||||
};
|
||||
|
||||
+
|
||||
+const struct freq_tbl *qcom_find_freq_close(const struct freq_tbl *f,
|
||||
+ unsigned long rate)
|
||||
+{
|
||||
+ const struct freq_tbl *last = NULL;
|
||||
+
|
||||
+ for ( ; f->freq; f++) {
|
||||
+ if (rate == f->freq)
|
||||
+ return f;
|
||||
+
|
||||
+ if (f->freq > rate) {
|
||||
+ if (!last ||
|
||||
+ (f->freq - rate) < (rate - last->freq))
|
||||
+ return f;
|
||||
+ else
|
||||
+ return last;
|
||||
+ }
|
||||
+ last = f;
|
||||
+ }
|
||||
+
|
||||
+ return last;
|
||||
+}
|
||||
+
|
||||
/*
|
||||
* Round rate function for APSS CPU PLL Clock divider.
|
||||
* It looks up the frequency table and returns the next higher frequency
|
||||
@@ -1255,7 +1278,7 @@ static long clk_cpu_div_round_rate(struc
|
||||
struct clk_hw *p_hw;
|
||||
const struct freq_tbl *f;
|
||||
|
||||
- f = qcom_find_freq(pll->freq_tbl, rate);
|
||||
+ f = qcom_find_freq_close(pll->freq_tbl, rate);
|
||||
if (!f)
|
||||
return -EINVAL;
|
||||
|
||||
@@ -1277,7 +1300,7 @@ static int clk_cpu_div_set_rate(struct c
|
||||
const struct freq_tbl *f;
|
||||
u32 mask;
|
||||
|
||||
- f = qcom_find_freq(pll->freq_tbl, rate);
|
||||
+ f = qcom_find_freq_close(pll->freq_tbl, rate);
|
||||
if (!f)
|
||||
return -EINVAL;
|
||||
|
||||
@@ -1304,6 +1327,7 @@ static unsigned long
|
||||
clk_cpu_div_recalc_rate(struct clk_hw *hw,
|
||||
unsigned long parent_rate)
|
||||
{
|
||||
+ const struct freq_tbl *f;
|
||||
struct clk_fepll *pll = to_clk_fepll(hw);
|
||||
u32 cdiv, pre_div;
|
||||
u64 rate;
|
||||
@@ -1324,7 +1348,11 @@ clk_cpu_div_recalc_rate(struct clk_hw *h
|
||||
rate = clk_fepll_vco_calc_rate(pll, parent_rate) * 2;
|
||||
do_div(rate, pre_div);
|
||||
|
||||
- return rate;
|
||||
+ f = qcom_find_freq_close(pll->freq_tbl, rate);
|
||||
+ if (!f)
|
||||
+ return rate;
|
||||
+
|
||||
+ return f->freq;
|
||||
};
|
||||
|
||||
static const struct clk_ops clk_regmap_cpu_div_ops = {
|
||||
|
|
@ -1,52 +0,0 @@
|
|||
From 480c1f7648fc586db12d6003c717c23667a4fcf0 Mon Sep 17 00:00:00 2001
|
||||
From: Ram Chandra Jangir <rjangir@codeaurora.org>
|
||||
Date: Tue, 28 Mar 2017 22:35:33 +0530
|
||||
Subject: [PATCH] clk: qcom: ipq4019: add ess reset
|
||||
|
||||
Added the ESS reset in IPQ4019 GCC.
|
||||
|
||||
Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
|
||||
---
|
||||
drivers/clk/qcom/gcc-ipq4019.c | 11 +++++++++++
|
||||
include/dt-bindings/clock/qcom,gcc-ipq4019.h | 11 +++++++++++
|
||||
2 files changed, 22 insertions(+)
|
||||
|
||||
--- a/drivers/clk/qcom/gcc-ipq4019.c
|
||||
+++ b/drivers/clk/qcom/gcc-ipq4019.c
|
||||
@@ -1735,6 +1735,17 @@ static const struct qcom_reset_map gcc_i
|
||||
[GCC_TCSR_BCR] = {0x22000, 0},
|
||||
[GCC_MPM_BCR] = {0x24000, 0},
|
||||
[GCC_SPDM_BCR] = {0x25000, 0},
|
||||
+ [ESS_MAC1_ARES] = {0x1200C, 0},
|
||||
+ [ESS_MAC2_ARES] = {0x1200C, 1},
|
||||
+ [ESS_MAC3_ARES] = {0x1200C, 2},
|
||||
+ [ESS_MAC4_ARES] = {0x1200C, 3},
|
||||
+ [ESS_MAC5_ARES] = {0x1200C, 4},
|
||||
+ [ESS_PSGMII_ARES] = {0x1200C, 5},
|
||||
+ [ESS_MAC1_CLK_DIS] = {0x1200C, 8},
|
||||
+ [ESS_MAC2_CLK_DIS] = {0x1200C, 9},
|
||||
+ [ESS_MAC3_CLK_DIS] = {0x1200C, 10},
|
||||
+ [ESS_MAC4_CLK_DIS] = {0x1200C, 11},
|
||||
+ [ESS_MAC5_CLK_DIS] = {0x1200C, 12},
|
||||
};
|
||||
|
||||
static const struct regmap_config gcc_ipq4019_regmap_config = {
|
||||
--- a/include/dt-bindings/clock/qcom,gcc-ipq4019.h
|
||||
+++ b/include/dt-bindings/clock/qcom,gcc-ipq4019.h
|
||||
@@ -165,5 +165,16 @@
|
||||
#define GCC_QDSS_BCR 69
|
||||
#define GCC_MPM_BCR 70
|
||||
#define GCC_SPDM_BCR 71
|
||||
+#define ESS_MAC1_ARES 72
|
||||
+#define ESS_MAC2_ARES 73
|
||||
+#define ESS_MAC3_ARES 74
|
||||
+#define ESS_MAC4_ARES 75
|
||||
+#define ESS_MAC5_ARES 76
|
||||
+#define ESS_PSGMII_ARES 77
|
||||
+#define ESS_MAC1_CLK_DIS 78
|
||||
+#define ESS_MAC2_CLK_DIS 79
|
||||
+#define ESS_MAC3_CLK_DIS 80
|
||||
+#define ESS_MAC4_CLK_DIS 81
|
||||
+#define ESS_MAC5_CLK_DIS 82
|
||||
|
||||
#endif
|
||||
|
|
@ -1,48 +0,0 @@
|
|||
From 0843a61d6913bdac8889eb048ed89f7903059787 Mon Sep 17 00:00:00 2001
|
||||
From: Robert Marko <robimarko@gmail.com>
|
||||
Date: Fri, 30 Oct 2020 13:36:31 +0100
|
||||
Subject: [PATCH] arm: compressed: add appended DTB section
|
||||
|
||||
This adds a appended_dtb section to the ARM decompressor
|
||||
linker script.
|
||||
|
||||
This allows using the existing ARM zImage appended DTB support for
|
||||
appending a DTB to the raw ELF kernel.
|
||||
|
||||
Its size is set to 1MB max to match the zImage appended DTB size limit.
|
||||
|
||||
To use it to pass the DTB to the kernel, objcopy is used:
|
||||
|
||||
objcopy --set-section-flags=.appended_dtb=alloc,contents \
|
||||
--update-section=.appended_dtb=<target>.dtb vmlinux
|
||||
|
||||
This is based off the following patch:
|
||||
https://github.com/openwrt/openwrt/commit/c063e27e02a9dcac0e7f5877fb154e58fa3e1a69
|
||||
|
||||
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
||||
---
|
||||
arch/arm/boot/compressed/vmlinux.lds.S | 9 ++++++++-
|
||||
1 file changed, 8 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/arm/boot/compressed/vmlinux.lds.S
|
||||
+++ b/arch/arm/boot/compressed/vmlinux.lds.S
|
||||
@@ -103,6 +103,13 @@ SECTIONS
|
||||
|
||||
_edata = .;
|
||||
|
||||
+ .appended_dtb : {
|
||||
+ /* leave space for appended DTB */
|
||||
+ . += 0x100000;
|
||||
+ }
|
||||
+
|
||||
+ _edata_dtb = .;
|
||||
+
|
||||
/*
|
||||
* The image_end section appears after any additional loadable sections
|
||||
* that the linker may decide to insert in the binary image. Having
|
||||
@@ -140,4 +147,4 @@ SECTIONS
|
||||
|
||||
ARM_ASSERTS
|
||||
}
|
||||
-ASSERT(_edata_real == _edata, "error: zImage file size is incorrect");
|
||||
+ASSERT(_edata_real == _edata_dtb, "error: zImage file size is incorrect");
|
||||
|
|
@ -1,66 +0,0 @@
|
|||
From 11d6a6128a5a07c429941afc202b6e62a19771be Mon Sep 17 00:00:00 2001
|
||||
From: John Thomson <git@johnthomson.fastmail.com.au>
|
||||
Date: Fri, 23 Oct 2020 19:42:36 +1000
|
||||
Subject: [PATCH 2/2] arm: compressed: set ipq40xx watchdog to allow boot
|
||||
|
||||
For IPQ40XX systems where the SoC watchdog is activated before linux,
|
||||
the watchdog timer may be too small for linux to finish uncompress,
|
||||
boot, and watchdog management start.
|
||||
If the watchdog is enabled, set the timeout for it to 30 seconds.
|
||||
The functionality and offsets were copied from:
|
||||
drivers/watchdog/qcom-wdt.c qcom_wdt_set_timeout & qcom_wdt_start
|
||||
The watchdog memory address was taken from:
|
||||
arch/arm/boot/dts/qcom-ipq4019.dtsi
|
||||
|
||||
This was required on Mikrotik IPQ40XX consumer hardware using Mikrotik's
|
||||
RouterBoot bootloader.
|
||||
|
||||
Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
|
||||
---
|
||||
arch/arm/boot/compressed/head.S | 35 +++++++++++++++++++++++++++++++++
|
||||
1 file changed, 35 insertions(+)
|
||||
|
||||
--- a/arch/arm/boot/compressed/head.S
|
||||
+++ b/arch/arm/boot/compressed/head.S
|
||||
@@ -624,6 +624,41 @@ not_relocated: mov r0, #0
|
||||
bic r4, r4, #1
|
||||
blne cache_on
|
||||
|
||||
+/* Set the Qualcom IPQ40xx watchdog timeout to 30 seconds
|
||||
+ * if it is enabled, so that there is time for kernel
|
||||
+ * to decompress, boot, and take over the watchdog.
|
||||
+ * data and functionality from drivers/watchdog/qcom-wdt.c
|
||||
+ * address from arch/arm/boot/dts/qcom-ipq4019.dtsi
|
||||
+ */
|
||||
+#ifdef CONFIG_ARCH_IPQ40XX
|
||||
+watchdog_set:
|
||||
+ /* offsets:
|
||||
+ * 0x04 reset (=1 resets countdown)
|
||||
+ * 0x08 enable (=0 disables)
|
||||
+ * 0x0c status (=1 when SoC was reset by watchdog)
|
||||
+ * 0x10 bark (=timeout warning in ticks)
|
||||
+ * 0x14 bite (=timeout reset in ticks)
|
||||
+ * clock rate is 1<<15 hertz
|
||||
+ */
|
||||
+ .equ watchdog, 0x0b017000 @Store watchdog base address
|
||||
+ movw r0, #:lower16:watchdog
|
||||
+ movt r0, #:upper16:watchdog
|
||||
+ ldr r1, [r0, #0x08] @Get enabled?
|
||||
+ cmp r1, #1 @If not enabled, do not change
|
||||
+ bne watchdog_finished
|
||||
+ mov r1, #0
|
||||
+ str r1, [r0, #0x08] @Disable the watchdog
|
||||
+ mov r1, #1
|
||||
+ str r1, [r0, #0x04] @Pet the watchdog
|
||||
+ mov r1, #30 @30 seconds timeout
|
||||
+ lsl r1, r1, #15 @converted to ticks
|
||||
+ str r1, [r0, #0x10] @Set the bark timeout
|
||||
+ str r1, [r0, #0x14] @Set the bite timeout
|
||||
+ mov r1, #1
|
||||
+ str r1, [r0, #0x08] @Enable the watchdog
|
||||
+watchdog_finished:
|
||||
+#endif /* CONFIG_ARCH_IPQ40XX */
|
||||
+
|
||||
/*
|
||||
* The C runtime environment should now be setup sufficiently.
|
||||
* Set up some pointers, and start decompressing.
|
||||
|
|
@ -1,47 +0,0 @@
|
|||
--- a/drivers/firmware/qcom_scm.c
|
||||
+++ b/drivers/firmware/qcom_scm.c
|
||||
@@ -404,6 +404,20 @@ static int __qcom_scm_set_dload_mode(str
|
||||
return qcom_scm_call_atomic(__scm->dev, &desc, NULL);
|
||||
}
|
||||
|
||||
+static int __qcom_scm_disable_sdi(struct device *dev)
|
||||
+{
|
||||
+ struct qcom_scm_desc desc = {
|
||||
+ .svc = QCOM_SCM_SVC_BOOT,
|
||||
+ .cmd = QCOM_SCM_BOOT_CONFIG_SDI,
|
||||
+ .arginfo = QCOM_SCM_ARGS(2),
|
||||
+ .args[0] = 1 /* 1: disable watchdog debug */,
|
||||
+ .args[1] = 0 /* 0: disable SDI */,
|
||||
+ .owner = ARM_SMCCC_OWNER_SIP,
|
||||
+ };
|
||||
+
|
||||
+ return qcom_scm_call(__scm->dev, &desc, NULL);
|
||||
+}
|
||||
+
|
||||
static void qcom_scm_set_download_mode(bool enable)
|
||||
{
|
||||
bool avail;
|
||||
@@ -1314,6 +1328,13 @@ static int qcom_scm_probe(struct platfor
|
||||
if (download_mode)
|
||||
qcom_scm_set_download_mode(true);
|
||||
|
||||
+ /*
|
||||
+ * Factory firmware leaves SDI (a debug interface), which prevents
|
||||
+ * clean reboot.
|
||||
+ */
|
||||
+ if (of_machine_is_compatible("google,wifi"))
|
||||
+ __qcom_scm_disable_sdi(__scm->dev);
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
--- a/drivers/firmware/qcom_scm.h
|
||||
+++ b/drivers/firmware/qcom_scm.h
|
||||
@@ -77,6 +77,7 @@ extern int scm_legacy_call(struct device
|
||||
#define QCOM_SCM_SVC_BOOT 0x01
|
||||
#define QCOM_SCM_BOOT_SET_ADDR 0x01
|
||||
#define QCOM_SCM_BOOT_TERMINATE_PC 0x02
|
||||
+#define QCOM_SCM_BOOT_CONFIG_SDI 0x09
|
||||
#define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
|
||||
#define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a
|
||||
#define QCOM_SCM_FLUSH_FLAG_MASK 0x3
|
||||
|
|
@ -1,121 +0,0 @@
|
|||
--- a/drivers/firmware/qcom_scm-legacy.c
|
||||
+++ b/drivers/firmware/qcom_scm-legacy.c
|
||||
@@ -13,6 +13,9 @@
|
||||
#include <linux/arm-smccc.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
|
||||
+#include <asm/cacheflush.h>
|
||||
+#include <asm/outercache.h>
|
||||
+
|
||||
#include "qcom_scm.h"
|
||||
|
||||
static DEFINE_MUTEX(qcom_scm_lock);
|
||||
@@ -117,6 +120,25 @@ static void __scm_legacy_do(const struct
|
||||
} while (res->a0 == QCOM_SCM_INTERRUPTED);
|
||||
}
|
||||
|
||||
+static void qcom_scm_inv_range(unsigned long start, unsigned long end)
|
||||
+{
|
||||
+ u32 cacheline_size, ctr;
|
||||
+
|
||||
+ asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr));
|
||||
+ cacheline_size = 4 << ((ctr >> 16) & 0xf);
|
||||
+
|
||||
+ start = round_down(start, cacheline_size);
|
||||
+ end = round_up(end, cacheline_size);
|
||||
+ outer_inv_range(start, end);
|
||||
+ while (start < end) {
|
||||
+ asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start)
|
||||
+ : "memory");
|
||||
+ start += cacheline_size;
|
||||
+ }
|
||||
+ dsb();
|
||||
+ isb();
|
||||
+}
|
||||
+
|
||||
/**
|
||||
* scm_legacy_call() - Sends a command to the SCM and waits for the command to
|
||||
* finish processing.
|
||||
@@ -160,10 +182,16 @@ int scm_legacy_call(struct device *dev,
|
||||
|
||||
rsp = scm_legacy_command_to_response(cmd);
|
||||
|
||||
- cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
|
||||
- if (dma_mapping_error(dev, cmd_phys)) {
|
||||
- kfree(cmd);
|
||||
- return -ENOMEM;
|
||||
+ if (dev) {
|
||||
+ cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
|
||||
+ if (dma_mapping_error(dev, cmd_phys)) {
|
||||
+ kfree(cmd);
|
||||
+ return -ENOMEM;
|
||||
+ }
|
||||
+ } else {
|
||||
+ cmd_phys = virt_to_phys(cmd);
|
||||
+ __cpuc_flush_dcache_area(cmd, alloc_len);
|
||||
+ outer_flush_range(cmd_phys, cmd_phys + alloc_len);
|
||||
}
|
||||
|
||||
smc.args[0] = 1;
|
||||
@@ -179,13 +207,26 @@ int scm_legacy_call(struct device *dev,
|
||||
goto out;
|
||||
|
||||
do {
|
||||
- dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len,
|
||||
- sizeof(*rsp), DMA_FROM_DEVICE);
|
||||
+ if (dev) {
|
||||
+ dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) +
|
||||
+ cmd_len, sizeof(*rsp),
|
||||
+ DMA_FROM_DEVICE);
|
||||
+ } else {
|
||||
+ unsigned long start = (uintptr_t)cmd + sizeof(*cmd) +
|
||||
+ cmd_len;
|
||||
+ qcom_scm_inv_range(start, start + sizeof(*rsp));
|
||||
+ }
|
||||
} while (!rsp->is_complete);
|
||||
|
||||
- dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
|
||||
- le32_to_cpu(rsp->buf_offset),
|
||||
- resp_len, DMA_FROM_DEVICE);
|
||||
+ if (dev) {
|
||||
+ dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
|
||||
+ le32_to_cpu(rsp->buf_offset),
|
||||
+ resp_len, DMA_FROM_DEVICE);
|
||||
+ } else {
|
||||
+ unsigned long start = (uintptr_t)cmd + sizeof(*cmd) + cmd_len +
|
||||
+ le32_to_cpu(rsp->buf_offset);
|
||||
+ qcom_scm_inv_range(start, start + resp_len);
|
||||
+ }
|
||||
|
||||
if (res) {
|
||||
res_buf = scm_legacy_get_response_buffer(rsp);
|
||||
@@ -193,7 +234,8 @@ int scm_legacy_call(struct device *dev,
|
||||
res->result[i] = le32_to_cpu(res_buf[i]);
|
||||
}
|
||||
out:
|
||||
- dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
|
||||
+ if (dev)
|
||||
+ dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
|
||||
kfree(cmd);
|
||||
return ret;
|
||||
}
|
||||
--- a/drivers/firmware/qcom_scm.c
|
||||
+++ b/drivers/firmware/qcom_scm.c
|
||||
@@ -344,6 +344,17 @@ int qcom_scm_set_cold_boot_addr(void *en
|
||||
desc.args[0] = flags;
|
||||
desc.args[1] = virt_to_phys(entry);
|
||||
|
||||
+ /*
|
||||
+ * Factory firmware doesn't support the atomic variant. Non-atomic SCMs
|
||||
+ * require ugly DMA invalidation support that was dropped upstream a
|
||||
+ * while ago. For more info, see:
|
||||
+ *
|
||||
+ * [RFC] qcom_scm: IPQ4019 firmware does not support atomic API?
|
||||
+ * https://lore.kernel.org/linux-arm-msm/20200913201608.GA3162100@bDebian/
|
||||
+ */
|
||||
+ if (of_machine_is_compatible("google,wifi"))
|
||||
+ return qcom_scm_call(__scm ? __scm->dev : NULL, &desc, NULL);
|
||||
+
|
||||
return qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL);
|
||||
}
|
||||
EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
|
||||
|
|
@ -1,29 +0,0 @@
|
|||
From 35ca7e3e6ccd120d694a3425f37fc6374ad2e11e Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Andreas=20B=C3=B6hler?= <dev@aboehler.at>
|
||||
Date: Wed, 20 Apr 2022 12:08:38 +0200
|
||||
Subject: [PATCH] mtd: rawnand: add support for Toshiba TC58NVG0S3HTA00
|
||||
NAND flash
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
The Toshiba TC58NVG0S3HTA00 is detected with 64 byte OOB while the flash
|
||||
has 128 bytes OOB. This adds a static NAND ID entry to correct this.
|
||||
|
||||
Tested on FRITZ!Box 7530 flashed with OpenWrt.
|
||||
|
||||
Signed-off-by: Andreas Böhler <dev@aboehler.at>
|
||||
(changed id_len to 8, added comment about possible counterfeits)
|
||||
---
|
||||
--- a/drivers/mtd/nand/raw/nand_ids.c
|
||||
+++ b/drivers/mtd/nand/raw/nand_ids.c
|
||||
@@ -29,6 +29,9 @@ struct nand_flash_dev nand_flash_ids[] =
|
||||
{"TC58NVG0S3E 1G 3.3V 8-bit",
|
||||
{ .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} },
|
||||
SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
|
||||
+ {"TC58NVG0S3HTA00 1G 3.3V 8-bit", /* possibly counterfeit chip - see commit */
|
||||
+ { .id = {0x98, 0xf1, 0x80, 0x15} }, /* should be more bytes */
|
||||
+ SZ_2K, SZ_128, SZ_128K, 0, 8, 128, NAND_ECC_INFO(8, SZ_512), },
|
||||
{"TC58NVG2S0F 4G 3.3V 8-bit",
|
||||
{ .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} },
|
||||
SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
|
||||
|
|
@ -1,43 +0,0 @@
|
|||
From da75807ac41175e9db8c95f7a172b4133763b744 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <j4g8y7@gmail.com>
|
||||
Date: Mon, 11 Jan 2021 17:49:36 +0100
|
||||
Subject: [PATCH] skbuff: add DSA specific data to struct skb_shared_info
|
||||
|
||||
All of the already existing DSA tagging protocol drivers
|
||||
are storing the tagging data directly into the skb. In most
|
||||
cases that is the only way to send the required information
|
||||
to the underlying ethernet switch.
|
||||
|
||||
However on certain platforms (like the Qualcomm IPQ40xx
|
||||
SoCs) the built-in ethernet switch is connected directly
|
||||
to an ethernet MAC, and the tagging information must be
|
||||
sent out-of-band which is done directly via the hardware
|
||||
TX descriptors of the ethernet MAC.
|
||||
|
||||
In such cases, putting the information into the skb causes
|
||||
unneccesary overhead, because the ethernet driver must
|
||||
remove that before sending the ethernet frame towards to
|
||||
the hardware.
|
||||
|
||||
This change adds two new DSA specific fields to struct
|
||||
skb_shared_info which makes it possible to send the
|
||||
tagging information via skb->shinfo. With this approach,
|
||||
the twofold modifications of the skb data can be avoided.
|
||||
|
||||
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
|
||||
---
|
||||
include/linux/skbuff.h | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
--- a/include/linux/skbuff.h
|
||||
+++ b/include/linux/skbuff.h
|
||||
@@ -563,6 +563,9 @@ struct skb_shared_info {
|
||||
unsigned int gso_type;
|
||||
u32 tskey;
|
||||
|
||||
+ unsigned int dsa_tag_proto;
|
||||
+ unsigned char dsa_tag_data[8];
|
||||
+
|
||||
/*
|
||||
* Warning : all fields before dataref are cleared in __alloc_skb()
|
||||
*/
|
||||
|
|
@ -1,187 +0,0 @@
|
|||
From 29a0c2fae991cab142575c92276c0afdeb260ebe Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <j4g8y7@gmail.com>
|
||||
Date: Thu, 28 Oct 2021 21:44:52 +0200
|
||||
Subject: [PATCH] net: dsa: tag_ipq4019: add shinfo based tagging driver for
|
||||
IPQ40xx
|
||||
|
||||
This change adds a tagging protocol driver for the built-in
|
||||
ethernet switch of the Qualcomm Atheros IPQ4019 SoCs.
|
||||
|
||||
In comparison to the existing tagging protocols this hardware
|
||||
requires a slightly different approach because the switch does
|
||||
not use in-band tags.
|
||||
|
||||
On the receive path, the source port information is embedded
|
||||
into the RX descriptors of the ethernet MAC hardware. Similarly,
|
||||
the destination port mask must be sent via the TX descriptors
|
||||
of the ethernet MAC when a packet is sent towards the switch.
|
||||
|
||||
In order to support this special requirements, this patch
|
||||
adds a new tagging protocol driver.
|
||||
|
||||
The driver extracts the source port information directly
|
||||
from the 'receive return descriptor' of the ethernet MAC.
|
||||
It is possible because that descriptor is part of the skb
|
||||
received from the ethernet driver.
|
||||
|
||||
Unfortunatley, it is not possible to put the destination
|
||||
port information directly to the TX descriptors, because
|
||||
those are handled internally by the driver of the ethernet
|
||||
hardware.
|
||||
|
||||
To overcome this limitation, this tagging driver uses the
|
||||
DSA specific fields in skb->shinfo to send the destination
|
||||
port information to the ethernet driver.
|
||||
|
||||
A similar tagging driver is exist but that uses skb
|
||||
extensions which causes unnecessary overhead.
|
||||
|
||||
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
|
||||
---
|
||||
include/linux/dsa/ipq4019.h | 11 ++++++
|
||||
include/net/dsa.h | 2 +
|
||||
net/dsa/Kconfig | 6 +++
|
||||
net/dsa/Makefile | 1 +
|
||||
net/dsa/tag_ipq4019.c | 79 +++++++++++++++++++++++++++++++++++++
|
||||
5 files changed, 99 insertions(+)
|
||||
create mode 100644 include/linux/dsa/ipq4019.h
|
||||
create mode 100644 net/dsa/tag_ipq4019.c
|
||||
|
||||
--- /dev/null
|
||||
+++ b/include/linux/dsa/ipq4019.h
|
||||
@@ -0,0 +1,11 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
+
|
||||
+#ifndef DSA_IPQ40XX_H
|
||||
+#define DSA_IPQ40XX_H
|
||||
+
|
||||
+struct ipq40xx_dsa_tag_data {
|
||||
+ u8 from_cpu;
|
||||
+ u8 dp;
|
||||
+};
|
||||
+
|
||||
+#endif /* DSA_IPQ40XX_H */
|
||||
--- a/include/net/dsa.h
|
||||
+++ b/include/net/dsa.h
|
||||
@@ -51,6 +51,7 @@ struct phylink_link_state;
|
||||
#define DSA_TAG_PROTO_RTL8_4T_VALUE 24
|
||||
#define DSA_TAG_PROTO_RZN1_A5PSW_VALUE 25
|
||||
#define DSA_TAG_PROTO_LAN937X_VALUE 27
|
||||
+#define DSA_TAG_PROTO_IPQ4019_VALUE 28
|
||||
|
||||
enum dsa_tag_protocol {
|
||||
DSA_TAG_PROTO_NONE = DSA_TAG_PROTO_NONE_VALUE,
|
||||
@@ -77,6 +78,7 @@ enum dsa_tag_protocol {
|
||||
DSA_TAG_PROTO_RTL8_4T = DSA_TAG_PROTO_RTL8_4T_VALUE,
|
||||
DSA_TAG_PROTO_RZN1_A5PSW = DSA_TAG_PROTO_RZN1_A5PSW_VALUE,
|
||||
DSA_TAG_PROTO_LAN937X = DSA_TAG_PROTO_LAN937X_VALUE,
|
||||
+ DSA_TAG_PROTO_IPQ4019 = DSA_TAG_PROTO_IPQ4019_VALUE,
|
||||
};
|
||||
|
||||
struct dsa_switch;
|
||||
--- a/net/dsa/Kconfig
|
||||
+++ b/net/dsa/Kconfig
|
||||
@@ -57,6 +57,12 @@ config NET_DSA_TAG_HELLCREEK
|
||||
Say Y or M if you want to enable support for tagging frames
|
||||
for the Hirschmann Hellcreek TSN switches.
|
||||
|
||||
+config NET_DSA_TAG_IPQ4019
|
||||
+ tristate "Tag driver for Qualcomm Atheros IPQ4019 SoC built-in switch"
|
||||
+ help
|
||||
+ Say Y or M if you want to enable support for tagging frames for
|
||||
+ the built-in switch of the Qualcomm Atheros IPQ4019 SoC-s.
|
||||
+
|
||||
config NET_DSA_TAG_GSWIP
|
||||
tristate "Tag driver for Lantiq / Intel GSWIP switches"
|
||||
help
|
||||
--- a/net/dsa/Makefile
|
||||
+++ b/net/dsa/Makefile
|
||||
@@ -8,6 +8,7 @@ obj-$(CONFIG_NET_DSA_TAG_AR9331) += tag_
|
||||
obj-$(CONFIG_NET_DSA_TAG_BRCM_COMMON) += tag_brcm.o
|
||||
obj-$(CONFIG_NET_DSA_TAG_DSA_COMMON) += tag_dsa.o
|
||||
obj-$(CONFIG_NET_DSA_TAG_GSWIP) += tag_gswip.o
|
||||
+obj-$(CONFIG_NET_DSA_TAG_IPQ4019) += tag_ipq4019.o
|
||||
obj-$(CONFIG_NET_DSA_TAG_HELLCREEK) += tag_hellcreek.o
|
||||
obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o
|
||||
obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o
|
||||
--- /dev/null
|
||||
+++ b/net/dsa/tag_ipq4019.c
|
||||
@@ -0,0 +1,78 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+
|
||||
+/* Copyright (c) 2021, Gabor Juhos <j4g8y7@gmail.com> */
|
||||
+
|
||||
+#include <linux/bitfield.h>
|
||||
+#include <linux/dsa/ipq4019.h>
|
||||
+
|
||||
+#include "dsa_priv.h"
|
||||
+
|
||||
+/* Receive Return Descriptor */
|
||||
+struct edma_rrd {
|
||||
+ u16 rrd0;
|
||||
+ u16 rrd1;
|
||||
+ u16 rrd2;
|
||||
+ u16 rrd3;
|
||||
+ u16 rrd4;
|
||||
+ u16 rrd5;
|
||||
+ u16 rrd6;
|
||||
+ u16 rrd7;
|
||||
+} __packed;
|
||||
+
|
||||
+#define EDMA_RRD_SIZE sizeof(struct edma_rrd)
|
||||
+
|
||||
+#define EDMA_RRD1_PORT_ID_MASK GENMASK(14, 12)
|
||||
+
|
||||
+static struct sk_buff *ipq4019_sh_tag_xmit(struct sk_buff *skb,
|
||||
+ struct net_device *dev)
|
||||
+{
|
||||
+ struct dsa_port *dp = dsa_slave_to_port(dev);
|
||||
+ struct ipq40xx_dsa_tag_data *tag_data;
|
||||
+
|
||||
+ BUILD_BUG_ON(sizeof_field(struct skb_shared_info, dsa_tag_data) <
|
||||
+ sizeof(struct ipq40xx_dsa_tag_data));
|
||||
+
|
||||
+ skb_shinfo(skb)->dsa_tag_proto = DSA_TAG_PROTO_IPQ4019;
|
||||
+ tag_data = (struct ipq40xx_dsa_tag_data *)skb_shinfo(skb)->dsa_tag_data;
|
||||
+
|
||||
+ tag_data->from_cpu = 1;
|
||||
+ /* set the destination port information */
|
||||
+ tag_data->dp = BIT(dp->index);
|
||||
+
|
||||
+ return skb;
|
||||
+}
|
||||
+
|
||||
+static struct sk_buff *ipq4019_sh_tag_rcv(struct sk_buff *skb,
|
||||
+ struct net_device *dev)
|
||||
+{
|
||||
+ struct edma_rrd *rrd;
|
||||
+ int offset;
|
||||
+ int port;
|
||||
+
|
||||
+ offset = EDMA_RRD_SIZE + ETH_HLEN;
|
||||
+ if (unlikely(skb_headroom(skb) < offset))
|
||||
+ return NULL;
|
||||
+
|
||||
+ rrd = (struct edma_rrd *)(skb->data - offset);
|
||||
+ port = FIELD_GET(EDMA_RRD1_PORT_ID_MASK, rrd->rrd1);
|
||||
+
|
||||
+ skb->dev = dsa_master_find_slave(dev, 0, port);
|
||||
+ if (!skb->dev)
|
||||
+ return NULL;
|
||||
+
|
||||
+ return skb;
|
||||
+}
|
||||
+
|
||||
+const struct dsa_device_ops ipq4019_sh_tag_dsa_ops = {
|
||||
+ .name = "ipq4019-sh",
|
||||
+ .proto = DSA_TAG_PROTO_IPQ4019,
|
||||
+ .xmit = ipq4019_sh_tag_xmit,
|
||||
+ .rcv = ipq4019_sh_tag_rcv,
|
||||
+};
|
||||
+
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
+MODULE_DESCRIPTION("DSA tag driver for the IPQ4019 SoC built-in ethernet switch");
|
||||
+MODULE_AUTHOR("Gabor Juhos <j4g8y7@gmail.com>");
|
||||
+MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_IPQ4019);
|
||||
+
|
||||
+module_dsa_tag_driver(ipq4019_sh_tag_dsa_ops);
|
||||
|
|
@ -1,81 +0,0 @@
|
|||
From 44327d7098d4f32c24ec8c528e5aff6e030956bc Mon Sep 17 00:00:00 2001
|
||||
From: Robert Marko <robert.marko@sartura.hr>
|
||||
Date: Wed, 20 Oct 2021 13:21:45 +0200
|
||||
Subject: [PATCH] arm: dts: ipq4019: add ethernet controller DT node
|
||||
|
||||
Since IPQ40xx SoC built-in ethernet controller now has a driver,
|
||||
add its DT node so it can be used.
|
||||
|
||||
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
|
||||
---
|
||||
arch/arm/boot/dts/qcom-ipq4019.dtsi | 48 +++++++++++++++++++++++++++++
|
||||
1 file changed, 48 insertions(+)
|
||||
|
||||
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
|
||||
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
|
||||
@@ -38,6 +38,7 @@
|
||||
spi1 = &blsp1_spi2;
|
||||
i2c0 = &blsp1_i2c3;
|
||||
i2c1 = &blsp1_i2c4;
|
||||
+ ethernet0 = &gmac;
|
||||
};
|
||||
|
||||
cpus {
|
||||
@@ -589,6 +590,57 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ gmac: ethernet@c080000 {
|
||||
+ compatible = "qcom,ipq4019-ess-edma";
|
||||
+ reg = <0xc080000 0x8000>;
|
||||
+ resets = <&gcc ESS_RESET>;
|
||||
+ reset-names = "ess_rst";
|
||||
+ clocks = <&gcc GCC_ESS_CLK>;
|
||||
+ clock-names = "ess_clk";
|
||||
+ interrupts = <GIC_SPI 65 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 69 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 71 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 240 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 243 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 244 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 245 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 246 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 251 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 252 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 253 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 254 IRQ_TYPE_EDGE_RISING>,
|
||||
+ <GIC_SPI 255 IRQ_TYPE_EDGE_RISING>;
|
||||
+
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ phy-mode = "internal";
|
||||
+ fixed-link {
|
||||
+ speed = <1000>;
|
||||
+ full-duplex;
|
||||
+ pause;
|
||||
+ asym-pause;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
mdio: mdio@90000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -1,98 +0,0 @@
|
|||
From ebb62523990a27b3a25e422fa575619f7f725a20 Mon Sep 17 00:00:00 2001
|
||||
From: Robert Marko <robert.marko@sartura.hr>
|
||||
Date: Mon, 1 Nov 2021 18:15:04 +0100
|
||||
Subject: [PATCH] arm: dts: ipq4019: add switch node
|
||||
|
||||
Since the built-in IPQ40xx switch now has a driver, add the required node
|
||||
for it to work.
|
||||
|
||||
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
|
||||
---
|
||||
arch/arm/boot/dts/qcom-ipq4019.dtsi | 78 +++++++++++++++++++++++++++++
|
||||
1 file changed, 78 insertions(+)
|
||||
|
||||
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
|
||||
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
|
||||
@@ -590,6 +590,82 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ switch: switch@c000000 {
|
||||
+ compatible = "qca,ipq4019-qca8337n";
|
||||
+ reg = <0xc000000 0x80000>, <0x98000 0x800>;
|
||||
+ reg-names = "base", "psgmii_phy";
|
||||
+ resets = <&gcc ESS_PSGMII_ARES>;
|
||||
+ reset-names = "psgmii_rst";
|
||||
+ mdio = <&mdio>;
|
||||
+ psgmii-ethphy = <&psgmiiphy>;
|
||||
+
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ port@0 { /* MAC0 */
|
||||
+ reg = <0>;
|
||||
+ label = "cpu";
|
||||
+ ethernet = <&gmac>;
|
||||
+ phy-mode = "internal";
|
||||
+
|
||||
+ fixed-link {
|
||||
+ speed = <1000>;
|
||||
+ full-duplex;
|
||||
+ pause;
|
||||
+ asym-pause;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ swport1: port@1 { /* MAC1 */
|
||||
+ reg = <1>;
|
||||
+ label = "lan1";
|
||||
+ phy-handle = <ðphy0>;
|
||||
+ phy-mode = "psgmii";
|
||||
+
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ swport2: port@2 { /* MAC2 */
|
||||
+ reg = <2>;
|
||||
+ label = "lan2";
|
||||
+ phy-handle = <ðphy1>;
|
||||
+ phy-mode = "psgmii";
|
||||
+
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ swport3: port@3 { /* MAC3 */
|
||||
+ reg = <3>;
|
||||
+ label = "lan3";
|
||||
+ phy-handle = <ðphy2>;
|
||||
+ phy-mode = "psgmii";
|
||||
+
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ swport4: port@4 { /* MAC4 */
|
||||
+ reg = <4>;
|
||||
+ label = "lan4";
|
||||
+ phy-handle = <ðphy3>;
|
||||
+ phy-mode = "psgmii";
|
||||
+
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ swport5: port@5 { /* MAC5 */
|
||||
+ reg = <5>;
|
||||
+ label = "wan";
|
||||
+ phy-handle = <ðphy4>;
|
||||
+ phy-mode = "psgmii";
|
||||
+
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
gmac: ethernet@c080000 {
|
||||
compatible = "qcom,ipq4019-ess-edma";
|
||||
reg = <0xc080000 0x8000>;
|
||||
|
|
@ -1,61 +0,0 @@
|
|||
From c66863c1ba8995b61e6d727d78a241c734f5bb57 Mon Sep 17 00:00:00 2001
|
||||
From: Robert Marko <robert.marko@sartura.hr>
|
||||
Date: Thu, 1 Oct 2020 15:05:35 +0200
|
||||
Subject: [PATCH] dt-bindings: net: add QCA807x PHY
|
||||
|
||||
Add DT bindings for Qualcomm QCA807x PHY series.
|
||||
|
||||
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
|
||||
---
|
||||
include/dt-bindings/net/qcom-qca807x.h | 45 ++++++++++++++++++++++++++
|
||||
1 file changed, 45 insertions(+)
|
||||
create mode 100644 include/dt-bindings/net/qcom-qca807x.h
|
||||
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/net/qcom-qca807x.h
|
||||
@@ -0,0 +1,45 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
+/*
|
||||
+ * Device Tree constants for the Qualcomm QCA807X PHYs
|
||||
+ */
|
||||
+
|
||||
+#ifndef _DT_BINDINGS_QCOM_QCA807X_H
|
||||
+#define _DT_BINDINGS_QCOM_QCA807X_H
|
||||
+
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_140MV 0
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_160MV 1
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_180MV 2
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_200MV 3
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_220MV 4
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_240MV 5
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_260MV 6
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_280MV 7
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_300MV 8
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_320MV 9
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_400MV 10
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_500MV 11
|
||||
+/* Default value */
|
||||
+#define PSGMII_QSGMII_TX_DRIVER_600MV 12
|
||||
+
|
||||
+/* Full amplitude, full bias current */
|
||||
+#define QCA807X_CONTROL_DAC_FULL_VOLT_BIAS 0
|
||||
+/* Amplitude follow DSP (amplitude is adjusted based on cable length), half bias current */
|
||||
+#define QCA807X_CONTROL_DAC_DSP_VOLT_HALF_BIAS 1
|
||||
+/* Full amplitude, bias current follow DSP (bias current is adjusted based on cable length) */
|
||||
+#define QCA807X_CONTROL_DAC_FULL_VOLT_DSP_BIAS 2
|
||||
+/* Both amplitude and bias current follow DSP */
|
||||
+#define QCA807X_CONTROL_DAC_DSP_VOLT_BIAS 3
|
||||
+/* Full amplitude, half bias current */
|
||||
+#define QCA807X_CONTROL_DAC_FULL_VOLT_HALF_BIAS 4
|
||||
+/* Amplitude follow DSP setting; 1/4 bias current when cable<10m,
|
||||
+ * otherwise half bias current
|
||||
+ */
|
||||
+#define QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS 5
|
||||
+/* Full amplitude; same bias current setting with “010” and “011”,
|
||||
+ * but half more bias is reduced when cable <10m
|
||||
+ */
|
||||
+#define QCA807X_CONTROL_DAC_FULL_VOLT_HALF_BIAS_SHORT 6
|
||||
+/* Amplitude follow DSP; same bias current setting with “110”, default value */
|
||||
+#define QCA807X_CONTROL_DAC_DSP_VOLT_HALF_BIAS_SHORT 7
|
||||
+
|
||||
+#endif
|
||||
|
|
@ -1,62 +0,0 @@
|
|||
From e0fa88eaa3c176b71e563da68949ac2ab45aaa61 Mon Sep 17 00:00:00 2001
|
||||
From: Robert Marko <robert.marko@sartura.hr>
|
||||
Date: Fri, 2 Oct 2020 10:43:26 +0200
|
||||
Subject: [PATCH] arm: dts: ipq4019: QCA807x properties
|
||||
|
||||
This adds necessary DT properties for QCA807x PHY-s to IPQ4019 DTSI.
|
||||
|
||||
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
|
||||
---
|
||||
arch/arm/boot/dts/qcom-ipq4019.dtsi | 18 ++++++++++++++++++
|
||||
1 file changed, 18 insertions(+)
|
||||
|
||||
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
|
||||
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
|
||||
@@ -8,6 +8,7 @@
|
||||
#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
+#include <dt-bindings/net/qcom-qca807x.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
@@ -598,22 +599,39 @@
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
+
|
||||
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
|
||||
};
|
||||
|
||||
ethphy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
+
|
||||
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
|
||||
};
|
||||
|
||||
ethphy2: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
+
|
||||
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
|
||||
};
|
||||
|
||||
ethphy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
+
|
||||
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
|
||||
};
|
||||
|
||||
ethphy4: ethernet-phy@4 {
|
||||
reg = <4>;
|
||||
+
|
||||
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
|
||||
+ };
|
||||
+
|
||||
+ psgmiiphy: psgmii-phy@5 {
|
||||
+ reg = <5>;
|
||||
+
|
||||
+ qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
|
||||
+ qcom,psgmii-az;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -1,50 +0,0 @@
|
|||
From f825cdc8bfde7616a14e2163f16303a8973031d2 Mon Sep 17 00:00:00 2001
|
||||
From: Robert Marko <robert.marko@sartura.hr>
|
||||
Date: Wed, 7 Oct 2020 17:38:48 +0200
|
||||
Subject: [PATCH] net: phy: Add Qualcom QCA807x driver
|
||||
|
||||
This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
|
||||
|
||||
They are 2 or 5 port IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.
|
||||
|
||||
They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC, while second one is SGMII for connection to MAC or fiber.
|
||||
|
||||
Both models have a combo port that supports 1000BASE-X and 100BASE-FX fiber.
|
||||
|
||||
Each PHY inside of QCA807x series has 4 digitally controlled output only pins that natively drive LED-s.
|
||||
But some vendors used these to driver generic LED-s controlled by userspace,
|
||||
so lets enable registering each PHY as GPIO controller and add driver for it.
|
||||
|
||||
These are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x boards.
|
||||
|
||||
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
|
||||
---
|
||||
drivers/net/phy/Kconfig | 6 ++++++
|
||||
drivers/net/phy/Makefile | 1 +
|
||||
2 files changed, 7 insertions(+)
|
||||
|
||||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -346,6 +346,12 @@ config AT803X_PHY
|
||||
Currently supports the AR8030, AR8031, AR8033, AR8035 and internal
|
||||
QCA8337(Internal qca8k PHY) model
|
||||
|
||||
+config QCA807X_PHY
|
||||
+ tristate "Qualcomm QCA807X PHYs"
|
||||
+ depends on OF_MDIO
|
||||
+ help
|
||||
+ Currently supports the QCA8072 and QCA8075 models.
|
||||
+
|
||||
config QSEMI_PHY
|
||||
tristate "Quality Semiconductor PHYs"
|
||||
help
|
||||
--- a/drivers/net/phy/Makefile
|
||||
+++ b/drivers/net/phy/Makefile
|
||||
@@ -92,6 +92,7 @@ obj-$(CONFIG_NATIONAL_PHY) += national.o
|
||||
obj-$(CONFIG_NXP_C45_TJA11XX_PHY) += nxp-c45-tja11xx.o
|
||||
obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o
|
||||
obj-$(CONFIG_QSEMI_PHY) += qsemi.o
|
||||
+obj-$(CONFIG_QCA807X_PHY) += qca807x.o
|
||||
obj-$(CONFIG_REALTEK_PHY) += realtek.o
|
||||
obj-$(CONFIG_RENESAS_PHY) += uPD60620.o
|
||||
obj-$(CONFIG_ROCKCHIP_PHY) += rockchip.o
|
||||
|
|
@ -1,180 +0,0 @@
|
|||
From: Christian Lamparter <chunkeey@googlemail.com>
|
||||
Subject: SoC: add qualcomm syscon
|
||||
--- a/drivers/soc/qcom/Makefile
|
||||
+++ b/drivers/soc/qcom/Makefile
|
||||
@@ -21,6 +21,7 @@ obj-$(CONFIG_QCOM_SMP2P) += smp2p.o
|
||||
obj-$(CONFIG_QCOM_SMSM) += smsm.o
|
||||
obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o
|
||||
obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
|
||||
+obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o
|
||||
obj-$(CONFIG_QCOM_APR) += apr.o
|
||||
obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
|
||||
obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
|
||||
--- a/drivers/soc/qcom/Kconfig
|
||||
+++ b/drivers/soc/qcom/Kconfig
|
||||
@@ -192,6 +192,13 @@ config QCOM_SOCINFO
|
||||
Say yes here to support the Qualcomm socinfo driver, providing
|
||||
information about the SoC to user space.
|
||||
|
||||
+config QCOM_TCSR
|
||||
+ tristate "QCOM Top Control and Status Registers"
|
||||
+ depends on ARCH_QCOM
|
||||
+ help
|
||||
+ Say y here to enable TCSR support. The TCSR provides control
|
||||
+ functions for various peripherals.
|
||||
+
|
||||
config QCOM_WCNSS_CTRL
|
||||
tristate "Qualcomm WCNSS control driver"
|
||||
depends on ARCH_QCOM || COMPILE_TEST
|
||||
--- /dev/null
|
||||
+++ b/drivers/soc/qcom/qcom_tcsr.c
|
||||
@@ -0,0 +1,98 @@
|
||||
+/*
|
||||
+ * Copyright (c) 2014, The Linux foundation. All rights reserved.
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License rev 2 and
|
||||
+ * only rev 2 as published by the free Software foundation.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/err.h>
|
||||
+#include <linux/io.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/of_platform.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+
|
||||
+#define TCSR_USB_PORT_SEL 0xb0
|
||||
+#define TCSR_USB_HSPHY_CONFIG 0xC
|
||||
+
|
||||
+#define TCSR_ESS_INTERFACE_SEL_OFFSET 0x0
|
||||
+#define TCSR_ESS_INTERFACE_SEL_MASK 0xf
|
||||
+
|
||||
+#define TCSR_WIFI0_GLB_CFG_OFFSET 0x0
|
||||
+#define TCSR_WIFI1_GLB_CFG_OFFSET 0x4
|
||||
+#define TCSR_PNOC_SNOC_MEMTYPE_M0_M2 0x4
|
||||
+
|
||||
+static int tcsr_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct resource *res;
|
||||
+ const struct device_node *node = pdev->dev.of_node;
|
||||
+ void __iomem *base;
|
||||
+ u32 val;
|
||||
+
|
||||
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
+ base = devm_ioremap_resource(&pdev->dev, res);
|
||||
+ if (IS_ERR(base))
|
||||
+ return PTR_ERR(base);
|
||||
+
|
||||
+ if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) {
|
||||
+ dev_err(&pdev->dev, "setting usb port select = %d\n", val);
|
||||
+ writel(val, base + TCSR_USB_PORT_SEL);
|
||||
+ }
|
||||
+
|
||||
+ if (!of_property_read_u32(node, "qcom,usb-hsphy-mode-select", &val)) {
|
||||
+ dev_info(&pdev->dev, "setting usb hs phy mode select = %x\n", val);
|
||||
+ writel(val, base + TCSR_USB_HSPHY_CONFIG);
|
||||
+ }
|
||||
+
|
||||
+ if (!of_property_read_u32(node, "qcom,ess-interface-select", &val)) {
|
||||
+ u32 tmp = 0;
|
||||
+ dev_info(&pdev->dev, "setting ess interface select = %x\n", val);
|
||||
+ tmp = readl(base + TCSR_ESS_INTERFACE_SEL_OFFSET);
|
||||
+ tmp = tmp & (~TCSR_ESS_INTERFACE_SEL_MASK);
|
||||
+ tmp = tmp | (val&TCSR_ESS_INTERFACE_SEL_MASK);
|
||||
+ writel(tmp, base + TCSR_ESS_INTERFACE_SEL_OFFSET);
|
||||
+ }
|
||||
+
|
||||
+ if (!of_property_read_u32(node, "qcom,wifi_glb_cfg", &val)) {
|
||||
+ dev_info(&pdev->dev, "setting wifi_glb_cfg = %x\n", val);
|
||||
+ writel(val, base + TCSR_WIFI0_GLB_CFG_OFFSET);
|
||||
+ writel(val, base + TCSR_WIFI1_GLB_CFG_OFFSET);
|
||||
+ }
|
||||
+
|
||||
+ if (!of_property_read_u32(node, "qcom,wifi_noc_memtype_m0_m2", &val)) {
|
||||
+ dev_info(&pdev->dev,
|
||||
+ "setting wifi_noc_memtype_m0_m2 = %x\n", val);
|
||||
+ writel(val, base + TCSR_PNOC_SNOC_MEMTYPE_M0_M2);
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id tcsr_dt_match[] = {
|
||||
+ { .compatible = "qcom,tcsr", },
|
||||
+ { },
|
||||
+};
|
||||
+
|
||||
+MODULE_DEVICE_TABLE(of, tcsr_dt_match);
|
||||
+
|
||||
+static struct platform_driver tcsr_driver = {
|
||||
+ .driver = {
|
||||
+ .name = "tcsr",
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .of_match_table = tcsr_dt_match,
|
||||
+ },
|
||||
+ .probe = tcsr_probe,
|
||||
+};
|
||||
+
|
||||
+module_platform_driver(tcsr_driver);
|
||||
+
|
||||
+MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
|
||||
+MODULE_DESCRIPTION("QCOM TCSR driver");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/soc/qcom,tcsr.h
|
||||
@@ -0,0 +1,48 @@
|
||||
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 and
|
||||
+ * only version 2 as published by the Free Software Foundation.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ */
|
||||
+#ifndef __DT_BINDINGS_QCOM_TCSR_H
|
||||
+#define __DT_BINDINGS_QCOM_TCSR_H
|
||||
+
|
||||
+#define TCSR_USB_SELECT_USB3_P0 0x1
|
||||
+#define TCSR_USB_SELECT_USB3_P1 0x2
|
||||
+#define TCSR_USB_SELECT_USB3_DUAL 0x3
|
||||
+
|
||||
+/* IPQ40xx HS PHY Mode Select */
|
||||
+#define TCSR_USB_HSPHY_HOST_MODE 0x00E700E7
|
||||
+#define TCSR_USB_HSPHY_DEVICE_MODE 0x00C700E7
|
||||
+
|
||||
+/* IPQ40xx ess interface mode select */
|
||||
+#define TCSR_ESS_PSGMII 0
|
||||
+#define TCSR_ESS_PSGMII_RGMII5 1
|
||||
+#define TCSR_ESS_PSGMII_RMII0 2
|
||||
+#define TCSR_ESS_PSGMII_RMII1 4
|
||||
+#define TCSR_ESS_PSGMII_RMII0_RMII1 6
|
||||
+#define TCSR_ESS_PSGMII_RGMII4 9
|
||||
+
|
||||
+/*
|
||||
+ * IPQ40xx WiFi Global Config
|
||||
+ * Bit 30:AXID_EN
|
||||
+ * Enable AXI master bus Axid translating to confirm all txn submitted by order
|
||||
+ * Bit 24: Use locally generated socslv_wxi_bvalid
|
||||
+ * 1: use locally generate socslv_wxi_bvalid for performance.
|
||||
+ * 0: use SNOC socslv_wxi_bvalid.
|
||||
+ */
|
||||
+#define TCSR_WIFI_GLB_CFG 0x41000000
|
||||
+
|
||||
+/* IPQ40xx MEM_TYPE_SEL_M0_M2 Select Bit 26:24 - 2 NORMAL */
|
||||
+#define TCSR_WIFI_NOC_MEMTYPE_M0_M2 0x02222222
|
||||
+
|
||||
+/* TCSR A/B REG */
|
||||
+#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL 0
|
||||
+#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL 1
|
||||
+
|
||||
+#endif
|
||||
|
|
@ -1,158 +0,0 @@
|
|||
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
|
||||
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
|
||||
@@ -15,6 +15,7 @@
|
||||
*/
|
||||
|
||||
#include "qcom-ipq4019.dtsi"
|
||||
+#include <dt-bindings/soc/qcom,tcsr.h>
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
|
||||
@@ -29,6 +30,32 @@
|
||||
};
|
||||
|
||||
soc {
|
||||
+ tcsr@194b000 {
|
||||
+ /* select hostmode */
|
||||
+ compatible = "qcom,tcsr";
|
||||
+ reg = <0x194b000 0x100>;
|
||||
+ qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ ess_tcsr@1953000 {
|
||||
+ compatible = "qcom,tcsr";
|
||||
+ reg = <0x1953000 0x1000>;
|
||||
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
|
||||
+ };
|
||||
+
|
||||
+ tcsr@1949000 {
|
||||
+ compatible = "qcom,tcsr";
|
||||
+ reg = <0x1949000 0x100>;
|
||||
+ qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
|
||||
+ };
|
||||
+
|
||||
+ tcsr@1957000 {
|
||||
+ compatible = "qcom,tcsr";
|
||||
+ reg = <0x1957000 0x100>;
|
||||
+ qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
|
||||
+ };
|
||||
+
|
||||
rng@22000 {
|
||||
status = "ok";
|
||||
};
|
||||
@@ -74,14 +101,6 @@
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
|
||||
-
|
||||
- mx25l25635e@0 {
|
||||
- #address-cells = <1>;
|
||||
- #size-cells = <1>;
|
||||
- reg = <0>;
|
||||
- compatible = "mx25l25635e";
|
||||
- spi-max-frequency = <24000000>;
|
||||
- };
|
||||
};
|
||||
|
||||
serial@78af000 {
|
||||
@@ -109,5 +128,22 @@
|
||||
wifi@a800000 {
|
||||
status = "ok";
|
||||
};
|
||||
+
|
||||
+ mdio@90000 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ ess-switch@c000000 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ ess-psgmii@98000 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ edma@c080000 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
};
|
||||
};
|
||||
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
|
||||
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
|
||||
@@ -18,5 +18,73 @@
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
|
||||
- compatible = "qcom,ipq4019-ap-dk01.1-c1", "qcom,ipq4019";
|
||||
+ compatible = "qcom,ipq4019-ap-dk01.1-c1", "qcom,ipq4019", "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1";
|
||||
+
|
||||
+ memory {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x80000000 0x10000000>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&blsp1_spi1 {
|
||||
+ mx25l25635f@0 {
|
||||
+ compatible = "mx25l25635f", "jedec,spi-nor";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+ reg = <0>;
|
||||
+ spi-max-frequency = <24000000>;
|
||||
+
|
||||
+ SBL1@0 {
|
||||
+ label = "SBL1";
|
||||
+ reg = <0x0 0x40000>;
|
||||
+ read-only;
|
||||
+ };
|
||||
+ MIBIB@40000 {
|
||||
+ label = "MIBIB";
|
||||
+ reg = <0x40000 0x20000>;
|
||||
+ read-only;
|
||||
+ };
|
||||
+ QSEE@60000 {
|
||||
+ label = "QSEE";
|
||||
+ reg = <0x60000 0x60000>;
|
||||
+ read-only;
|
||||
+ };
|
||||
+ CDT@c0000 {
|
||||
+ label = "CDT";
|
||||
+ reg = <0xc0000 0x10000>;
|
||||
+ read-only;
|
||||
+ };
|
||||
+ DDRPARAMS@d0000 {
|
||||
+ label = "DDRPARAMS";
|
||||
+ reg = <0xd0000 0x10000>;
|
||||
+ read-only;
|
||||
+ };
|
||||
+ APPSBLENV@e0000 {
|
||||
+ label = "APPSBLENV";
|
||||
+ reg = <0xe0000 0x10000>;
|
||||
+ read-only;
|
||||
+ };
|
||||
+ APPSBL@f0000 {
|
||||
+ label = "APPSBL";
|
||||
+ reg = <0xf0000 0x80000>;
|
||||
+ read-only;
|
||||
+ };
|
||||
+ ART@170000 {
|
||||
+ label = "ART";
|
||||
+ reg = <0x170000 0x10000>;
|
||||
+ read-only;
|
||||
+ };
|
||||
+ kernel@180000 {
|
||||
+ label = "kernel";
|
||||
+ reg = <0x180000 0x400000>;
|
||||
+ };
|
||||
+ rootfs@580000 {
|
||||
+ label = "rootfs";
|
||||
+ reg = <0x580000 0x1600000>;
|
||||
+ };
|
||||
+ firmware@180000 {
|
||||
+ label = "firmware";
|
||||
+ reg = <0x180000 0x1a00000>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
|
@ -1,104 +0,0 @@
|
|||
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
|
||||
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
|
||||
@@ -17,53 +17,79 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
- memory {
|
||||
- device_type = "memory";
|
||||
- reg = <0x80000000 0x10000000>; /* 256MB */
|
||||
- };
|
||||
-
|
||||
soc {
|
||||
+ rng@22000 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
pinctrl@1000000 {
|
||||
serial_0_pins: serial0-pinmux {
|
||||
- pins = "gpio16", "gpio17";
|
||||
- function = "blsp_uart0";
|
||||
- bias-disable;
|
||||
+ mux {
|
||||
+ pins = "gpio16", "gpio17";
|
||||
+ function = "blsp_uart0";
|
||||
+ bias-disable;
|
||||
+ };
|
||||
};
|
||||
|
||||
serial_1_pins: serial1-pinmux {
|
||||
- pins = "gpio8", "gpio9",
|
||||
- "gpio10", "gpio11";
|
||||
- function = "blsp_uart1";
|
||||
- bias-disable;
|
||||
+ mux {
|
||||
+ pins = "gpio8", "gpio9";
|
||||
+ function = "blsp_uart1";
|
||||
+ bias-disable;
|
||||
+ };
|
||||
};
|
||||
|
||||
spi_0_pins: spi-0-pinmux {
|
||||
pinmux {
|
||||
function = "blsp_spi0";
|
||||
pins = "gpio13", "gpio14", "gpio15";
|
||||
- bias-disable;
|
||||
};
|
||||
pinmux_cs {
|
||||
function = "gpio";
|
||||
pins = "gpio12";
|
||||
+ };
|
||||
+ pinconf {
|
||||
+ pins = "gpio13", "gpio14", "gpio15";
|
||||
+ drive-strength = <12>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+ pinconf_cs {
|
||||
+ pins = "gpio12";
|
||||
+ drive-strength = <2>;
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
i2c_0_pins: i2c-0-pinmux {
|
||||
- pins = "gpio20", "gpio21";
|
||||
- function = "blsp_i2c0";
|
||||
- bias-disable;
|
||||
+ pinmux {
|
||||
+ function = "blsp_i2c0";
|
||||
+ pins = "gpio10", "gpio11";
|
||||
+ };
|
||||
+ pinconf {
|
||||
+ pins = "gpio10", "gpio11";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
};
|
||||
|
||||
nand_pins: nand-pins {
|
||||
- pins = "gpio53", "gpio55", "gpio56",
|
||||
- "gpio57", "gpio58", "gpio59",
|
||||
- "gpio60", "gpio62", "gpio63",
|
||||
- "gpio64", "gpio65", "gpio66",
|
||||
- "gpio67", "gpio68", "gpio69";
|
||||
- function = "qpic";
|
||||
+ pullups {
|
||||
+ pins = "gpio52", "gpio53", "gpio58",
|
||||
+ "gpio59";
|
||||
+ function = "qpic";
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+ pulldowns {
|
||||
+ pins = "gpio54", "gpio55", "gpio56",
|
||||
+ "gpio57", "gpio60", "gpio61",
|
||||
+ "gpio62", "gpio63", "gpio64",
|
||||
+ "gpio65", "gpio66", "gpio67",
|
||||
+ "gpio68", "gpio69";
|
||||
+ function = "qpic";
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -1,43 +0,0 @@
|
|||
From: John Crispin <blogic@openwrt.org>
|
||||
Date: Fri, 3 Aug 2012 10:27:25 +0200
|
||||
Subject: [PATCH 04/36] MIPS: lantiq: add atm hack
|
||||
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
--- a/include/uapi/linux/atm.h
|
||||
+++ b/include/uapi/linux/atm.h
|
||||
@@ -131,8 +131,14 @@
|
||||
#define ATM_ABR 4
|
||||
#define ATM_ANYCLASS 5 /* compatible with everything */
|
||||
|
||||
+#define ATM_VBR_NRT ATM_VBR
|
||||
+#define ATM_VBR_RT 6
|
||||
+#define ATM_UBR_PLUS 7
|
||||
+#define ATM_GFR 8
|
||||
+
|
||||
#define ATM_MAX_PCR -1 /* maximum available PCR */
|
||||
|
||||
+
|
||||
struct atm_trafprm {
|
||||
unsigned char traffic_class; /* traffic class (ATM_UBR, ...) */
|
||||
int max_pcr; /* maximum PCR in cells per second */
|
||||
@@ -155,6 +161,9 @@ struct atm_trafprm {
|
||||
unsigned int adtf :10; /* ACR Decrease Time Factor (10-bit) */
|
||||
unsigned int cdf :3; /* Cutoff Decrease Factor (3-bit) */
|
||||
unsigned int spare :9; /* spare bits */
|
||||
+ int scr; /* sustained rate in cells per second */
|
||||
+ int mbs; /* maximum burst size (MBS) in cells */
|
||||
+ int cdv; /* Cell delay variation */
|
||||
};
|
||||
|
||||
struct atm_qos {
|
||||
--- a/net/atm/proc.c
|
||||
+++ b/net/atm/proc.c
|
||||
@@ -141,7 +141,7 @@ static void *vcc_seq_next(struct seq_fil
|
||||
static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
|
||||
{
|
||||
static const char *const class_name[] = {
|
||||
- "off", "UBR", "CBR", "VBR", "ABR"};
|
||||
+ "off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
|
||||
static const char *const aal_name[] = {
|
||||
"---", "1", "2", "3/4", /* 0- 3 */
|
||||
"???", "5", "???", "???", /* 4- 7 */
|
||||
|
|
@ -1,137 +0,0 @@
|
|||
From: Subhra Banerjee <subhrax.banerjee@intel.com>
|
||||
Date: Fri, 31 Aug 2018 12:01:19 +0530
|
||||
Subject: [PATCH] UGW_SW-29163: ATM oam support
|
||||
|
||||
--- a/drivers/net/ppp/ppp_generic.c
|
||||
+++ b/drivers/net/ppp/ppp_generic.c
|
||||
@@ -2952,6 +2952,22 @@ char *ppp_dev_name(struct ppp_channel *c
|
||||
return name;
|
||||
}
|
||||
|
||||
+/*
|
||||
+ * Return the PPP device interface pointer
|
||||
+ */
|
||||
+struct net_device *ppp_device(struct ppp_channel *chan)
|
||||
+{
|
||||
+ struct channel *pch = chan->ppp;
|
||||
+ struct net_device *dev = NULL;
|
||||
+
|
||||
+ if (pch) {
|
||||
+ read_lock_bh(&pch->upl);
|
||||
+ if (pch->ppp && pch->ppp->dev)
|
||||
+ dev = pch->ppp->dev;
|
||||
+ read_unlock_bh(&pch->upl);
|
||||
+ }
|
||||
+ return dev;
|
||||
+}
|
||||
|
||||
/*
|
||||
* Disconnect a channel from the generic layer.
|
||||
@@ -3598,6 +3614,7 @@ EXPORT_SYMBOL(ppp_unregister_channel);
|
||||
EXPORT_SYMBOL(ppp_channel_index);
|
||||
EXPORT_SYMBOL(ppp_unit_number);
|
||||
EXPORT_SYMBOL(ppp_dev_name);
|
||||
+EXPORT_SYMBOL(ppp_device);
|
||||
EXPORT_SYMBOL(ppp_input);
|
||||
EXPORT_SYMBOL(ppp_input_error);
|
||||
EXPORT_SYMBOL(ppp_output_wakeup);
|
||||
--- a/include/linux/ppp_channel.h
|
||||
+++ b/include/linux/ppp_channel.h
|
||||
@@ -74,6 +74,9 @@ extern int ppp_unit_number(struct ppp_ch
|
||||
/* Get the device name associated with a channel, or NULL if none */
|
||||
extern char *ppp_dev_name(struct ppp_channel *);
|
||||
|
||||
+/* Get the device pointer associated with a channel, or NULL if none */
|
||||
+extern struct net_device *ppp_device(struct ppp_channel *);
|
||||
+
|
||||
/*
|
||||
* SMP locking notes:
|
||||
* The channel code must ensure that when it calls ppp_unregister_channel,
|
||||
--- a/net/atm/Kconfig
|
||||
+++ b/net/atm/Kconfig
|
||||
@@ -56,6 +56,12 @@ config ATM_MPOA
|
||||
subnetwork boundaries. These shortcut connections bypass routers
|
||||
enhancing overall network performance.
|
||||
|
||||
+config ATM_MPOA_INTEL_DSL_PHY_SUPPORT
|
||||
+ bool "Intel DSL Phy MPOA support"
|
||||
+ depends on ATM && INET && ATM_MPOA!=n
|
||||
+ help
|
||||
+ Add support for Intel DSL Phy ATM MPOA
|
||||
+
|
||||
config ATM_BR2684
|
||||
tristate "RFC1483/2684 Bridged protocols"
|
||||
depends on ATM && INET
|
||||
--- a/net/atm/br2684.c
|
||||
+++ b/net/atm/br2684.c
|
||||
@@ -596,6 +596,11 @@ static int br2684_regvcc(struct atm_vcc
|
||||
atmvcc->push = br2684_push;
|
||||
atmvcc->pop = br2684_pop;
|
||||
atmvcc->release_cb = br2684_release_cb;
|
||||
+#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT)
|
||||
+ if (atm_hook_mpoa_setup) /* IPoA or EoA w/o FCS */
|
||||
+ atm_hook_mpoa_setup(atmvcc, brdev->payload == p_routed ? 3 : 0,
|
||||
+ brvcc->encaps == BR2684_ENCAPS_LLC ? 1 : 0, net_dev);
|
||||
+#endif
|
||||
atmvcc->owner = THIS_MODULE;
|
||||
|
||||
/* initialize netdev carrier state */
|
||||
--- a/net/atm/common.c
|
||||
+++ b/net/atm/common.c
|
||||
@@ -137,6 +137,11 @@ static struct proto vcc_proto = {
|
||||
.release_cb = vcc_release_cb,
|
||||
};
|
||||
|
||||
+#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT)
|
||||
+void (*atm_hook_mpoa_setup)(struct atm_vcc *, int, int, struct net_device *) = NULL;
|
||||
+EXPORT_SYMBOL(atm_hook_mpoa_setup);
|
||||
+#endif
|
||||
+
|
||||
int vcc_create(struct net *net, struct socket *sock, int protocol, int family, int kern)
|
||||
{
|
||||
struct sock *sk;
|
||||
--- a/net/atm/common.h
|
||||
+++ b/net/atm/common.h
|
||||
@@ -53,4 +53,6 @@ int svc_change_qos(struct atm_vcc *vcc,s
|
||||
|
||||
void atm_dev_release_vccs(struct atm_dev *dev);
|
||||
|
||||
+extern void (*atm_hook_mpoa_setup)(struct atm_vcc *, int, int, struct net_device *);
|
||||
+
|
||||
#endif
|
||||
--- a/net/atm/mpc.c
|
||||
+++ b/net/atm/mpc.c
|
||||
@@ -31,6 +31,7 @@
|
||||
/* Modular too */
|
||||
#include <linux/module.h>
|
||||
|
||||
+#include "common.h"
|
||||
#include "lec.h"
|
||||
#include "mpc.h"
|
||||
#include "resources.h"
|
||||
@@ -645,6 +646,10 @@ static int atm_mpoa_vcc_attach(struct at
|
||||
vcc->proto_data = mpc->dev;
|
||||
vcc->push = mpc_push;
|
||||
|
||||
+#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT)
|
||||
+ if (atm_hook_mpoa_setup) /* IPoA, LLC */
|
||||
+ atm_hook_mpoa_setup(vcc, 3, 1, mpc->dev);
|
||||
+#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
--- a/net/atm/pppoatm.c
|
||||
+++ b/net/atm/pppoatm.c
|
||||
@@ -422,6 +422,12 @@ static int pppoatm_assign_vcc(struct atm
|
||||
atmvcc->user_back = pvcc;
|
||||
atmvcc->push = pppoatm_push;
|
||||
atmvcc->pop = pppoatm_pop;
|
||||
+#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT)
|
||||
+ if (atm_hook_mpoa_setup) /* PPPoA */
|
||||
+ atm_hook_mpoa_setup(atmvcc, 2,
|
||||
+ pvcc->encaps == e_llc ? 1 : 0,
|
||||
+ ppp_device(&pvcc->chan));
|
||||
+#endif
|
||||
atmvcc->release_cb = pppoatm_release_cb;
|
||||
__module_get(THIS_MODULE);
|
||||
atmvcc->owner = THIS_MODULE;
|
||||
|
|
@ -1,775 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2020 MediaTek Inc.
|
||||
* Author: Sam.Shih <sam.shih@mediatek.com>
|
||||
* Author: Jianhui Zhao <zhaojh329@gmail.com>
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
#include <dt-bindings/clock/mediatek,mt7981-clk.h>
|
||||
#include <dt-bindings/reset/mt7986-resets.h>
|
||||
#include <dt-bindings/pinctrl/mt65xx.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/mux/mux.h>
|
||||
|
||||
/ {
|
||||
compatible = "mediatek,mt7981";
|
||||
interrupt-parent = <&gic>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
enable-method = "psci";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
enable-method = "psci";
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm: pwm@10048000 {
|
||||
compatible = "mediatek,mt7981-pwm";
|
||||
reg = <0 0x10048000 0 0x1000>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&infracfg CLK_INFRA_PWM_STA>,
|
||||
<&infracfg CLK_INFRA_PWM_HCK>,
|
||||
<&infracfg CLK_INFRA_PWM1_CK>,
|
||||
<&infracfg CLK_INFRA_PWM2_CK>,
|
||||
<&infracfg CLK_INFRA_PWM3_CK>;
|
||||
clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
|
||||
};
|
||||
|
||||
fan: pwm-fan {
|
||||
compatible = "pwm-fan";
|
||||
/* cooling level (0, 1, 2, 3) : (0% duty, 50% duty, 75% duty, 100% duty) */
|
||||
cooling-levels = <0 128 192 255>;
|
||||
#cooling-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <1000>;
|
||||
polling-delay = <1000>;
|
||||
thermal-sensors = <&thermal 0>;
|
||||
trips {
|
||||
cpu_trip_crit: crit {
|
||||
temperature = <125000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
|
||||
cpu_trip_hot: hot {
|
||||
temperature = <120000>;
|
||||
hysteresis = <2000>;
|
||||
type = "hot";
|
||||
};
|
||||
|
||||
cpu_trip_active_high: active-high {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
|
||||
cpu_trip_active_med: active-med {
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
|
||||
cpu_trip_active_low: active-low {
|
||||
temperature = <60000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
cpu-active-high {
|
||||
/* active: set fan to cooling level 3 */
|
||||
cooling-device = <&fan 3 3>;
|
||||
trip = <&cpu_trip_active_high>;
|
||||
};
|
||||
|
||||
cpu-active-med {
|
||||
/* active: set fan to cooling level 2 */
|
||||
cooling-device = <&fan 2 2>;
|
||||
trip = <&cpu_trip_active_med>;
|
||||
};
|
||||
|
||||
cpu-active-low {
|
||||
/* passive: set fan to cooling level 1 */
|
||||
cooling-device = <&fan 1 1>;
|
||||
trip = <&cpu_trip_active_low>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
thermal: thermal@1100c800 {
|
||||
#thermal-sensor-cells = <1>;
|
||||
compatible = "mediatek,mt7981-thermal", "mediatek,mt7986-thermal";
|
||||
reg = <0 0x1100c800 0 0x800>;
|
||||
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_THERM_CK>,
|
||||
<&infracfg CLK_INFRA_ADC_26M_CK>;
|
||||
clock-names = "therm", "auxadc";
|
||||
mediatek,auxadc = <&auxadc>;
|
||||
mediatek,apmixedsys = <&apmixedsys>;
|
||||
nvmem-cells = <&thermal_calibration>;
|
||||
nvmem-cell-names = "calibration-data";
|
||||
};
|
||||
|
||||
auxadc: adc@1100d000 {
|
||||
compatible = "mediatek,mt7981-auxadc",
|
||||
"mediatek,mt7986-auxadc",
|
||||
"mediatek,mt7622-auxadc";
|
||||
reg = <0 0x1100d000 0 0x1000>;
|
||||
clocks = <&infracfg CLK_INFRA_ADC_26M_CK>,
|
||||
<&infracfg CLK_INFRA_ADC_FRC_CK>;
|
||||
clock-names = "main", "32k";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
|
||||
wdma: wdma@15104800 {
|
||||
compatible = "mediatek,wed-wdma";
|
||||
reg = <0 0x15104800 0 0x400>,
|
||||
<0 0x15104c00 0 0x400>;
|
||||
};
|
||||
|
||||
ap2woccif: ap2woccif@151a5000 {
|
||||
compatible = "mediatek,ap2woccif";
|
||||
reg = <0 0x151a5000 0 0x1000>,
|
||||
<0 0x151ad000 0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
/* 64 KiB reserved for ramoops/pstore */
|
||||
ramoops@42ff0000 {
|
||||
compatible = "ramoops";
|
||||
reg = <0 0x42ff0000 0 0x10000>;
|
||||
record-size = <0x1000>;
|
||||
};
|
||||
|
||||
/* 192 KiB reserved for ARM Trusted Firmware (BL31) */
|
||||
secmon_reserved: secmon@43000000 {
|
||||
reg = <0 0x43000000 0 0x30000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wmcpu_emi: wmcpu-reserved@47c80000 {
|
||||
reg = <0 0x47c80000 0 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_emi0: wo-emi@47d80000 {
|
||||
reg = <0 0x47d80000 0 0x40000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_data: wo-data@47dc0000 {
|
||||
reg = <0 0x47dc0000 0 0x240000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_ilm0: wo-ilm@151e0000 {
|
||||
reg = <0 0x151e0000 0 0x8000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_dlm0: wo-dlm@151e8000 {
|
||||
reg = <0 0x151e8000 0 0x2000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wo_boot: wo-boot@15194000 {
|
||||
reg = <0 0x15194000 0 0x1000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-0.2";
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
trng {
|
||||
compatible = "mediatek,mt7981-rng";
|
||||
};
|
||||
|
||||
clk40m: oscillator@0 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <40000000>;
|
||||
clock-output-names = "clkxtal";
|
||||
};
|
||||
|
||||
infracfg: infracfg@10001000 {
|
||||
compatible = "mediatek,mt7981-infracfg", "syscon";
|
||||
reg = <0 0x10001000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
topckgen: topckgen@1001B000 {
|
||||
compatible = "mediatek,mt7981-topckgen", "syscon";
|
||||
reg = <0 0x1001B000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
apmixedsys: apmixedsys@1001E000 {
|
||||
compatible = "mediatek,mt7981-apmixedsys", "mediatek,mt7986-apmixedsys", "syscon";
|
||||
reg = <0 0x1001E000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupt-parent = <&gic>;
|
||||
clock-frequency = <13000000>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
};
|
||||
|
||||
watchdog: watchdog@1001c000 {
|
||||
compatible = "mediatek,mt7986-wdt",
|
||||
"mediatek,mt6589-wdt";
|
||||
reg = <0 0x1001c000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#reset-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gic: interrupt-controller@c000000 {
|
||||
compatible = "arm,gic-v3";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupt-controller;
|
||||
reg = <0 0x0c000000 0 0x40000>, /* GICD */
|
||||
<0 0x0c080000 0 0x200000>; /* GICR */
|
||||
|
||||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
uart0: serial@11002000 {
|
||||
compatible = "mediatek,mt6577-uart";
|
||||
reg = <0 0x11002000 0 0x400>;
|
||||
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_UART0_SEL>,
|
||||
<&infracfg CLK_INFRA_UART0_CK>;
|
||||
clock-names = "baud", "bus";
|
||||
assigned-clocks = <&topckgen CLK_TOP_UART_SEL>,
|
||||
<&infracfg CLK_INFRA_UART0_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>,
|
||||
<&topckgen CLK_TOP_UART_SEL>;
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@11003000 {
|
||||
compatible = "mediatek,mt6577-uart";
|
||||
reg = <0 0x11003000 0 0x400>;
|
||||
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_UART1_SEL>,
|
||||
<&infracfg CLK_INFRA_UART1_CK>;
|
||||
clock-names = "baud", "bus";
|
||||
assigned-clocks = <&topckgen CLK_TOP_UART_SEL>,
|
||||
<&infracfg CLK_INFRA_UART1_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>,
|
||||
<&topckgen CLK_TOP_UART_SEL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@11004000 {
|
||||
compatible = "mediatek,mt6577-uart";
|
||||
reg = <0 0x11004000 0 0x400>;
|
||||
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_UART2_SEL>,
|
||||
<&infracfg CLK_INFRA_UART2_CK>;
|
||||
clock-names = "baud", "bus";
|
||||
assigned-clocks = <&topckgen CLK_TOP_UART_SEL>,
|
||||
<&infracfg CLK_INFRA_UART2_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>,
|
||||
<&topckgen CLK_TOP_UART_SEL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@11007000 {
|
||||
compatible = "mediatek,mt7981-i2c";
|
||||
reg = <0 0x11007000 0 0x1000>,
|
||||
<0 0x10217080 0 0x80>;
|
||||
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-div = <1>;
|
||||
clocks = <&infracfg CLK_INFRA_I2C0_CK>,
|
||||
<&infracfg CLK_INFRA_AP_DMA_CK>,
|
||||
<&infracfg CLK_INFRA_I2C_MCK_CK>,
|
||||
<&infracfg CLK_INFRA_I2C_PCK_CK>;
|
||||
clock-names = "main", "dma", "arb", "pmic";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie: pcie@11280000 {
|
||||
compatible = "mediatek,mt7981-pcie",
|
||||
"mediatek,mt7986-pcie";
|
||||
device_type = "pci";
|
||||
reg = <0 0x11280000 0 0x4000>;
|
||||
reg-names = "pcie-mac";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-range = <0x00 0xff>;
|
||||
ranges = <0x82000000 0 0x20000000
|
||||
0x0 0x20000000 0 0x10000000>;
|
||||
status = "disabled";
|
||||
|
||||
clocks = <&infracfg CLK_INFRA_IPCIE_CK>,
|
||||
<&infracfg CLK_INFRA_IPCIE_PIPE_CK>,
|
||||
<&infracfg CLK_INFRA_IPCIER_CK>,
|
||||
<&infracfg CLK_INFRA_IPCIEB_CK>;
|
||||
|
||||
phys = <&u3port0 PHY_TYPE_PCIE>;
|
||||
phy-names = "pcie-phy";
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc 0>,
|
||||
<0 0 0 2 &pcie_intc 1>,
|
||||
<0 0 0 3 &pcie_intc 2>,
|
||||
<0 0 0 4 &pcie_intc 3>;
|
||||
pcie_intc: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
crypto: crypto@10320000 {
|
||||
compatible = "inside-secure,safexcel-eip97";
|
||||
reg = <0 0x10320000 0 0x40000>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ring0", "ring1", "ring2", "ring3";
|
||||
clocks = <&topckgen CLK_TOP_EIP97B>;
|
||||
clock-names = "top_eip97_ck";
|
||||
assigned-clocks = <&topckgen CLK_TOP_EIP97B_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_CB_NET1_D5>;
|
||||
};
|
||||
|
||||
pio: pinctrl@11d00000 {
|
||||
compatible = "mediatek,mt7981-pinctrl";
|
||||
reg = <0 0x11d00000 0 0x1000>,
|
||||
<0 0x11c00000 0 0x1000>,
|
||||
<0 0x11c10000 0 0x1000>,
|
||||
<0 0x11d20000 0 0x1000>,
|
||||
<0 0x11e00000 0 0x1000>,
|
||||
<0 0x11e20000 0 0x1000>,
|
||||
<0 0x11f00000 0 0x1000>,
|
||||
<0 0x11f10000 0 0x1000>,
|
||||
<0 0x1000b000 0 0x1000>;
|
||||
reg-names = "gpio", "iocfg_rt", "iocfg_rm",
|
||||
"iocfg_rb", "iocfg_lb", "iocfg_bl",
|
||||
"iocfg_tm", "iocfg_tl", "eint";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pio 0 0 56>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
mdio_pins: mdc-mdio-pins {
|
||||
mux {
|
||||
function = "eth";
|
||||
groups = "smi_mdc_mdio";
|
||||
};
|
||||
};
|
||||
|
||||
uart0_pins: uart0-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart0";
|
||||
};
|
||||
};
|
||||
|
||||
wifi_dbdc_pins: wifi-dbdc-pins {
|
||||
mux {
|
||||
function = "eth";
|
||||
groups = "wf0_mode1";
|
||||
};
|
||||
conf {
|
||||
pins = "WF_HB1", "WF_HB2", "WF_HB3", "WF_HB4",
|
||||
"WF_HB0", "WF_HB0_B", "WF_HB5", "WF_HB6",
|
||||
"WF_HB7", "WF_HB8", "WF_HB9", "WF_HB10",
|
||||
"WF_TOP_CLK", "WF_TOP_DATA", "WF_XO_REQ",
|
||||
"WF_CBA_RESETB", "WF_DIG_RESETB";
|
||||
drive-strength = <4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ethsys: syscon@15000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mediatek,mt7981-ethsys",
|
||||
"mediatek,mt7986-ethsys",
|
||||
"syscon";
|
||||
reg = <0 0x15000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
wed: wed@15010000 {
|
||||
compatible = "mediatek,mt7981-wed",
|
||||
"mediatek,mt7986-wed",
|
||||
"syscon";
|
||||
reg = <0 0x15010000 0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
|
||||
memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
|
||||
<&wo_data>, <&wo_boot>;
|
||||
memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
|
||||
"wo-data", "wo-boot";
|
||||
mediatek,wo-ccif = <&wo_ccif0>;
|
||||
};
|
||||
|
||||
eth: ethernet@15100000 {
|
||||
compatible = "mediatek,mt7981-eth";
|
||||
reg = <0 0x15100000 0 0x80000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <ðsys CLK_ETH_FE_EN>,
|
||||
<ðsys CLK_ETH_GP2_EN>,
|
||||
<ðsys CLK_ETH_GP1_EN>,
|
||||
<ðsys CLK_ETH_WOCPU0_EN>,
|
||||
<&sgmiisys0 CLK_SGM0_TX_EN>,
|
||||
<&sgmiisys0 CLK_SGM0_RX_EN>,
|
||||
<&sgmiisys0 CLK_SGM0_CK0_EN>,
|
||||
<&sgmiisys0 CLK_SGM0_CDR_CK0_EN>,
|
||||
<&sgmiisys1 CLK_SGM1_TX_EN>,
|
||||
<&sgmiisys1 CLK_SGM1_RX_EN>,
|
||||
<&sgmiisys1 CLK_SGM1_CK1_EN>,
|
||||
<&sgmiisys1 CLK_SGM1_CDR_CK1_EN>,
|
||||
<&topckgen CLK_TOP_SGM_REG>,
|
||||
<&topckgen CLK_TOP_NETSYS_SEL>,
|
||||
<&topckgen CLK_TOP_NETSYS_500M_SEL>;
|
||||
clock-names = "fe", "gp2", "gp1", "wocpu0",
|
||||
"sgmii_tx250m", "sgmii_rx250m",
|
||||
"sgmii_cdr_ref", "sgmii_cdr_fb",
|
||||
"sgmii2_tx250m", "sgmii2_rx250m",
|
||||
"sgmii2_cdr_ref", "sgmii2_cdr_fb",
|
||||
"sgmii_ck", "netsys0", "netsys1";
|
||||
assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>,
|
||||
<&topckgen CLK_TOP_SGM_325M_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_CB_NET2_800M>,
|
||||
<&topckgen CLK_TOP_CB_SGM_325M>;
|
||||
mediatek,ethsys = <ðsys>;
|
||||
mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
|
||||
mediatek,infracfg = <&topmisc>;
|
||||
mediatek,wed = <&wed>;
|
||||
#reset-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
mdio_bus: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
int_gbe_phy: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
phy-mode = "gmii";
|
||||
phy-is-integrated;
|
||||
nvmem-cells = <&phy_calibration>;
|
||||
nvmem-cell-names = "phy-cal-data";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
wo_ccif0: syscon@151a5000 {
|
||||
compatible = "mediatek,mt7986-wo-ccif", "syscon";
|
||||
reg = <0 0x151a5000 0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
sgmiisys0: syscon@10060000 {
|
||||
compatible = "mediatek,mt7981-sgmiisys_0", "mediatek,mt7986-sgmiisys_0", "syscon";
|
||||
reg = <0 0x10060000 0 0x1000>;
|
||||
mediatek,pnswap;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
sgmiisys1: syscon@10070000 {
|
||||
compatible = "mediatek,mt7981-sgmiisys_1", "mediatek,mt7986-sgmiisys_1", "syscon";
|
||||
reg = <0 0x10070000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
topmisc: topmisc@11d10000 {
|
||||
compatible = "mediatek,mt7981-topmisc", "syscon";
|
||||
reg = <0 0x11d10000 0 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
snand: snfi@11005000 {
|
||||
compatible = "mediatek,mt7986-snand";
|
||||
reg = <0 0x11005000 0 0x1000>, <0 0x11006000 0 0x1000>;
|
||||
reg-names = "nfi", "ecc";
|
||||
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_SPINFI1_CK>,
|
||||
<&infracfg CLK_INFRA_NFI1_CK>,
|
||||
<&infracfg CLK_INFRA_NFI_HCK_CK>;
|
||||
clock-names = "pad_clk", "nfi_clk", "nfi_hclk";
|
||||
assigned-clocks = <&topckgen CLK_TOP_SPINFI_SEL>,
|
||||
<&topckgen CLK_TOP_NFI1X_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_CB_M_D8>,
|
||||
<&topckgen CLK_TOP_CB_M_D8>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@11230000 {
|
||||
compatible = "mediatek,mt7986-mmc",
|
||||
"mediatek,mt7981-mmc";
|
||||
reg = <0 0x11230000 0 0x1000>, <0 0x11c20000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_MSDC_CK>,
|
||||
<&infracfg CLK_INFRA_MSDC_HCK_CK>,
|
||||
<&infracfg CLK_INFRA_MSDC_66M_CK>,
|
||||
<&infracfg CLK_INFRA_MSDC_133M_CK>;
|
||||
assigned-clocks = <&topckgen CLK_TOP_EMMC_208M_SEL>,
|
||||
<&topckgen CLK_TOP_EMMC_400M_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_CB_M_D2>,
|
||||
<&topckgen CLK_TOP_CB_NET2_D2>;
|
||||
clock-names = "source", "hclk", "axi_cg", "ahb_cg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
wed_pcie: wed_pcie@10003000 {
|
||||
compatible = "mediatek,wed_pcie";
|
||||
reg = <0 0x10003000 0 0x10>;
|
||||
};
|
||||
|
||||
spi0: spi@1100a000 {
|
||||
compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0 0x1100a000 0 0x100>;
|
||||
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&topckgen CLK_TOP_CB_M_D2>,
|
||||
<&topckgen CLK_TOP_SPI_SEL>,
|
||||
<&infracfg CLK_INFRA_SPI0_CK>,
|
||||
<&infracfg CLK_INFRA_SPI0_HCK_CK>;
|
||||
|
||||
clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@1100b000 {
|
||||
compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0 0x1100b000 0 0x100>;
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&topckgen CLK_TOP_CB_M_D2>,
|
||||
<&topckgen CLK_TOP_SPIM_MST_SEL>,
|
||||
<&infracfg CLK_INFRA_SPI1_CK>,
|
||||
<&infracfg CLK_INFRA_SPI1_HCK_CK>;
|
||||
clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi2: spi@11009000 {
|
||||
compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0 0x11009000 0 0x100>;
|
||||
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&topckgen CLK_TOP_CB_M_D2>,
|
||||
<&topckgen CLK_TOP_SPI_SEL>,
|
||||
<&infracfg CLK_INFRA_SPI2_CK>,
|
||||
<&infracfg CLK_INFRA_SPI2_HCK_CK>;
|
||||
clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
consys: consys@10000000 {
|
||||
compatible = "mediatek,mt7981-consys";
|
||||
reg = <0 0x10000000 0 0x8600000>;
|
||||
memory-region = <&wmcpu_emi>;
|
||||
};
|
||||
|
||||
xhci: usb@11200000 {
|
||||
compatible = "mediatek,mt7986-xhci",
|
||||
"mediatek,mtk-xhci";
|
||||
reg = <0 0x11200000 0 0x2e00>,
|
||||
<0 0x11203e00 0 0x0100>;
|
||||
reg-names = "mac", "ippc";
|
||||
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>,
|
||||
<&infracfg CLK_INFRA_IUSB_CK>,
|
||||
<&infracfg CLK_INFRA_IUSB_133_CK>,
|
||||
<&infracfg CLK_INFRA_IUSB_66M_CK>,
|
||||
<&topckgen CLK_TOP_U2U3_XHCI_SEL>;
|
||||
clock-names = "sys_ck",
|
||||
"ref_ck",
|
||||
"mcu_ck",
|
||||
"dma_ck",
|
||||
"xhci_ck";
|
||||
phys = <&u2port0 PHY_TYPE_USB2>,
|
||||
<&u3port0 PHY_TYPE_USB3>;
|
||||
vusb33-supply = <®_3p3v>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb_phy: usb-phy@11e10000 {
|
||||
compatible = "mediatek,mt7981",
|
||||
"mediatek,generic-tphy-v2";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x11e10000 0x1700>;
|
||||
status = "disabled";
|
||||
|
||||
u2port0: usb-phy@0 {
|
||||
reg = <0x0 0x700>;
|
||||
clocks = <&topckgen CLK_TOP_USB_FRMCNT_SEL>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
u3port0: usb-phy@700 {
|
||||
reg = <0x700 0x900>;
|
||||
clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
mediatek,syscon-type = <&topmisc 0x218 0>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-3.3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
efuse: efuse@11f20000 {
|
||||
compatible = "mediatek,mt7981-efuse",
|
||||
"mediatek,efuse";
|
||||
reg = <0 0x11f20000 0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
status = "okay";
|
||||
|
||||
thermal_calibration: thermal-calib@274 {
|
||||
reg = <0x274 0xc>;
|
||||
};
|
||||
|
||||
phy_calibration: phy-calib@8dc {
|
||||
reg = <0x8dc 0x10>;
|
||||
};
|
||||
|
||||
comb_rx_imp_p0: usb3-rx-imp@8c8 {
|
||||
reg = <0x8c8 1>;
|
||||
bits = <0 5>;
|
||||
};
|
||||
|
||||
comb_tx_imp_p0: usb3-tx-imp@8c8 {
|
||||
reg = <0x8c8 2>;
|
||||
bits = <5 5>;
|
||||
};
|
||||
|
||||
comb_intr_p0: usb3-intr@8c9 {
|
||||
reg = <0x8c9 1>;
|
||||
bits = <2 6>;
|
||||
};
|
||||
};
|
||||
|
||||
afe: audio-controller@11210000 {
|
||||
compatible = "mediatek,mt79xx-audio";
|
||||
reg = <0 0x11210000 0 0x9000>;
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&infracfg CLK_INFRA_AUD_BUS_CK>,
|
||||
<&infracfg CLK_INFRA_AUD_26M_CK>,
|
||||
<&infracfg CLK_INFRA_AUD_L_CK>,
|
||||
<&infracfg CLK_INFRA_AUD_AUD_CK>,
|
||||
<&infracfg CLK_INFRA_AUD_EG2_CK>,
|
||||
<&topckgen CLK_TOP_AUD_SEL>;
|
||||
clock-names = "aud_bus_ck",
|
||||
"aud_26m_ck",
|
||||
"aud_l_ck",
|
||||
"aud_aud_ck",
|
||||
"aud_eg2_ck",
|
||||
"aud_sel";
|
||||
assigned-clocks = <&topckgen CLK_TOP_AUD_SEL>,
|
||||
<&topckgen CLK_TOP_A1SYS_SEL>,
|
||||
<&topckgen CLK_TOP_AUD_L_SEL>,
|
||||
<&topckgen CLK_TOP_A_TUNER_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_CB_APLL2_196M>,
|
||||
<&topckgen CLK_TOP_APLL2_D4>,
|
||||
<&topckgen CLK_TOP_CB_APLL2_196M>,
|
||||
<&topckgen CLK_TOP_APLL2_D4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ice: ice_debug {
|
||||
compatible = "mediatek,mt7981-ice_debug",
|
||||
"mediatek,mt2701-ice_debug";
|
||||
clocks = <&infracfg CLK_INFRA_DBG_CK>;
|
||||
clock-names = "ice_dbg";
|
||||
};
|
||||
|
||||
wifi: wifi@18000000 {
|
||||
compatible = "mediatek,mt7981-wmac";
|
||||
resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>;
|
||||
reset-names = "consys";
|
||||
pinctrl-0 = <&wifi_dbdc_pins>;
|
||||
pinctrl-names = "dbdc";
|
||||
clocks = <&topckgen CLK_TOP_NETSYS_MCU_SEL>,
|
||||
<&topckgen CLK_TOP_AP2CNN_HOST_SEL>;
|
||||
clock-names = "mcu", "ap2conn";
|
||||
reg = <0 0x18000000 0 0x1000000>,
|
||||
<0 0x10003000 0 0x1000>,
|
||||
<0 0x11d10000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
|
||||
memory-region = <&wmcpu_emi>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
@ -1,52 +0,0 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
|
||||
|
||||
#include "mt7986a-rfb.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "mediatek,mt7986a-rfb-snand";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi_nand: spi_nand@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-nand";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <10000000>;
|
||||
spi-tx-buswidth = <4>;
|
||||
spi-rx-buswidth = <4>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "BL2";
|
||||
reg = <0x00000 0x0100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@100000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x0100000 0x0080000>;
|
||||
};
|
||||
factory: partition@180000 {
|
||||
label = "Factory";
|
||||
reg = <0x180000 0x0200000>;
|
||||
};
|
||||
partition@380000 {
|
||||
label = "FIP";
|
||||
reg = <0x380000 0x0200000>;
|
||||
};
|
||||
partition@580000 {
|
||||
label = "ubi";
|
||||
reg = <0x580000 0x4000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&wifi {
|
||||
mediatek,mtd-eeprom = <&factory 0>;
|
||||
};
|
||||
|
|
@ -1,51 +0,0 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
|
||||
|
||||
#include "mt7986a-rfb.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "mediatek,mt7986a-rfb-snor";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi_nor: spi_nor@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <52000000>;
|
||||
spi-tx-buswidth = <4>;
|
||||
spi-rx-buswidth = <4>;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@00000 {
|
||||
label = "BL2";
|
||||
reg = <0x00000 0x0040000>;
|
||||
};
|
||||
partition@40000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x40000 0x0010000>;
|
||||
};
|
||||
factory: partition@50000 {
|
||||
label = "Factory";
|
||||
reg = <0x50000 0x00B0000>;
|
||||
};
|
||||
partition@100000 {
|
||||
label = "FIP";
|
||||
reg = <0x100000 0x0080000>;
|
||||
};
|
||||
partition@180000 {
|
||||
label = "firmware";
|
||||
reg = <0x180000 0xE00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&wifi {
|
||||
mediatek,mtd-eeprom = <&factory 0>;
|
||||
};
|
||||
|
|
@ -1,389 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2021 MediaTek Inc.
|
||||
* Author: Sam.Shih <sam.shih@mediatek.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "mt7986a.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MediaTek MT7986a RFB";
|
||||
compatible = "mediatek,mt7986a-rfb";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0 0x40000000 0 0x40000000>;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-1.8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-3.3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5v: regulator-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-5V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
gmac1: mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
phy-mode = "2500base-x";
|
||||
};
|
||||
|
||||
mdio: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&wifi {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "dbdc";
|
||||
pinctrl-0 = <&wf_2g_5g_pins>;
|
||||
pinctrl-1 = <&wf_dbdc_pins>;
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy5: phy@5 {
|
||||
compatible = "ethernet-phy-id67c9.de0a";
|
||||
reg = <5>;
|
||||
|
||||
reset-gpios = <&pio 6 1>;
|
||||
reset-deassert-us = <20000>;
|
||||
};
|
||||
|
||||
phy6: phy@6 {
|
||||
compatible = "ethernet-phy-id67c9.de0a";
|
||||
reg = <6>;
|
||||
};
|
||||
|
||||
switch: switch@0 {
|
||||
compatible = "mediatek,mt7531";
|
||||
reg = <31>;
|
||||
reset-gpios = <&pio 5 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
pinctrl-names = "default", "state_uhs";
|
||||
pinctrl-0 = <&mmc0_pins_default>;
|
||||
pinctrl-1 = <&mmc0_pins_uhs>;
|
||||
bus-width = <8>;
|
||||
max-frequency = <200000000>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
hs400-ds-delay = <0x14014>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
vqmmc-supply = <®_1p8v>;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
mmc0_pins_default: mmc0-pins {
|
||||
mux {
|
||||
function = "emmc";
|
||||
groups = "emmc_51";
|
||||
};
|
||||
conf-cmd-dat {
|
||||
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
|
||||
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
|
||||
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
|
||||
input-enable;
|
||||
drive-strength = <4>;
|
||||
mediatek,pull-up-adv = <1>; /* pull-up 10K */
|
||||
};
|
||||
conf-clk {
|
||||
pins = "EMMC_CK";
|
||||
drive-strength = <6>;
|
||||
mediatek,pull-down-adv = <2>; /* pull-down 50K */
|
||||
};
|
||||
conf-ds {
|
||||
pins = "EMMC_DSL";
|
||||
mediatek,pull-down-adv = <2>; /* pull-down 50K */
|
||||
};
|
||||
conf-rst {
|
||||
pins = "EMMC_RSTB";
|
||||
drive-strength = <4>;
|
||||
mediatek,pull-up-adv = <1>; /* pull-up 10K */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_pins_uhs: mmc0-uhs-pins {
|
||||
mux {
|
||||
function = "emmc";
|
||||
groups = "emmc_51";
|
||||
};
|
||||
conf-cmd-dat {
|
||||
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
|
||||
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
|
||||
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
|
||||
input-enable;
|
||||
drive-strength = <4>;
|
||||
mediatek,pull-up-adv = <1>; /* pull-up 10K */
|
||||
};
|
||||
conf-clk {
|
||||
pins = "EMMC_CK";
|
||||
drive-strength = <6>;
|
||||
mediatek,pull-down-adv = <2>; /* pull-down 50K */
|
||||
};
|
||||
conf-ds {
|
||||
pins = "EMMC_DSL";
|
||||
mediatek,pull-down-adv = <2>; /* pull-down 50K */
|
||||
};
|
||||
conf-rst {
|
||||
pins = "EMMC_RSTB";
|
||||
drive-strength = <4>;
|
||||
mediatek,pull-up-adv = <1>; /* pull-up 10K */
|
||||
};
|
||||
};
|
||||
|
||||
pcie_pins: pcie-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie_clk", "pcie_wake", "pcie_pereset";
|
||||
};
|
||||
};
|
||||
|
||||
spic_pins_g2: spic-pins-29-to-32 {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spi1_2";
|
||||
};
|
||||
};
|
||||
|
||||
spi_flash_pins: spi-flash-pins-33-to-38 {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spi0", "spi0_wp_hold";
|
||||
};
|
||||
conf-pu {
|
||||
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
|
||||
drive-strength = <8>;
|
||||
mediatek,pull-up-adv = <0>; /* bias-disable */
|
||||
};
|
||||
conf-pd {
|
||||
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
|
||||
drive-strength = <8>;
|
||||
mediatek,pull-down-adv = <0>; /* bias-disable */
|
||||
};
|
||||
};
|
||||
|
||||
uart1_pins: uart1-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart1";
|
||||
};
|
||||
};
|
||||
|
||||
uart2_pins: uart2-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart2";
|
||||
};
|
||||
};
|
||||
|
||||
wf_2g_5g_pins: wf_2g_5g-pins {
|
||||
mux {
|
||||
function = "wifi";
|
||||
groups = "wf_2g", "wf_5g";
|
||||
};
|
||||
conf {
|
||||
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
|
||||
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
|
||||
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
|
||||
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
|
||||
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
|
||||
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
|
||||
"WF1_TOP_CLK", "WF1_TOP_DATA";
|
||||
drive-strength = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
wf_dbdc_pins: wf_dbdc-pins {
|
||||
mux {
|
||||
function = "wifi";
|
||||
groups = "wf_dbdc";
|
||||
};
|
||||
conf {
|
||||
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
|
||||
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
|
||||
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
|
||||
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
|
||||
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
|
||||
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
|
||||
"WF1_TOP_CLK", "WF1_TOP_DATA";
|
||||
drive-strength = <4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi_flash_pins>;
|
||||
cs-gpios = <0>, <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spic_pins_g2>;
|
||||
status = "okay";
|
||||
|
||||
proslic_spi: proslic_spi@0 {
|
||||
compatible = "silabs,proslic_spi";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <10000000>;
|
||||
spi-cpha = <1>;
|
||||
spi-cpol = <1>;
|
||||
channel_count = <1>;
|
||||
debug_level = <4>; /* 1 = TRC, 2 = DBG, 4 = ERR */
|
||||
reset_gpio = <&pio 7 0>;
|
||||
ig,enable-spi = <1>; /* 1: Enable, 0: Disable */
|
||||
};
|
||||
};
|
||||
|
||||
&gmac1 {
|
||||
phy-mode = "2500base-x";
|
||||
phy-connection-type = "2500base-x";
|
||||
phy-handle = <&phy6>;
|
||||
};
|
||||
|
||||
&switch {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "wan";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "lan6";
|
||||
|
||||
phy-mode = "2500base-x";
|
||||
phy-handle = <&phy5>;
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ssusb {
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <®_5v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -1,200 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2022 MediaTek Inc.
|
||||
* Author: Sam.Shih <sam.shih@mediatek.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "mt7988a-rfb-spim-nand.dtsi"
|
||||
#include <dt-bindings/pinctrl/mt65xx.h>
|
||||
|
||||
/ {
|
||||
model = "MediaTek MT7988A DSA 10G SPIM-NAND RFB";
|
||||
compatible = "mediatek,mt7988a-dsa-10g-spim-snand",
|
||||
"mediatek,mt7988a-rfb-snand",
|
||||
"mediatek,mt7988";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200n1 loglevel=8 \
|
||||
earlycon=uart8250,mmio32,0x11000000 \
|
||||
pci=pcie_bus_perf";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0 0x40000000 0 0x40000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ð {
|
||||
pinctrl-0 = <&mdio0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "internal";
|
||||
|
||||
fixed-link {
|
||||
speed = <10000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
gmac1: mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
phy-mode = "internal";
|
||||
phy-connection-type = "internal";
|
||||
phy = <&phy15>;
|
||||
};
|
||||
|
||||
gmac2: mac@2 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <2>;
|
||||
phy-mode = "10gbase-kr";
|
||||
phy-connection-type = "10gbase-kr";
|
||||
phy = <&phy8>;
|
||||
};
|
||||
|
||||
mdio0: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* external Aquantia AQR113C */
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reset-gpios = <&pio 72 1>;
|
||||
reset-assert-us = <100000>;
|
||||
reset-deassert-us = <221000>;
|
||||
};
|
||||
|
||||
/* external Aquantia AQR113C */
|
||||
phy8: ethernet-phy@8 {
|
||||
reg = <8>;
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reset-gpios = <&pio 71 1>;
|
||||
reset-assert-us = <100000>;
|
||||
reset-deassert-us = <221000>;
|
||||
};
|
||||
|
||||
/* external Maxlinear GPY211C */
|
||||
phy5: ethernet-phy@5 {
|
||||
reg = <5>;
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
phy-mode = "2500base-x";
|
||||
};
|
||||
|
||||
/* external Maxlinear GPY211C */
|
||||
phy13: ethernet-phy@13 {
|
||||
reg = <13>;
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
phy-mode = "2500base-x";
|
||||
};
|
||||
|
||||
/* internal 2.5G PHY */
|
||||
phy15: ethernet-phy@15 {
|
||||
reg = <15>;
|
||||
pinctrl-names = "i2p5gbe-led";
|
||||
pinctrl-0 = <&i2p5gbe_led0_pins>;
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
phy-mode = "internal";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&switch {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan0";
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&gsw_phy0>;
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan1";
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&gsw_phy1>;
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&gsw_phy2>;
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan3";
|
||||
phy-mode = "internal";
|
||||
phy-handle = <&gsw_phy3>;
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "internal";
|
||||
|
||||
fixed-link {
|
||||
speed = <10000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gsw_phy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-id03a2.9481";
|
||||
reg = <0>;
|
||||
phy-mode = "internal";
|
||||
pinctrl-names = "gbe-led";
|
||||
pinctrl-0 = <&gbe0_led0_pins>;
|
||||
nvmem-cells = <&phy_calibration_p0>;
|
||||
nvmem-cell-names = "phy-cal-data";
|
||||
};
|
||||
|
||||
gsw_phy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-id03a2.9481";
|
||||
reg = <1>;
|
||||
phy-mode = "internal";
|
||||
pinctrl-names = "gbe-led";
|
||||
pinctrl-0 = <&gbe1_led0_pins>;
|
||||
nvmem-cells = <&phy_calibration_p1>;
|
||||
nvmem-cell-names = "phy-cal-data";
|
||||
};
|
||||
|
||||
gsw_phy2: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-id03a2.9481";
|
||||
reg = <2>;
|
||||
phy-mode = "internal";
|
||||
pinctrl-names = "gbe-led";
|
||||
pinctrl-0 = <&gbe2_led0_pins>;
|
||||
nvmem-cells = <&phy_calibration_p2>;
|
||||
nvmem-cell-names = "phy-cal-data";
|
||||
};
|
||||
|
||||
gsw_phy3: ethernet-phy@3 {
|
||||
compatible = "ethernet-phy-id03a2.9481";
|
||||
reg = <3>;
|
||||
phy-mode = "internal";
|
||||
pinctrl-names = "gbe-led";
|
||||
pinctrl-0 = <&gbe3_led0_pins>;
|
||||
nvmem-cells = <&phy_calibration_p3>;
|
||||
nvmem-cell-names = "phy-cal-data";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,70 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2022 MediaTek Inc.
|
||||
* Author: Sam.Shih <sam.shih@mediatek.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "mt7988a-rfb.dtsi"
|
||||
|
||||
&pio {
|
||||
spi0_flash_pins: spi0-pins {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spi0", "spi0_wp_hold";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_flash_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi_nand: spi_nand@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <52000000>;
|
||||
spi-tx-buswidth = <4>;
|
||||
spi-rx-buswidth = <4>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&spi_nand {
|
||||
mediatek,nmbm;
|
||||
mediatek,bmt-max-ratio = <1>;
|
||||
mediatek,bmt-max-reserved-blocks = <64>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "BL2";
|
||||
reg = <0x00000 0x0100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x0100000 0x0080000>;
|
||||
};
|
||||
|
||||
factory: partition@180000 {
|
||||
label = "Factory";
|
||||
reg = <0x180000 0x0400000>;
|
||||
};
|
||||
|
||||
partition@580000 {
|
||||
label = "FIP";
|
||||
reg = <0x580000 0x0200000>;
|
||||
};
|
||||
|
||||
partition@780000 {
|
||||
label = "ubi";
|
||||
reg = <0x780000 0x7080000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,175 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2022 MediaTek Inc.
|
||||
* Author: Sam.Shih <sam.shih@mediatek.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "mt7988a.dtsi"
|
||||
#include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
|
||||
|
||||
&cpu0 {
|
||||
proc-supply = <&rt5190_buck3>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
proc-supply = <&rt5190_buck3>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
proc-supply = <&rt5190_buck3>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
proc-supply = <&rt5190_buck3>;
|
||||
};
|
||||
|
||||
&cci {
|
||||
proc-supply = <&rt5190_buck3>;
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
|
||||
rt5190a_64: rt5190a@64 {
|
||||
compatible = "richtek,rt5190a";
|
||||
reg = <0x64>;
|
||||
/*interrupts-extended = <&gpio26 0 IRQ_TYPE_LEVEL_LOW>;*/
|
||||
vin2-supply = <&rt5190_buck1>;
|
||||
vin3-supply = <&rt5190_buck1>;
|
||||
vin4-supply = <&rt5190_buck1>;
|
||||
|
||||
regulators {
|
||||
rt5190_buck1: buck1 {
|
||||
regulator-name = "rt5190a-buck1";
|
||||
regulator-min-microvolt = <5090000>;
|
||||
regulator-max-microvolt = <5090000>;
|
||||
regulator-allowed-modes =
|
||||
<RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
buck2 {
|
||||
regulator-name = "vcore";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
rt5190_buck3: buck3 {
|
||||
regulator-name = "vproc";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
buck4 {
|
||||
regulator-name = "rt5190a-buck4";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-allowed-modes =
|
||||
<RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
ldo {
|
||||
regulator-name = "rt5190a-ldo";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie2_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie3_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssusb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssusb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
pcie0_pins: pcie0-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie_2l_0_pereset", "pcie_clk_req_n0_0",
|
||||
"pcie_wake_n0_0";
|
||||
};
|
||||
};
|
||||
|
||||
pcie1_pins: pcie1-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie_2l_1_pereset", "pcie_clk_req_n1",
|
||||
"pcie_wake_n1_0";
|
||||
};
|
||||
};
|
||||
|
||||
pcie2_pins: pcie2-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie_1l_0_pereset", "pcie_clk_req_n2_0",
|
||||
"pcie_wake_n2_0";
|
||||
};
|
||||
};
|
||||
|
||||
pcie3_pins: pcie3-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie_1l_1_pereset", "pcie_clk_req_n3",
|
||||
"pcie_wake_n3_0";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&xphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -1,853 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2023 MediaTek Inc.
|
||||
* Author: Sam.Shih <sam.shih@mediatek.com>
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
#include <dt-bindings/reset/ti-syscon.h>
|
||||
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
|
||||
#include <dt-bindings/pinctrl/mt65xx.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
compatible = "mediatek,mt7988";
|
||||
interrupt-parent = <&gic>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
clk40m: oscillator@0 {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <40000000>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "clkxtal";
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a73";
|
||||
enable-method = "psci";
|
||||
reg = <0x0>;
|
||||
clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
|
||||
<&topckgen CLK_TOP_XTAL>;
|
||||
clock-names = "cpu", "intermediate";
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
mediatek,cci = <&cci>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a73";
|
||||
enable-method = "psci";
|
||||
reg = <0x1>;
|
||||
clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
|
||||
<&topckgen CLK_TOP_XTAL>;
|
||||
clock-names = "cpu", "intermediate";
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
mediatek,cci = <&cci>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a73";
|
||||
enable-method = "psci";
|
||||
reg = <0x2>;
|
||||
clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
|
||||
<&topckgen CLK_TOP_XTAL>;
|
||||
clock-names = "cpu", "intermediate";
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
mediatek,cci = <&cci>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a73";
|
||||
enable-method = "psci";
|
||||
reg = <0x3>;
|
||||
clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
|
||||
<&topckgen CLK_TOP_XTAL>;
|
||||
clock-names = "cpu", "intermediate";
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
mediatek,cci = <&cci>;
|
||||
};
|
||||
|
||||
cluster0_opp: opp_table0 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
opp00 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <850000>;
|
||||
};
|
||||
opp01 {
|
||||
opp-hz = /bits/ 64 <1100000000>;
|
||||
opp-microvolt = <850000>;
|
||||
};
|
||||
opp02 {
|
||||
opp-hz = /bits/ 64 <1500000000>;
|
||||
opp-microvolt = <850000>;
|
||||
};
|
||||
opp03 {
|
||||
opp-hz = /bits/ 64 <1800000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cci: cci {
|
||||
compatible = "mediatek,mt7988-cci",
|
||||
"mediatek,mt8183-cci";
|
||||
clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
|
||||
<&topckgen CLK_TOP_XTAL>;
|
||||
clock-names = "cci", "intermediate";
|
||||
operating-points-v2 = <&cci_opp>;
|
||||
};
|
||||
|
||||
cci_opp: opp_table_cci {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
opp00 {
|
||||
opp-hz = /bits/ 64 <480000000>;
|
||||
opp-microvolt = <850000>;
|
||||
};
|
||||
opp01 {
|
||||
opp-hz = /bits/ 64 <660000000>;
|
||||
opp-microvolt = <850000>;
|
||||
};
|
||||
opp02 {
|
||||
opp-hz = /bits/ 64 <900000000>;
|
||||
opp-microvolt = <850000>;
|
||||
};
|
||||
opp03 {
|
||||
opp-hz = /bits/ 64 <1080000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
};
|
||||
|
||||
pmu {
|
||||
compatible = "arm,cortex-a73-pmu";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupt = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-0.2";
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
/* 192 KiB reserved for ARM Trusted Firmware (BL31) */
|
||||
secmon_reserved: secmon@43000000 {
|
||||
reg = <0 0x43000000 0 0x30000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "simple-bus";
|
||||
ranges;
|
||||
|
||||
gic: interrupt-controller@c000000 {
|
||||
compatible = "arm,gic-v3";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupt-controller;
|
||||
reg = <0 0x0c000000 0 0x40000>, /* GICD */
|
||||
<0 0x0c080000 0 0x200000>, /* GICR */
|
||||
<0 0x0c400000 0 0x2000>, /* GICC */
|
||||
<0 0x0c410000 0 0x1000>, /* GICH */
|
||||
<0 0x0c420000 0 0x2000>; /* GICV */
|
||||
|
||||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
phyfw: phy-firmware@f000000 {
|
||||
compatible = "mediatek,2p5gphy-fw";
|
||||
reg = <0 0x0f000000 0 0x8000>,
|
||||
<0 0x0f100000 0 0x20000>,
|
||||
<0 0x0f0f0000 0 0x200>;
|
||||
};
|
||||
|
||||
infracfg: infracfg@10001000 {
|
||||
compatible = "mediatek,mt7988-infracfg", "syscon";
|
||||
reg = <0 0x10001000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
topckgen: topckgen@1001b000 {
|
||||
compatible = "mediatek,mt7988-topckgen", "syscon";
|
||||
reg = <0 0x1001b000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
watchdog: watchdog@1001c000 {
|
||||
compatible = "mediatek,mt7988-wdt",
|
||||
"mediatek,mt6589-wdt",
|
||||
"syscon";
|
||||
reg = <0 0x1001c000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
apmixedsys: apmixedsys@1001e000 {
|
||||
compatible = "mediatek,mt7988-apmixedsys";
|
||||
reg = <0 0x1001e000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
pio: pinctrl@1001f000 {
|
||||
compatible = "mediatek,mt7988-pinctrl";
|
||||
reg = <0 0x1001f000 0 0x1000>,
|
||||
<0 0x11c10000 0 0x1000>,
|
||||
<0 0x11d00000 0 0x1000>,
|
||||
<0 0x11d20000 0 0x1000>,
|
||||
<0 0x11e00000 0 0x1000>,
|
||||
<0 0x11f00000 0 0x1000>,
|
||||
<0 0x1000b000 0 0x1000>;
|
||||
reg-names = "gpio_base", "iocfg_tr_base",
|
||||
"iocfg_br_base", "iocfg_rb_base",
|
||||
"iocfg_lb_base", "iocfg_tl_base", "eint";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pio 0 0 83>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
mdio0_pins: mdio0-pins {
|
||||
mux {
|
||||
function = "eth";
|
||||
groups = "mdc_mdio0";
|
||||
};
|
||||
|
||||
conf {
|
||||
groups = "mdc_mdio0";
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0-pins-g0 {
|
||||
mux {
|
||||
function = "i2c";
|
||||
groups = "i2c0_1";
|
||||
};
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1-pins-g0 {
|
||||
mux {
|
||||
function = "i2c";
|
||||
groups = "i2c1_0";
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2-pins-g0 {
|
||||
mux {
|
||||
function = "i2c";
|
||||
groups = "i2c2_1";
|
||||
};
|
||||
};
|
||||
|
||||
gbe0_led0_pins: gbe0-pins {
|
||||
mux {
|
||||
function = "led";
|
||||
groups = "gbe0_led0";
|
||||
};
|
||||
};
|
||||
|
||||
gbe1_led0_pins: gbe1-pins {
|
||||
mux {
|
||||
function = "led";
|
||||
groups = "gbe1_led0";
|
||||
};
|
||||
};
|
||||
|
||||
gbe2_led0_pins: gbe2-pins {
|
||||
mux {
|
||||
function = "led";
|
||||
groups = "gbe2_led0";
|
||||
};
|
||||
};
|
||||
|
||||
gbe3_led0_pins: gbe3-pins {
|
||||
mux {
|
||||
function = "led";
|
||||
groups = "gbe3_led0";
|
||||
};
|
||||
};
|
||||
|
||||
i2p5gbe_led0_pins: 2p5gbe-pins {
|
||||
mux {
|
||||
function = "led";
|
||||
groups = "2p5gbe_led0";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
boottrap: boottrap@1001f6f0 {
|
||||
compatible = "mediatek,boottrap";
|
||||
reg = <0 0x1001f6f0 0 0x4>;
|
||||
};
|
||||
|
||||
sgmiisys0: syscon@10060000 {
|
||||
compatible = "mediatek,mt7988-sgmiisys",
|
||||
"mediatek,mt7988-sgmiisys_0",
|
||||
"syscon";
|
||||
reg = <0 0x10060000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
sgmiisys1: syscon@10070000 {
|
||||
compatible = "mediatek,mt7988-sgmiisys",
|
||||
"mediatek,mt7988-sgmiisys_1",
|
||||
"syscon";
|
||||
reg = <0 0x10070000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
usxgmiisys0: usxgmiisys@10080000 {
|
||||
compatible = "mediatek,mt7988-usxgmiisys",
|
||||
"mediatek,mt7988-usxgmiisys_0",
|
||||
"syscon";
|
||||
reg = <0 0x10080000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
usxgmiisys1: usxgmiisys@10081000 {
|
||||
compatible = "mediatek,mt7988-usxgmiisys",
|
||||
"mediatek,mt7988-usxgmiisys_1",
|
||||
"syscon";
|
||||
reg = <0 0x10081000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
xfi_pextp0: xfi_pextp@11f20000 {
|
||||
compatible = "mediatek,mt7988-xfi_pextp",
|
||||
"mediatek,mt7988-xfi_pextp_0",
|
||||
"syscon";
|
||||
reg = <0 0x11f20000 0 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
xfi_pextp1: xfi_pextp@11f30000 {
|
||||
compatible = "mediatek,mt7988-xfi_pextp",
|
||||
"mediatek,mt7988-xfi_pextp_1",
|
||||
"syscon";
|
||||
reg = <0 0x11f30000 0 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
xfi_pll: xfi_pll@11f40000 {
|
||||
compatible = "mediatek,mt7988-xfi_pll", "syscon";
|
||||
reg = <0 0x11f40000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
mcusys: mcusys@100e0000 {
|
||||
compatible = "mediatek,mt7988-mcusys", "syscon";
|
||||
reg = <0 0x100e0000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
uart0: serial@11000000 {
|
||||
compatible = "mediatek,mt7986-uart",
|
||||
"mediatek,mt6577-uart";
|
||||
reg = <0 0x11000000 0 0x100>;
|
||||
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
||||
/*
|
||||
* 8250-mtk driver don't control "baud" clock since commit
|
||||
* e32a83c70cf9 (kernel v5.7), but both "baud" and "bus" clocks
|
||||
* still need to be passed to the driver to prevent probe fail
|
||||
*/
|
||||
clocks = <&topckgen CLK_TOP_UART_SEL>,
|
||||
<&infracfg CLK_INFRA_52M_UART0_CK>;
|
||||
clock-names = "baud", "bus";
|
||||
assigned-clocks = <&topckgen CLK_TOP_UART_SEL>,
|
||||
<&infracfg CLK_INFRA_MUX_UART0_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_XTAL>,
|
||||
<&topckgen CLK_TOP_UART_SEL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@11003000 {
|
||||
compatible = "mediatek,mt7988-i2c",
|
||||
"mediatek,mt7981-i2c";
|
||||
reg = <0 0x11003000 0 0x1000>,
|
||||
<0 0x10217080 0 0x80>;
|
||||
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-div = <1>;
|
||||
clocks = <&infracfg CLK_INFRA_I2C_BCK>,
|
||||
<&infracfg CLK_INFRA_66M_AP_DMA_BCK>;
|
||||
clock-names = "main", "dma";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@11004000 {
|
||||
compatible = "mediatek,mt7988-i2c",
|
||||
"mediatek,mt7981-i2c";
|
||||
reg = <0 0x11004000 0 0x1000>,
|
||||
<0 0x10217100 0 0x80>;
|
||||
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-div = <1>;
|
||||
clocks = <&infracfg CLK_INFRA_I2C_BCK>,
|
||||
<&infracfg CLK_INFRA_66M_AP_DMA_BCK>;
|
||||
clock-names = "main", "dma";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@11005000 {
|
||||
compatible = "mediatek,mt7988-i2c",
|
||||
"mediatek,mt7981-i2c";
|
||||
reg = <0 0x11005000 0 0x1000>,
|
||||
<0 0x10217180 0 0x80>;
|
||||
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-div = <1>;
|
||||
clocks = <&infracfg CLK_INFRA_I2C_BCK>,
|
||||
<&infracfg CLK_INFRA_66M_AP_DMA_BCK>;
|
||||
clock-names = "main", "dma";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@11007000 {
|
||||
compatible = "mediatek,ipm-spi-quad", "mediatek,spi-ipm";
|
||||
reg = <0 0x11007000 0 0x100>;
|
||||
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&topckgen CLK_TOP_MPLL_D2>,
|
||||
<&topckgen CLK_TOP_SPI_SEL>,
|
||||
<&infracfg CLK_INFRA_104M_SPI0>,
|
||||
<&infracfg CLK_INFRA_66M_SPI0_HCK>;
|
||||
clock-names = "parent-clk", "sel-clk", "spi-clk",
|
||||
"spi-hclk";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie2: pcie@11280000 {
|
||||
compatible = "mediatek,mt7988-pcie",
|
||||
"mediatek,mt7986-pcie",
|
||||
"mediatek,mt8192-pcie";
|
||||
device_type = "pci";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
reg = <0 0x11280000 0 0x2000>;
|
||||
reg-names = "pcie-mac";
|
||||
linux,pci-domain = <3>;
|
||||
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-range = <0x00 0xff>;
|
||||
ranges = <0x81000000 0x00 0x20000000 0x00
|
||||
0x20000000 0x00 0x00200000>,
|
||||
<0x82000000 0x00 0x20200000 0x00
|
||||
0x20200000 0x00 0x07e00000>;
|
||||
clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P2>,
|
||||
<&infracfg CLK_INFRA_PCIE_GFMUX_TL_P2>,
|
||||
<&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P2>,
|
||||
<&infracfg CLK_INFRA_133M_PCIE_CK_P2>;
|
||||
clock-names = "pl_250m", "tl_26m", "peri_26m",
|
||||
"top_133m";
|
||||
status = "disabled";
|
||||
|
||||
phys = <&xphyu3port0 PHY_TYPE_PCIE>;
|
||||
phy-names = "pcie-phy";
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc2 0>,
|
||||
<0 0 0 2 &pcie_intc2 1>,
|
||||
<0 0 0 3 &pcie_intc2 2>,
|
||||
<0 0 0 4 &pcie_intc2 3>;
|
||||
pcie_intc2: interrupt-controller {
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
};
|
||||
|
||||
pcie3: pcie@11290000 {
|
||||
compatible = "mediatek,mt7988-pcie",
|
||||
"mediatek,mt7986-pcie",
|
||||
"mediatek,mt8192-pcie";
|
||||
device_type = "pci";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
reg = <0 0x11290000 0 0x2000>;
|
||||
reg-names = "pcie-mac";
|
||||
linux,pci-domain = <2>;
|
||||
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-range = <0x00 0xff>;
|
||||
ranges = <0x81000000 0x00 0x28000000 0x00
|
||||
0x28000000 0x00 0x00200000>,
|
||||
<0x82000000 0x00 0x28200000 0x00
|
||||
0x28200000 0x00 0x07e00000>;
|
||||
clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P3>,
|
||||
<&infracfg CLK_INFRA_PCIE_GFMUX_TL_P3>,
|
||||
<&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P3>,
|
||||
<&infracfg CLK_INFRA_133M_PCIE_CK_P3>;
|
||||
clock-names = "pl_250m", "tl_26m", "peri_26m",
|
||||
"top_133m";
|
||||
status = "disabled";
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc3 0>,
|
||||
<0 0 0 2 &pcie_intc3 1>,
|
||||
<0 0 0 3 &pcie_intc3 2>,
|
||||
<0 0 0 4 &pcie_intc3 3>;
|
||||
pcie_intc3: interrupt-controller {
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
};
|
||||
|
||||
pcie0: pcie@11300000 {
|
||||
compatible = "mediatek,mt7988-pcie",
|
||||
"mediatek,mt7986-pcie",
|
||||
"mediatek,mt8192-pcie";
|
||||
device_type = "pci";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
reg = <0 0x11300000 0 0x2000>;
|
||||
reg-names = "pcie-mac";
|
||||
linux,pci-domain = <0>;
|
||||
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-range = <0x00 0xff>;
|
||||
ranges = <0x81000000 0x00 0x30000000 0x00
|
||||
0x30000000 0x00 0x00200000>,
|
||||
<0x82000000 0x00 0x30200000 0x00
|
||||
0x30200000 0x00 0x07e00000>;
|
||||
clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P0>,
|
||||
<&infracfg CLK_INFRA_PCIE_GFMUX_TL_P0>,
|
||||
<&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P0>,
|
||||
<&infracfg CLK_INFRA_133M_PCIE_CK_P0>;
|
||||
clock-names = "pl_250m", "tl_26m", "peri_26m",
|
||||
"top_133m";
|
||||
status = "disabled";
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
|
||||
<0 0 0 2 &pcie_intc0 1>,
|
||||
<0 0 0 3 &pcie_intc0 2>,
|
||||
<0 0 0 4 &pcie_intc0 3>;
|
||||
pcie_intc0: interrupt-controller {
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
};
|
||||
|
||||
pcie1: pcie@11310000 {
|
||||
compatible = "mediatek,mt7988-pcie",
|
||||
"mediatek,mt7986-pcie",
|
||||
"mediatek,mt8192-pcie";
|
||||
device_type = "pci";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
reg = <0 0x11310000 0 0x2000>;
|
||||
reg-names = "pcie-mac";
|
||||
linux,pci-domain = <1>;
|
||||
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-range = <0x00 0xff>;
|
||||
ranges = <0x81000000 0x00 0x38000000 0x00
|
||||
0x38000000 0x00 0x00200000>,
|
||||
<0x82000000 0x00 0x38200000 0x00
|
||||
0x38200000 0x00 0x07e00000>;
|
||||
clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P1>,
|
||||
<&infracfg CLK_INFRA_PCIE_GFMUX_TL_P1>,
|
||||
<&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P1>,
|
||||
<&infracfg CLK_INFRA_133M_PCIE_CK_P1>;
|
||||
clock-names = "pl_250m", "tl_26m", "peri_26m",
|
||||
"top_133m";
|
||||
status = "disabled";
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
|
||||
<0 0 0 2 &pcie_intc1 1>,
|
||||
<0 0 0 3 &pcie_intc1 2>,
|
||||
<0 0 0 4 &pcie_intc1 3>;
|
||||
pcie_intc1: interrupt-controller {
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
};
|
||||
|
||||
ssusb0: usb@11190000 {
|
||||
compatible = "mediatek,mt7988-xhci",
|
||||
"mediatek,mtk-xhci";
|
||||
reg = <0 0x11190000 0 0x2e00>,
|
||||
<0 0x11193e00 0 0x0100>;
|
||||
reg-names = "mac", "ippc";
|
||||
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phys = <&xphyu2port0 PHY_TYPE_USB2>,
|
||||
<&xphyu3port0 PHY_TYPE_USB3>;
|
||||
clocks = <&infracfg CLK_INFRA_USB_SYS>,
|
||||
<&infracfg CLK_INFRA_USB_XHCI>,
|
||||
<&infracfg CLK_INFRA_USB_REF>,
|
||||
<&infracfg CLK_INFRA_66M_USB_HCK>,
|
||||
<&infracfg CLK_INFRA_133M_USB_HCK>;
|
||||
clock-names = "sys_ck",
|
||||
"xhci_ck",
|
||||
"ref_ck",
|
||||
"mcu_ck",
|
||||
"dma_ck";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
mediatek,p0_speed_fixup;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssusb1: usb@11200000 {
|
||||
compatible = "mediatek,mt7988-xhci",
|
||||
"mediatek,mtk-xhci";
|
||||
reg = <0 0x11200000 0 0x2e00>,
|
||||
<0 0x11203e00 0 0x0100>;
|
||||
reg-names = "mac", "ippc";
|
||||
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phys = <&tphyu2port0 PHY_TYPE_USB2>,
|
||||
<&tphyu3port0 PHY_TYPE_USB3>;
|
||||
clocks = <&infracfg CLK_INFRA_USB_SYS_CK_P1>,
|
||||
<&infracfg CLK_INFRA_USB_XHCI_CK_P1>,
|
||||
<&infracfg CLK_INFRA_USB_CK_P1>,
|
||||
<&infracfg CLK_INFRA_66M_USB_HCK_CK_P1>,
|
||||
<&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>;
|
||||
clock-names = "sys_ck",
|
||||
"xhci_ck",
|
||||
"ref_ck",
|
||||
"mcu_ck",
|
||||
"dma_ck";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tphy: tphy@11c50000 {
|
||||
compatible = "mediatek,mt7988",
|
||||
"mediatek,generic-tphy-v2";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
tphyu2port0: usb-phy@11c50000 {
|
||||
reg = <0 0x11c50000 0 0x700>;
|
||||
clocks = <&infracfg CLK_INFRA_USB_UTMI_CK_P1>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
tphyu3port0: usb-phy@11c50700 {
|
||||
reg = <0 0x11c50700 0 0x900>;
|
||||
clocks = <&infracfg CLK_INFRA_USB_PIPE_CK_P1>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
mediatek,usb3-pll-ssc-delta;
|
||||
mediatek,usb3-pll-ssc-delta1;
|
||||
};
|
||||
};
|
||||
|
||||
topmisc: topmisc@11d10000 {
|
||||
compatible = "mediatek,mt7988-topmisc", "syscon",
|
||||
"mediatek,mt7988-power-controller";
|
||||
reg = <0 0x11d10000 0 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
xphy: xphy@11e10000 {
|
||||
compatible = "mediatek,mt7988",
|
||||
"mediatek,xsphy";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
|
||||
xphyu2port0: usb-phy@11e10000 {
|
||||
reg = <0 0x11e10000 0 0x400>;
|
||||
clocks = <&infracfg CLK_INFRA_USB_UTMI>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
xphyu3port0: usb-phy@11e13000 {
|
||||
reg = <0 0x11e13400 0 0x500>;
|
||||
clocks = <&infracfg CLK_INFRA_USB_PIPE>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
mediatek,syscon-type = <&topmisc 0x218 0>;
|
||||
};
|
||||
};
|
||||
|
||||
efuse: efuse@11f50000 {
|
||||
compatible = "mediatek,efuse";
|
||||
reg = <0 0x11f50000 0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
lvts_calibration: calib@918 {
|
||||
reg = <0x918 0x28>;
|
||||
};
|
||||
phy_calibration_p0: calib@940 {
|
||||
reg = <0x940 0x10>;
|
||||
};
|
||||
phy_calibration_p1: calib@954 {
|
||||
reg = <0x954 0x10>;
|
||||
};
|
||||
phy_calibration_p2: calib@968 {
|
||||
reg = <0x968 0x10>;
|
||||
};
|
||||
phy_calibration_p3: calib@97c {
|
||||
reg = <0x97c 0x10>;
|
||||
};
|
||||
cpufreq_calibration: calib@278 {
|
||||
reg = <0x278 0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethsys: syscon@15000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mediatek,mt7988-ethsys", "syscon";
|
||||
reg = <0 0x15000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
switch: switch@15020000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mediatek,mt7988-switch";
|
||||
reg = <0 0x15020000 0 0x8000>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
|
||||
resets = <ðrst 0>;
|
||||
};
|
||||
|
||||
ethwarp: syscon@15031000 {
|
||||
compatible = "mediatek,mt7988-ethwarp", "syscon", "simple-mfd";
|
||||
reg = <0 0x15031000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
ethrst: reset-controller {
|
||||
compatible = "ti,syscon-reset";
|
||||
#reset-cells = <1>;
|
||||
ti,reset-bits = <
|
||||
0x8 9 0x8 9 0 0 (ASSERT_SET | DEASSERT_CLEAR | STATUS_NONE)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
eth: ethernet@15100000 {
|
||||
compatible = "mediatek,mt7988-eth";
|
||||
reg = <0 0x15100000 0 0x80000>,
|
||||
<0 0x15400000 0 0x380000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <ðsys CLK_ETHDMA_XGP1_EN>,
|
||||
<ðsys CLK_ETHDMA_XGP2_EN>,
|
||||
<ðsys CLK_ETHDMA_XGP3_EN>,
|
||||
<ðsys CLK_ETHDMA_FE_EN>,
|
||||
<ðsys CLK_ETHDMA_GP2_EN>,
|
||||
<ðsys CLK_ETHDMA_GP1_EN>,
|
||||
<ðsys CLK_ETHDMA_GP3_EN>,
|
||||
<ðsys CLK_ETHDMA_ESW_EN>,
|
||||
<ðsys CLK_ETHDMA_CRYPT0_EN>,
|
||||
<&sgmiisys0 CLK_SGM0_TX_EN>,
|
||||
<&sgmiisys0 CLK_SGM0_RX_EN>,
|
||||
<&sgmiisys1 CLK_SGM1_TX_EN>,
|
||||
<&sgmiisys1 CLK_SGM1_RX_EN>,
|
||||
<ðwarp CLK_ETHWARP_WOCPU2_EN>,
|
||||
<ðwarp CLK_ETHWARP_WOCPU1_EN>,
|
||||
<ðwarp CLK_ETHWARP_WOCPU0_EN>,
|
||||
<&topckgen CLK_TOP_USXGMII_SBUS_0_SEL>,
|
||||
<&topckgen CLK_TOP_USXGMII_SBUS_1_SEL>,
|
||||
<&topckgen CLK_TOP_SGM_0_SEL>,
|
||||
<&topckgen CLK_TOP_SGM_1_SEL>,
|
||||
<&topckgen CLK_TOP_XFI_PHY_0_XTAL_SEL>,
|
||||
<&topckgen CLK_TOP_XFI_PHY_1_XTAL_SEL>,
|
||||
<&topckgen CLK_TOP_ETH_GMII_SEL>,
|
||||
<&topckgen CLK_TOP_ETH_REFCK_50M_SEL>,
|
||||
<&topckgen CLK_TOP_ETH_SYS_200M_SEL>,
|
||||
<&topckgen CLK_TOP_ETH_SYS_SEL>,
|
||||
<&topckgen CLK_TOP_ETH_XGMII_SEL>,
|
||||
<&topckgen CLK_TOP_ETH_MII_SEL>,
|
||||
<&topckgen CLK_TOP_NETSYS_SEL>,
|
||||
<&topckgen CLK_TOP_NETSYS_500M_SEL>,
|
||||
<&topckgen CLK_TOP_NETSYS_PAO_2X_SEL>,
|
||||
<&topckgen CLK_TOP_NETSYS_SYNC_250M_SEL>,
|
||||
<&topckgen CLK_TOP_NETSYS_PPEFB_250M_SEL>,
|
||||
<&topckgen CLK_TOP_NETSYS_WARP_SEL>;
|
||||
clock-names = "xgp1", "xgp2", "xgp3", "fe", "gp2", "gp1",
|
||||
"gp3", "esw", "crypto", "sgmii_tx250m",
|
||||
"sgmii_rx250m", "sgmii2_tx250m", "sgmii2_rx250m",
|
||||
"ethwarp_wocpu2", "ethwarp_wocpu1",
|
||||
"ethwarp_wocpu0", "top_usxgmii0_sel",
|
||||
"top_usxgmii1_sel", "top_sgm0_sel",
|
||||
"top_sgm1_sel", "top_xfi_phy0_xtal_sel",
|
||||
"top_xfi_phy1_xtal_sel", "top_eth_gmii_sel",
|
||||
"top_eth_refck_50m_sel", "top_eth_sys_200m_sel",
|
||||
"top_eth_sys_sel", "top_eth_xgmii_sel",
|
||||
"top_eth_mii_sel", "top_netsys_sel",
|
||||
"top_netsys_500m_sel", "top_netsys_pao_2x_sel",
|
||||
"top_netsys_sync_250m_sel",
|
||||
"top_netsys_ppefb_250m_sel",
|
||||
"top_netsys_warp_sel";
|
||||
assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>,
|
||||
<&topckgen CLK_TOP_NETSYS_GSW_SEL>,
|
||||
<&topckgen CLK_TOP_USXGMII_SBUS_0_SEL>,
|
||||
<&topckgen CLK_TOP_USXGMII_SBUS_1_SEL>,
|
||||
<&topckgen CLK_TOP_SGM_0_SEL>,
|
||||
<&topckgen CLK_TOP_SGM_1_SEL>;
|
||||
assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>,
|
||||
<&topckgen CLK_TOP_NET1PLL_D4>,
|
||||
<&topckgen CLK_TOP_NET1PLL_D8_D4>,
|
||||
<&topckgen CLK_TOP_NET1PLL_D8_D4>,
|
||||
<&apmixedsys CLK_APMIXED_SGMPLL>,
|
||||
<&apmixedsys CLK_APMIXED_SGMPLL>;
|
||||
mediatek,ethsys = <ðsys>;
|
||||
mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
|
||||
mediatek,usxgmiisys = <&usxgmiisys0>, <&usxgmiisys1>;
|
||||
mediatek,xfi_pextp = <&xfi_pextp0>, <&xfi_pextp1>;
|
||||
mediatek,xfi_pll = <&xfi_pll>;
|
||||
mediatek,infracfg = <&topmisc>;
|
||||
mediatek,toprgu = <&watchdog>;
|
||||
#reset-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,113 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2023 MediaTek Inc.
|
||||
* Author: Sam Shih <sam.shih@mediatek.com>
|
||||
* Author: Xiufeng Li <Xiufeng.Li@mediatek.com>
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include "clk-mtk.h"
|
||||
#include "clk-gate.h"
|
||||
#include "clk-mux.h"
|
||||
#include "clk-pll.h"
|
||||
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
|
||||
|
||||
#define MT7988_PLL_FMAX (2500UL * MHZ)
|
||||
#define MT7988_PCW_CHG_SHIFT 2
|
||||
|
||||
#define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, \
|
||||
_pcwbits, _pd_reg, _pd_shift, _tuner_reg, _tuner_en_reg, \
|
||||
_tuner_en_bit, _pcw_reg, _pcw_shift, _pcw_chg_reg, \
|
||||
_div_table) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .reg = _reg, .pwr_reg = _pwr_reg, \
|
||||
.en_mask = _en_mask, .flags = _flags, \
|
||||
.rst_bar_mask = BIT(_rst_bar_mask), .fmax = MT7988_PLL_FMAX, \
|
||||
.pcwbits = _pcwbits, .pd_reg = _pd_reg, \
|
||||
.pd_shift = _pd_shift, .tuner_reg = _tuner_reg, \
|
||||
.tuner_en_reg = _tuner_en_reg, .tuner_en_bit = _tuner_en_bit, \
|
||||
.pcw_reg = _pcw_reg, .pcw_shift = _pcw_shift, \
|
||||
.pcw_chg_reg = _pcw_chg_reg, \
|
||||
.pcw_chg_shift = MT7988_PCW_CHG_SHIFT, \
|
||||
.div_table = _div_table, .parent_name = "clkxtal", \
|
||||
}
|
||||
|
||||
#define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, \
|
||||
_pcwbits, _pd_reg, _pd_shift, _tuner_reg, _tuner_en_reg, \
|
||||
_tuner_en_bit, _pcw_reg, _pcw_shift, _pcw_chg_reg) \
|
||||
PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, \
|
||||
_pcwbits, _pd_reg, _pd_shift, _tuner_reg, _tuner_en_reg, \
|
||||
_tuner_en_bit, _pcw_reg, _pcw_shift, _pcw_chg_reg, NULL)
|
||||
|
||||
static const struct mtk_pll_data plls[] = {
|
||||
PLL(CLK_APMIXED_NETSYSPLL, "netsyspll", 0x0104, 0x0110, 0x00000001, 0,
|
||||
0, 32, 0x0104, 4, 0, 0, 0, 0x0108, 0, 0x0104),
|
||||
PLL(CLK_APMIXED_MPLL, "mpll", 0x0114, 0x0120, 0xff000001, HAVE_RST_BAR,
|
||||
23, 32, 0x0114, 4, 0, 0, 0, 0x0118, 0, 0x0114),
|
||||
PLL(CLK_APMIXED_MMPLL, "mmpll", 0x0124, 0x0130, 0xff000001,
|
||||
HAVE_RST_BAR, 23, 32, 0x0124, 4, 0, 0, 0, 0x0128, 0, 0x0124),
|
||||
PLL(CLK_APMIXED_APLL2, "apll2", 0x0134, 0x0140, 0x00000001, 0, 0, 32,
|
||||
0x0134, 4, 0x0704, 0x0700, 1, 0x0138, 0, 0x0134),
|
||||
PLL(CLK_APMIXED_NET1PLL, "net1pll", 0x0144, 0x0150, 0xff000001,
|
||||
HAVE_RST_BAR, 23, 32, 0x0144, 4, 0, 0, 0, 0x0148, 0, 0x0144),
|
||||
PLL(CLK_APMIXED_NET2PLL, "net2pll", 0x0154, 0x0160, 0xff000001,
|
||||
(HAVE_RST_BAR | PLL_AO), 23, 32, 0x0154, 4, 0, 0, 0, 0x0158, 0,
|
||||
0x0154),
|
||||
PLL(CLK_APMIXED_WEDMCUPLL, "wedmcupll", 0x0164, 0x0170, 0x00000001, 0,
|
||||
0, 32, 0x0164, 4, 0, 0, 0, 0x0168, 0, 0x0164),
|
||||
PLL(CLK_APMIXED_SGMPLL, "sgmpll", 0x0174, 0x0180, 0x00000001, 0, 0, 32,
|
||||
0x0174, 4, 0, 0, 0, 0x0178, 0, 0x0174),
|
||||
PLL(CLK_APMIXED_ARM_B, "arm_b", 0x0204, 0x0210, 0xff000001,
|
||||
(HAVE_RST_BAR | PLL_AO), 23, 32, 0x0204, 4, 0, 0, 0, 0x0208, 0,
|
||||
0x0204),
|
||||
PLL(CLK_APMIXED_CCIPLL2_B, "ccipll2_b", 0x0214, 0x0220, 0xff000001,
|
||||
HAVE_RST_BAR, 23, 32, 0x0214, 4, 0, 0, 0, 0x0218, 0, 0x0214),
|
||||
PLL(CLK_APMIXED_USXGMIIPLL, "usxgmiipll", 0x0304, 0x0310, 0xff000001,
|
||||
HAVE_RST_BAR, 23, 32, 0x0304, 4, 0, 0, 0, 0x0308, 0, 0x0304),
|
||||
PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0314, 0x0320, 0x00000001, 0, 0,
|
||||
32, 0x0314, 4, 0, 0, 0, 0x0318, 0, 0x0314),
|
||||
};
|
||||
|
||||
static const struct of_device_id of_match_clk_mt7988_apmixed[] = {
|
||||
{ .compatible = "mediatek,mt7988-apmixedsys", },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static int clk_mt7988_apmixed_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct clk_hw_onecell_data *clk_data;
|
||||
struct device_node *node = pdev->dev.of_node;
|
||||
int r;
|
||||
|
||||
clk_data = mtk_alloc_clk_data(ARRAY_SIZE(plls));
|
||||
if (!clk_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
|
||||
|
||||
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
||||
if (r) {
|
||||
pr_err("%s(): could not register clock provider: %d\n",
|
||||
__func__, r);
|
||||
goto free_apmixed_data;
|
||||
}
|
||||
return r;
|
||||
|
||||
free_apmixed_data:
|
||||
mtk_free_clk_data(clk_data);
|
||||
return r;
|
||||
}
|
||||
|
||||
static struct platform_driver clk_mt7988_apmixed_drv = {
|
||||
.probe = clk_mt7988_apmixed_probe,
|
||||
.driver = {
|
||||
.name = "clk-mt7988-apmixed",
|
||||
.of_match_table = of_match_clk_mt7988_apmixed,
|
||||
},
|
||||
};
|
||||
builtin_platform_driver(clk_mt7988_apmixed_drv);
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -1,141 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2023 MediaTek Inc.
|
||||
* Author: Sam Shih <sam.shih@mediatek.com>
|
||||
* Author: Xiufeng Li <Xiufeng.Li@mediatek.com>
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include "clk-mtk.h"
|
||||
#include "clk-gate.h"
|
||||
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
|
||||
|
||||
static const struct mtk_gate_regs ethdma_cg_regs = {
|
||||
.set_ofs = 0x30,
|
||||
.clr_ofs = 0x30,
|
||||
.sta_ofs = 0x30,
|
||||
};
|
||||
|
||||
#define GATE_ETHDMA(_id, _name, _parent, _shift) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = ðdma_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_no_setclr_inv, \
|
||||
}
|
||||
|
||||
static const struct mtk_gate ethdma_clks[] = {
|
||||
GATE_ETHDMA(CLK_ETHDMA_XGP1_EN, "ethdma_xgp1_en", "top_xtal", 0),
|
||||
GATE_ETHDMA(CLK_ETHDMA_XGP2_EN, "ethdma_xgp2_en", "top_xtal", 1),
|
||||
GATE_ETHDMA(CLK_ETHDMA_XGP3_EN, "ethdma_xgp3_en", "top_xtal", 2),
|
||||
GATE_ETHDMA(CLK_ETHDMA_FE_EN, "ethdma_fe_en", "netsys_2x_sel", 6),
|
||||
GATE_ETHDMA(CLK_ETHDMA_GP2_EN, "ethdma_gp2_en", "top_xtal", 7),
|
||||
GATE_ETHDMA(CLK_ETHDMA_GP1_EN, "ethdma_gp1_en", "top_xtal", 8),
|
||||
GATE_ETHDMA(CLK_ETHDMA_GP3_EN, "ethdma_gp3_en", "top_xtal", 10),
|
||||
GATE_ETHDMA(CLK_ETHDMA_ESW_EN, "ethdma_esw_en", "netsys_gsw_sel", 16),
|
||||
GATE_ETHDMA(CLK_ETHDMA_CRYPT0_EN, "ethdma_crypt0_en", "eip197_sel",
|
||||
29),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc ethdma_desc = {
|
||||
.clks = ethdma_clks,
|
||||
.num_clks = ARRAY_SIZE(ethdma_clks),
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs sgmii0_cg_regs = {
|
||||
.set_ofs = 0xe4,
|
||||
.clr_ofs = 0xe4,
|
||||
.sta_ofs = 0xe4,
|
||||
};
|
||||
|
||||
#define GATE_SGMII0(_id, _name, _parent, _shift) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &sgmii0_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_no_setclr_inv, \
|
||||
}
|
||||
|
||||
static const struct mtk_gate sgmii0_clks[] = {
|
||||
GATE_SGMII0(CLK_SGM0_TX_EN, "sgm0_tx_en", "top_xtal", 2),
|
||||
GATE_SGMII0(CLK_SGM0_RX_EN, "sgm0_rx_en", "top_xtal", 3),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc sgmii0_desc = {
|
||||
.clks = sgmii0_clks,
|
||||
.num_clks = ARRAY_SIZE(sgmii0_clks),
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs sgmii1_cg_regs = {
|
||||
.set_ofs = 0xe4,
|
||||
.clr_ofs = 0xe4,
|
||||
.sta_ofs = 0xe4,
|
||||
};
|
||||
|
||||
#define GATE_SGMII1(_id, _name, _parent, _shift) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &sgmii1_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_no_setclr_inv, \
|
||||
}
|
||||
|
||||
static const struct mtk_gate sgmii1_clks[] = {
|
||||
GATE_SGMII1(CLK_SGM1_TX_EN, "sgm1_tx_en", "top_xtal", 2),
|
||||
GATE_SGMII1(CLK_SGM1_RX_EN, "sgm1_rx_en", "top_xtal", 3),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc sgmii1_desc = {
|
||||
.clks = sgmii1_clks,
|
||||
.num_clks = ARRAY_SIZE(sgmii1_clks),
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs ethwarp_cg_regs = {
|
||||
.set_ofs = 0x14,
|
||||
.clr_ofs = 0x14,
|
||||
.sta_ofs = 0x14,
|
||||
};
|
||||
|
||||
#define GATE_ETHWARP(_id, _name, _parent, _shift) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = ðwarp_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_no_setclr_inv, \
|
||||
}
|
||||
|
||||
static const struct mtk_gate ethwarp_clks[] = {
|
||||
GATE_ETHWARP(CLK_ETHWARP_WOCPU2_EN, "ethwarp_wocpu2_en",
|
||||
"netsys_mcu_sel", 13),
|
||||
GATE_ETHWARP(CLK_ETHWARP_WOCPU1_EN, "ethwarp_wocpu1_en",
|
||||
"netsys_mcu_sel", 14),
|
||||
GATE_ETHWARP(CLK_ETHWARP_WOCPU0_EN, "ethwarp_wocpu0_en",
|
||||
"netsys_mcu_sel", 15),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc ethwarp_desc = {
|
||||
.clks = ethwarp_clks,
|
||||
.num_clks = ARRAY_SIZE(ethwarp_clks),
|
||||
};
|
||||
|
||||
static const struct of_device_id of_match_clk_mt7986_eth[] = {
|
||||
{ .compatible = "mediatek,mt7988-ethsys", .data = ðdma_desc },
|
||||
{ .compatible = "mediatek,mt7988-sgmiisys_0", .data = &sgmii0_desc },
|
||||
{ .compatible = "mediatek,mt7988-sgmiisys_1", .data = &sgmii1_desc },
|
||||
{ .compatible = "mediatek,mt7988-ethwarp", .data = ðwarp_desc },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, of_match_clk_mt7988_eth);
|
||||
|
||||
static struct platform_driver clk_mt7988_eth_drv = {
|
||||
.driver = {
|
||||
.name = "clk-mt7988-eth",
|
||||
.of_match_table = of_match_clk_mt7986_eth,
|
||||
},
|
||||
.probe = mtk_clk_simple_probe,
|
||||
.remove = mtk_clk_simple_remove,
|
||||
};
|
||||
module_platform_driver(clk_mt7988_eth_drv);
|
||||
|
||||
MODULE_DESCRIPTION("MediaTek MT7988 Ethernet clocks driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -1,369 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2023 MediaTek Inc.
|
||||
* Author: Sam Shih <sam.shih@mediatek.com>
|
||||
* Author: Xiufeng Li <Xiufeng.Li@mediatek.com>
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include "clk-mtk.h"
|
||||
#include "clk-gate.h"
|
||||
#include "clk-mux.h"
|
||||
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
|
||||
|
||||
static DEFINE_SPINLOCK(mt7988_clk_lock);
|
||||
|
||||
static const char *const infra_mux_uart0_parents[] __initconst = {
|
||||
"csw_infra_f26m_sel", "uart_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_mux_uart1_parents[] __initconst = {
|
||||
"csw_infra_f26m_sel", "uart_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_mux_uart2_parents[] __initconst = {
|
||||
"csw_infra_f26m_sel", "uart_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_mux_spi0_parents[] __initconst = { "i2c_sel",
|
||||
"spi_sel" };
|
||||
|
||||
static const char *const infra_mux_spi1_parents[] __initconst = {
|
||||
"i2c_sel", "spim_mst_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_pwm_bck_parents[] __initconst = {
|
||||
"top_rtc_32p7k", "csw_infra_f26m_sel", "sysaxi_sel", "pwm_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_pcie_gfmux_tl_ck_o_p0_parents[] __initconst = {
|
||||
"top_rtc_32p7k", "csw_infra_f26m_sel", "csw_infra_f26m_sel",
|
||||
"pextp_tl_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_pcie_gfmux_tl_ck_o_p1_parents[] __initconst = {
|
||||
"top_rtc_32p7k", "csw_infra_f26m_sel", "csw_infra_f26m_sel",
|
||||
"pextp_tl_p1_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_pcie_gfmux_tl_ck_o_p2_parents[] __initconst = {
|
||||
"top_rtc_32p7k", "csw_infra_f26m_sel", "csw_infra_f26m_sel",
|
||||
"pextp_tl_p2_sel"
|
||||
};
|
||||
|
||||
static const char *const infra_pcie_gfmux_tl_ck_o_p3_parents[] __initconst = {
|
||||
"top_rtc_32p7k", "csw_infra_f26m_sel", "csw_infra_f26m_sel",
|
||||
"pextp_tl_p3_sel"
|
||||
};
|
||||
|
||||
static const struct mtk_mux infra_muxes[] = {
|
||||
/* MODULE_CLK_SEL_0 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_UART0_SEL, "infra_mux_uart0_sel",
|
||||
infra_mux_uart0_parents, 0x0018, 0x0010, 0x0014,
|
||||
0, 1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_UART1_SEL, "infra_mux_uart1_sel",
|
||||
infra_mux_uart1_parents, 0x0018, 0x0010, 0x0014,
|
||||
1, 1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_UART2_SEL, "infra_mux_uart2_sel",
|
||||
infra_mux_uart2_parents, 0x0018, 0x0010, 0x0014,
|
||||
2, 1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_SPI0_SEL, "infra_mux_spi0_sel",
|
||||
infra_mux_spi0_parents, 0x0018, 0x0010, 0x0014, 4,
|
||||
1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_SPI1_SEL, "infra_mux_spi1_sel",
|
||||
infra_mux_spi1_parents, 0x0018, 0x0010, 0x0014, 5,
|
||||
1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_MUX_SPI2_SEL, "infra_mux_spi2_sel",
|
||||
infra_mux_spi0_parents, 0x0018, 0x0010, 0x0014, 6,
|
||||
1, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_SEL, "infra_pwm_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 14,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK1_SEL, "infra_pwm_ck1_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 16,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK2_SEL, "infra_pwm_ck2_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 18,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK3_SEL, "infra_pwm_ck3_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 20,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK4_SEL, "infra_pwm_ck4_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 22,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK5_SEL, "infra_pwm_ck5_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 24,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK6_SEL, "infra_pwm_ck6_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 26,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK7_SEL, "infra_pwm_ck7_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 28,
|
||||
2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM_CK8_SEL, "infra_pwm_ck8_sel",
|
||||
infra_pwm_bck_parents, 0x0018, 0x0010, 0x0014, 30,
|
||||
2, -1, -1, -1),
|
||||
/* MODULE_CLK_SEL_1 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PCIE_GFMUX_TL_O_P0_SEL,
|
||||
"infra_pcie_gfmux_tl_o_p0_sel",
|
||||
infra_pcie_gfmux_tl_ck_o_p0_parents, 0x0028,
|
||||
0x0020, 0x0024, 0, 2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PCIE_GFMUX_TL_O_P1_SEL,
|
||||
"infra_pcie_gfmux_tl_o_p1_sel",
|
||||
infra_pcie_gfmux_tl_ck_o_p1_parents, 0x0028,
|
||||
0x0020, 0x0024, 2, 2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PCIE_GFMUX_TL_O_P2_SEL,
|
||||
"infra_pcie_gfmux_tl_o_p2_sel",
|
||||
infra_pcie_gfmux_tl_ck_o_p2_parents, 0x0028,
|
||||
0x0020, 0x0024, 4, 2, -1, -1, -1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_INFRA_PCIE_GFMUX_TL_O_P3_SEL,
|
||||
"infra_pcie_gfmux_tl_o_p3_sel",
|
||||
infra_pcie_gfmux_tl_ck_o_p3_parents, 0x0028,
|
||||
0x0020, 0x0024, 6, 2, -1, -1, -1),
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs infra0_cg_regs = {
|
||||
.set_ofs = 0x10,
|
||||
.clr_ofs = 0x14,
|
||||
.sta_ofs = 0x18,
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs infra1_cg_regs = {
|
||||
.set_ofs = 0x40,
|
||||
.clr_ofs = 0x44,
|
||||
.sta_ofs = 0x48,
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs infra2_cg_regs = {
|
||||
.set_ofs = 0x50,
|
||||
.clr_ofs = 0x54,
|
||||
.sta_ofs = 0x58,
|
||||
};
|
||||
|
||||
static const struct mtk_gate_regs infra3_cg_regs = {
|
||||
.set_ofs = 0x60,
|
||||
.clr_ofs = 0x64,
|
||||
.sta_ofs = 0x68,
|
||||
};
|
||||
|
||||
#define GATE_INFRA0_FLAGS(_id, _name, _parent, _shift, _flags) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &infra0_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_setclr, .flags = _flags, \
|
||||
}
|
||||
|
||||
#define GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, _flags) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &infra1_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_setclr, .flags = _flags, \
|
||||
}
|
||||
|
||||
#define GATE_INFRA2_FLAGS(_id, _name, _parent, _shift, _flags) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &infra2_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_setclr, .flags = _flags, \
|
||||
}
|
||||
|
||||
#define GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, _flags) \
|
||||
{ \
|
||||
.id = _id, .name = _name, .parent_name = _parent, \
|
||||
.regs = &infra3_cg_regs, .shift = _shift, \
|
||||
.ops = &mtk_clk_gate_ops_setclr, .flags = _flags, \
|
||||
}
|
||||
|
||||
#define GATE_INFRA0(_id, _name, _parent, _shift) \
|
||||
GATE_INFRA0_FLAGS(_id, _name, _parent, _shift, 0)
|
||||
|
||||
#define GATE_INFRA1(_id, _name, _parent, _shift) \
|
||||
GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, 0)
|
||||
|
||||
#define GATE_INFRA2(_id, _name, _parent, _shift) \
|
||||
GATE_INFRA2_FLAGS(_id, _name, _parent, _shift, 0)
|
||||
|
||||
#define GATE_INFRA3(_id, _name, _parent, _shift) \
|
||||
GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, 0)
|
||||
|
||||
static const struct mtk_gate infra_clks[] = {
|
||||
/* INFRA0 */
|
||||
GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P0,
|
||||
"infra_pcie_peri_ck_26m_ck_p0", "csw_infra_f26m_sel", 7),
|
||||
GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P1,
|
||||
"infra_pcie_peri_ck_26m_ck_p1", "csw_infra_f26m_sel", 8),
|
||||
GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P2,
|
||||
"infra_pcie_peri_ck_26m_ck_p2", "csw_infra_f26m_sel", 9),
|
||||
GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P3,
|
||||
"infra_pcie_peri_ck_26m_ck_p3", "csw_infra_f26m_sel", 10),
|
||||
/* INFRA1 */
|
||||
GATE_INFRA1(CLK_INFRA_66M_GPT_BCK, "infra_hf_66m_gpt_bck",
|
||||
"sysaxi_sel", 0),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_HCK, "infra_hf_66m_pwm_hck",
|
||||
"sysaxi_sel", 1),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_BCK, "infra_hf_66m_pwm_bck",
|
||||
"infra_pwm_sel", 2),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK1, "infra_hf_66m_pwm_ck1",
|
||||
"infra_pwm_ck1_sel", 3),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK2, "infra_hf_66m_pwm_ck2",
|
||||
"infra_pwm_ck2_sel", 4),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK3, "infra_hf_66m_pwm_ck3",
|
||||
"infra_pwm_ck3_sel", 5),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK4, "infra_hf_66m_pwm_ck4",
|
||||
"infra_pwm_ck4_sel", 6),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK5, "infra_hf_66m_pwm_ck5",
|
||||
"infra_pwm_ck5_sel", 7),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK6, "infra_hf_66m_pwm_ck6",
|
||||
"infra_pwm_ck6_sel", 8),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK7, "infra_hf_66m_pwm_ck7",
|
||||
"infra_pwm_ck7_sel", 9),
|
||||
GATE_INFRA1(CLK_INFRA_66M_PWM_CK8, "infra_hf_66m_pwm_ck8",
|
||||
"infra_pwm_ck8_sel", 10),
|
||||
GATE_INFRA1(CLK_INFRA_133M_CQDMA_BCK, "infra_hf_133m_cqdma_bck",
|
||||
"sysaxi_sel", 12),
|
||||
GATE_INFRA1(CLK_INFRA_66M_AUD_SLV_BCK, "infra_66m_aud_slv_bck",
|
||||
"sysaxi_sel", 13),
|
||||
GATE_INFRA1(CLK_INFRA_AUD_26M, "infra_f_faud_26m",
|
||||
"csw_infra_f26m_sel", 14),
|
||||
GATE_INFRA1(CLK_INFRA_AUD_L, "infra_f_faud_l", "aud_l_sel", 15),
|
||||
GATE_INFRA1(CLK_INFRA_AUD_AUD, "infra_f_aud_aud", "a1sys_sel", 16),
|
||||
GATE_INFRA1(CLK_INFRA_AUD_EG2, "infra_f_faud_eg2", "a_tuner_sel", 18),
|
||||
GATE_INFRA1_FLAGS(CLK_INFRA_DRAMC_F26M, "infra_dramc_f26m",
|
||||
"csw_infra_f26m_sel", 19, CLK_IS_CRITICAL),
|
||||
// JTAG
|
||||
GATE_INFRA1_FLAGS(CLK_INFRA_133M_DBG_ACKM, "infra_hf_133m_dbg_ackm",
|
||||
"sysaxi_sel", 20, CLK_IS_CRITICAL),
|
||||
GATE_INFRA1(CLK_INFRA_66M_AP_DMA_BCK, "infra_66m_ap_dma_bck",
|
||||
"sysaxi_sel", 21),
|
||||
GATE_INFRA1(CLK_INFRA_66M_SEJ_BCK, "infra_hf_66m_sej_bck",
|
||||
"sysaxi_sel", 29),
|
||||
GATE_INFRA1(CLK_INFRA_PRE_CK_SEJ_F13M, "infra_pre_ck_sej_f13m",
|
||||
"csw_infra_f26m_sel", 30),
|
||||
/* INFRA2 */
|
||||
GATE_INFRA2(CLK_INFRA_26M_THERM_SYSTEM, "infra_hf_26m_therm_system",
|
||||
"csw_infra_f26m_sel", 0),
|
||||
GATE_INFRA2(CLK_INFRA_I2C_BCK, "infra_i2c_bck", "i2c_sel", 1),
|
||||
GATE_INFRA2(CLK_INFRA_52M_UART0_CK, "infra_f_52m_uart0",
|
||||
"infra_mux_uart0_sel", 3),
|
||||
GATE_INFRA2(CLK_INFRA_52M_UART1_CK, "infra_f_52m_uart1",
|
||||
"infra_mux_uart1_sel", 4),
|
||||
GATE_INFRA2(CLK_INFRA_52M_UART2_CK, "infra_f_52m_uart2",
|
||||
"infra_mux_uart2_sel", 5),
|
||||
GATE_INFRA2(CLK_INFRA_NFI, "infra_f_fnfi", "nfi1x_sel", 9),
|
||||
GATE_INFRA2(CLK_INFRA_SPINFI, "infra_f_fspinfi", "spinfi_sel", 10),
|
||||
GATE_INFRA2_FLAGS(CLK_INFRA_66M_NFI_HCK, "infra_hf_66m_nfi_hck",
|
||||
"sysaxi_sel", 11, CLK_IS_CRITICAL),
|
||||
GATE_INFRA2_FLAGS(CLK_INFRA_104M_SPI0, "infra_hf_104m_spi0",
|
||||
"infra_mux_spi0_sel", 12, CLK_IS_CRITICAL),
|
||||
GATE_INFRA2(CLK_INFRA_104M_SPI1, "infra_hf_104m_spi1",
|
||||
"infra_mux_spi1_sel", 13),
|
||||
GATE_INFRA2(CLK_INFRA_104M_SPI2_BCK, "infra_hf_104m_spi2_bck",
|
||||
"infra_mux_spi2_sel", 14),
|
||||
GATE_INFRA2_FLAGS(CLK_INFRA_66M_SPI0_HCK, "infra_hf_66m_spi0_hck",
|
||||
"sysaxi_sel", 15, CLK_IS_CRITICAL),
|
||||
GATE_INFRA2(CLK_INFRA_66M_SPI1_HCK, "infra_hf_66m_spi1_hck",
|
||||
"sysaxi_sel", 16),
|
||||
GATE_INFRA2(CLK_INFRA_66M_SPI2_HCK, "infra_hf_66m_spi2_hck",
|
||||
"sysaxi_sel", 17),
|
||||
GATE_INFRA2(CLK_INFRA_66M_FLASHIF_AXI, "infra_hf_66m_flashif_axi",
|
||||
"sysaxi_sel", 18),
|
||||
GATE_INFRA2(CLK_INFRA_RTC, "infra_f_frtc", "top_rtc_32k", 19),
|
||||
GATE_INFRA2(CLK_INFRA_26M_ADC_BCK, "infra_f_26m_adc_bck",
|
||||
"csw_infra_f26m_sel", 20),
|
||||
GATE_INFRA2(CLK_INFRA_RC_ADC, "infra_f_frc_adc", "infra_f_26m_adc_bck",
|
||||
21),
|
||||
GATE_INFRA2(CLK_INFRA_MSDC400, "infra_f_fmsdc400", "emmc_400m_sel",
|
||||
22),
|
||||
GATE_INFRA2(CLK_INFRA_MSDC2_HCK, "infra_f_fmsdc2_hck", "emmc_250m_sel",
|
||||
23),
|
||||
GATE_INFRA2(CLK_INFRA_133M_MSDC_0_HCK, "infra_hf_133m_msdc_0_hck",
|
||||
"sysaxi_sel", 24),
|
||||
GATE_INFRA2(CLK_INFRA_66M_MSDC_0_HCK, "infra_66m_msdc_0_hck",
|
||||
"sysaxi_sel", 25),
|
||||
GATE_INFRA2(CLK_INFRA_133M_CPUM_BCK, "infra_hf_133m_cpum_bck",
|
||||
"sysaxi_sel", 26),
|
||||
GATE_INFRA2(CLK_INFRA_BIST2FPC, "infra_hf_fbist2fpc", "nfi1x_sel", 27),
|
||||
GATE_INFRA2(CLK_INFRA_I2C_X16W_MCK_CK_P1,
|
||||
"infra_hf_i2c_x16w_mck_ck_p1", "sysaxi_sel", 29),
|
||||
GATE_INFRA2(CLK_INFRA_I2C_X16W_PCK_CK_P1,
|
||||
"infra_hf_i2c_x16w_pck_ck_p1", "sysaxi_sel", 31),
|
||||
/* INFRA3 */
|
||||
GATE_INFRA3(CLK_INFRA_133M_USB_HCK, "infra_133m_usb_hck", "sysaxi_sel",
|
||||
0),
|
||||
GATE_INFRA3(CLK_INFRA_133M_USB_HCK_CK_P1, "infra_133m_usb_hck_ck_p1",
|
||||
"sysaxi_sel", 1),
|
||||
GATE_INFRA3(CLK_INFRA_66M_USB_HCK, "infra_66m_usb_hck", "sysaxi_sel",
|
||||
2),
|
||||
GATE_INFRA3(CLK_INFRA_66M_USB_HCK_CK_P1, "infra_66m_usb_hck_ck_p1",
|
||||
"sysaxi_sel", 3),
|
||||
GATE_INFRA3(CLK_INFRA_USB_SYS, "infra_usb_sys", "usb_sys_sel", 4),
|
||||
GATE_INFRA3(CLK_INFRA_USB_SYS_CK_P1, "infra_usb_sys_ck_p1",
|
||||
"usb_sys_p1_sel", 5),
|
||||
GATE_INFRA3(CLK_INFRA_USB_REF, "infra_usb_ref", "top_xtal", 6),
|
||||
GATE_INFRA3(CLK_INFRA_USB_CK_P1, "infra_usb_ck_p1", "top_xtal", 7),
|
||||
GATE_INFRA3_FLAGS(CLK_INFRA_USB_FRMCNT, "infra_usb_frmcnt",
|
||||
"usb_frmcnt_sel", 8, CLK_IS_CRITICAL),
|
||||
GATE_INFRA3_FLAGS(CLK_INFRA_USB_FRMCNT_CK_P1, "infra_usb_frmcnt_ck_p1",
|
||||
"usb_frmcnt_p1_sel", 9, CLK_IS_CRITICAL),
|
||||
GATE_INFRA3(CLK_INFRA_USB_PIPE, "infra_usb_pipe", "sspxtp_sel", 10),
|
||||
GATE_INFRA3(CLK_INFRA_USB_PIPE_CK_P1, "infra_usb_pipe_ck_p1",
|
||||
"usb_phy_sel", 11),
|
||||
GATE_INFRA3(CLK_INFRA_USB_UTMI, "infra_usb_utmi", "top_xtal", 12),
|
||||
GATE_INFRA3(CLK_INFRA_USB_UTMI_CK_P1, "infra_usb_utmi_ck_p1",
|
||||
"top_xtal", 13),
|
||||
GATE_INFRA3(CLK_INFRA_USB_XHCI, "infra_usb_xhci", "usb_xhci_sel", 14),
|
||||
GATE_INFRA3(CLK_INFRA_USB_XHCI_CK_P1, "infra_usb_xhci_ck_p1",
|
||||
"usb_xhci_p1_sel", 15),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_GFMUX_TL_P0, "infra_pcie_gfmux_tl_ck_p0",
|
||||
"infra_pcie_gfmux_tl_o_p0_sel", 20),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_GFMUX_TL_P1, "infra_pcie_gfmux_tl_ck_p1",
|
||||
"infra_pcie_gfmux_tl_o_p1_sel", 21),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_GFMUX_TL_P2, "infra_pcie_gfmux_tl_ck_p2",
|
||||
"infra_pcie_gfmux_tl_o_p2_sel", 22),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_GFMUX_TL_P3, "infra_pcie_gfmux_tl_ck_p3",
|
||||
"infra_pcie_gfmux_tl_o_p3_sel", 23),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_PIPE_P0, "infra_pcie_pipe_ck_p0",
|
||||
"top_xtal", 24),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_PIPE_P1, "infra_pcie_pipe_ck_p1",
|
||||
"top_xtal", 25),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_PIPE_P2, "infra_pcie_pipe_ck_p2",
|
||||
"top_xtal", 26),
|
||||
GATE_INFRA3(CLK_INFRA_PCIE_PIPE_P3, "infra_pcie_pipe_ck_p3",
|
||||
"top_xtal", 27),
|
||||
GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P0, "infra_133m_pcie_ck_p0",
|
||||
"sysaxi_sel", 28),
|
||||
GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P1, "infra_133m_pcie_ck_p1",
|
||||
"sysaxi_sel", 29),
|
||||
GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P2, "infra_133m_pcie_ck_p2",
|
||||
"sysaxi_sel", 30),
|
||||
GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P3, "infra_133m_pcie_ck_p3",
|
||||
"sysaxi_sel", 31),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc infra_desc = {
|
||||
.clks = infra_clks,
|
||||
.num_clks = ARRAY_SIZE(infra_clks),
|
||||
.mux_clks = infra_muxes,
|
||||
.num_mux_clks = ARRAY_SIZE(infra_muxes),
|
||||
.clk_lock = &mt7988_clk_lock,
|
||||
};
|
||||
|
||||
static const struct of_device_id of_match_clk_mt7988_infracfg[] = {
|
||||
{ .compatible = "mediatek,mt7988-infracfg", .data = &infra_desc },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, of_match_clk_mt7988_infracfg);
|
||||
|
||||
static struct platform_driver clk_mt7988_infracfg_drv = {
|
||||
.driver = {
|
||||
.name = "clk-mt7988-infracfg",
|
||||
.of_match_table = of_match_clk_mt7988_infracfg,
|
||||
},
|
||||
.probe = mtk_clk_simple_probe,
|
||||
.remove = mtk_clk_simple_remove,
|
||||
};
|
||||
module_platform_driver(clk_mt7988_infracfg_drv);
|
||||
|
|
@ -1,446 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2023 MediaTek Inc.
|
||||
* Author: Sam Shih <sam.shih@mediatek.com>
|
||||
* Author: Xiufeng Li <Xiufeng.Li@mediatek.com>
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include "clk-mtk.h"
|
||||
#include "clk-gate.h"
|
||||
#include "clk-mux.h"
|
||||
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
|
||||
|
||||
static DEFINE_SPINLOCK(mt7988_clk_lock);
|
||||
|
||||
static const struct mtk_fixed_clk top_fixed_clks[] = {
|
||||
FIXED_CLK(CLK_TOP_XTAL, "top_xtal", "clkxtal", 40000000),
|
||||
};
|
||||
|
||||
static const struct mtk_fixed_factor top_divs[] = {
|
||||
FACTOR(CLK_TOP_XTAL_D2, "top_xtal_d2", "top_xtal", 1, 2),
|
||||
FACTOR(CLK_TOP_RTC_32K, "top_rtc_32k", "top_xtal", 1, 1250),
|
||||
FACTOR(CLK_TOP_RTC_32P7K, "top_rtc_32p7k", "top_xtal", 1, 1220),
|
||||
FACTOR(CLK_TOP_MPLL_D2, "mpll_d2", "mpll", 1, 2),
|
||||
FACTOR(CLK_TOP_MPLL_D3_D2, "mpll_d3_d2", "mpll", 1, 2),
|
||||
FACTOR(CLK_TOP_MPLL_D4, "mpll_d4", "mpll", 1, 4),
|
||||
FACTOR(CLK_TOP_MPLL_D8, "mpll_d8", "mpll", 1, 8),
|
||||
FACTOR(CLK_TOP_MPLL_D8_D2, "mpll_d8_d2", "mpll", 1, 16),
|
||||
FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
|
||||
FACTOR(CLK_TOP_MMPLL_D3_D5, "mmpll_d3_d5", "mmpll", 1, 15),
|
||||
FACTOR(CLK_TOP_MMPLL_D4, "mmpll_d4", "mmpll", 1, 4),
|
||||
FACTOR(CLK_TOP_MMPLL_D6_D2, "mmpll_d6_d2", "mmpll", 1, 12),
|
||||
FACTOR(CLK_TOP_MMPLL_D8, "mmpll_d8", "mmpll", 1, 8),
|
||||
FACTOR(CLK_TOP_APLL2_D4, "apll2_d4", "apll2", 1, 4),
|
||||
FACTOR(CLK_TOP_NET1PLL_D4, "net1pll_d4", "net1pll", 1, 4),
|
||||
FACTOR(CLK_TOP_NET1PLL_D5, "net1pll_d5", "net1pll", 1, 5),
|
||||
FACTOR(CLK_TOP_NET1PLL_D5_D2, "net1pll_d5_d2", "net1pll", 1, 10),
|
||||
FACTOR(CLK_TOP_NET1PLL_D5_D4, "net1pll_d5_d4", "net1pll", 1, 20),
|
||||
FACTOR(CLK_TOP_NET1PLL_D8, "net1pll_d8", "net1pll", 1, 8),
|
||||
FACTOR(CLK_TOP_NET1PLL_D8_D2, "net1pll_d8_d2", "net1pll", 1, 16),
|
||||
FACTOR(CLK_TOP_NET1PLL_D8_D4, "net1pll_d8_d4", "net1pll", 1, 32),
|
||||
FACTOR(CLK_TOP_NET1PLL_D8_D8, "net1pll_d8_d8", "net1pll", 1, 64),
|
||||
FACTOR(CLK_TOP_NET1PLL_D8_D16, "net1pll_d8_d16", "net1pll", 1, 128),
|
||||
FACTOR(CLK_TOP_NET2PLL_D2, "net2pll_d2", "net2pll", 1, 2),
|
||||
FACTOR(CLK_TOP_NET2PLL_D4, "net2pll_d4", "net2pll", 1, 4),
|
||||
FACTOR(CLK_TOP_NET2PLL_D4_D4, "net2pll_d4_d4", "net2pll", 1, 16),
|
||||
FACTOR(CLK_TOP_NET2PLL_D4_D8, "net2pll_d4_d8", "net2pll", 1, 32),
|
||||
FACTOR(CLK_TOP_NET2PLL_D6, "net2pll_d6", "net2pll", 1, 6),
|
||||
FACTOR(CLK_TOP_NET2PLL_D8, "net2pll_d8", "net2pll", 1, 8),
|
||||
};
|
||||
|
||||
static const char *const netsys_parents[] = { "top_xtal", "net2pll_d2",
|
||||
"mmpll_d2" };
|
||||
|
||||
static const char *const netsys_500m_parents[] = { "top_xtal", "net1pll_d5",
|
||||
"net1pll_d5_d2" };
|
||||
|
||||
static const char *const netsys_2x_parents[] = { "top_xtal", "net2pll",
|
||||
"mmpll" };
|
||||
|
||||
static const char *const netsys_gsw_parents[] = { "top_xtal", "net1pll_d4",
|
||||
"net1pll_d5" };
|
||||
|
||||
static const char *const eth_gmii_parents[] = { "top_xtal", "net1pll_d5_d4" };
|
||||
|
||||
static const char *const netsys_mcu_parents[] = { "top_xtal", "net2pll",
|
||||
"mmpll", "net1pll_d4",
|
||||
"net1pll_d5", "mpll" };
|
||||
|
||||
static const char *const eip197_parents[] = { "top_xtal", "netsyspll",
|
||||
"net2pll", "mmpll",
|
||||
"net1pll_d4", "net1pll_d5" };
|
||||
|
||||
static const char *const axi_infra_parents[] = { "top_xtal", "net1pll_d8_d2" };
|
||||
|
||||
static const char *const uart_parents[] = { "top_xtal", "mpll_d8",
|
||||
"mpll_d8_d2" };
|
||||
|
||||
static const char *const emmc_250m_parents[] = { "top_xtal", "net1pll_d5_d2",
|
||||
"mmpll_d4" };
|
||||
|
||||
static const char *const emmc_400m_parents[] = { "top_xtal", "msdcpll",
|
||||
"mmpll_d2", "mpll_d2",
|
||||
"mmpll_d4", "net1pll_d8_d2" };
|
||||
|
||||
static const char *const spi_parents[] = { "top_xtal", "mpll_d2",
|
||||
"mmpll_d4", "net1pll_d8_d2",
|
||||
"net2pll_d6", "net1pll_d5_d4",
|
||||
"mpll_d4", "net1pll_d8_d4" };
|
||||
|
||||
static const char *const nfi1x_parents[] = { "top_xtal", "mmpll_d4",
|
||||
"net1pll_d8_d2", "net2pll_d6",
|
||||
"mpll_d4", "mmpll_d8",
|
||||
"net1pll_d8_d4", "mpll_d8" };
|
||||
|
||||
static const char *const spinfi_parents[] = { "top_xtal_d2", "top_xtal",
|
||||
"net1pll_d5_d4", "mpll_d4",
|
||||
"mmpll_d8", "net1pll_d8_d4",
|
||||
"mmpll_d6_d2", "mpll_d8" };
|
||||
|
||||
static const char *const pwm_parents[] = { "top_xtal", "net1pll_d8_d2",
|
||||
"net1pll_d5_d4", "mpll_d4",
|
||||
"mpll_d8_d2", "top_rtc_32k" };
|
||||
|
||||
static const char *const i2c_parents[] = { "top_xtal", "net1pll_d5_d4",
|
||||
"mpll_d4", "net1pll_d8_d4" };
|
||||
|
||||
static const char *const pcie_mbist_250m_parents[] = { "top_xtal",
|
||||
"net1pll_d5_d2" };
|
||||
|
||||
static const char *const pextp_tl_ck_parents[] = { "top_xtal", "net2pll_d6",
|
||||
"mmpll_d8", "mpll_d8_d2",
|
||||
"top_rtc_32k" };
|
||||
|
||||
static const char *const usb_frmcnt_parents[] = { "top_xtal", "mmpll_d3_d5" };
|
||||
|
||||
static const char *const aud_parents[] = { "top_xtal", "apll2" };
|
||||
|
||||
static const char *const a1sys_parents[] = { "top_xtal", "apll2_d4" };
|
||||
|
||||
static const char *const aud_l_parents[] = { "top_xtal", "apll2",
|
||||
"mpll_d8_d2" };
|
||||
|
||||
static const char *const sspxtp_parents[] = { "top_xtal_d2", "mpll_d8_d2" };
|
||||
|
||||
static const char *const usxgmii_sbus_0_parents[] = { "top_xtal",
|
||||
"net1pll_d8_d4" };
|
||||
|
||||
static const char *const sgm_0_parents[] = { "top_xtal", "sgmpll" };
|
||||
|
||||
static const char *const sysapb_parents[] = { "top_xtal", "mpll_d3_d2" };
|
||||
|
||||
static const char *const eth_refck_50m_parents[] = { "top_xtal",
|
||||
"net2pll_d4_d4" };
|
||||
|
||||
static const char *const eth_sys_200m_parents[] = { "top_xtal", "net2pll_d4" };
|
||||
|
||||
static const char *const eth_xgmii_parents[] = { "top_xtal_d2",
|
||||
"net1pll_d8_d8",
|
||||
"net1pll_d8_d16" };
|
||||
|
||||
static const char *const bus_tops_parents[] = { "top_xtal", "net1pll_d5",
|
||||
"net2pll_d2" };
|
||||
|
||||
static const char *const npu_tops_parents[] = { "top_xtal", "net2pll" };
|
||||
|
||||
static const char *const dramc_md32_parents[] = { "top_xtal", "mpll_d2",
|
||||
"wedmcupll" };
|
||||
|
||||
static const char *const da_xtp_glb_p0_parents[] = { "top_xtal",
|
||||
"net2pll_d8" };
|
||||
|
||||
static const char *const mcusys_backup_625m_parents[] = { "top_xtal",
|
||||
"net1pll_d4" };
|
||||
|
||||
static const char *const macsec_parents[] = { "top_xtal", "sgmpll",
|
||||
"net1pll_d8" };
|
||||
|
||||
static const char *const netsys_tops_400m_parents[] = { "top_xtal",
|
||||
"net2pll_d2" };
|
||||
|
||||
static const char *const eth_mii_parents[] = { "top_xtal_d2",
|
||||
"net2pll_d4_d8" };
|
||||
|
||||
static const struct mtk_mux top_muxes[] = {
|
||||
/* CLK_CFG_0 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_SEL, "netsys_sel", netsys_parents,
|
||||
0x000, 0x004, 0x008, 0, 2, 7, 0x1c0, 0),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_500M_SEL, "netsys_500m_sel",
|
||||
netsys_500m_parents, 0x000, 0x004, 0x008, 8, 2,
|
||||
15, 0x1C0, 1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_2X_SEL, "netsys_2x_sel",
|
||||
netsys_2x_parents, 0x000, 0x004, 0x008, 16, 2, 23,
|
||||
0x1C0, 2),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_GSW_SEL, "netsys_gsw_sel",
|
||||
netsys_gsw_parents, 0x000, 0x004, 0x008, 24, 2,
|
||||
31, 0x1C0, 3),
|
||||
/* CLK_CFG_1 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_GMII_SEL, "eth_gmii_sel",
|
||||
eth_gmii_parents, 0x010, 0x014, 0x018, 0, 1, 7,
|
||||
0x1C0, 4),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_MCU_SEL, "netsys_mcu_sel",
|
||||
netsys_mcu_parents, 0x010, 0x014, 0x018, 8, 3, 15,
|
||||
0x1C0, 5),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_PAO_2X_SEL, "netsys_pao_2x_sel",
|
||||
netsys_mcu_parents, 0x010, 0x014, 0x018, 16, 3,
|
||||
23, 0x1C0, 6),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_EIP197_SEL, "eip197_sel", eip197_parents,
|
||||
0x010, 0x014, 0x018, 24, 3, 31, 0x1c0, 7),
|
||||
/* CLK_CFG_2 */
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_AXI_INFRA_SEL, "axi_infra_sel",
|
||||
axi_infra_parents, 0x020, 0x024, 0x028, 0,
|
||||
1, 7, 0x1C0, 8, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x020,
|
||||
0x024, 0x028, 8, 2, 15, 0x1c0, 9),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_EMMC_250M_SEL, "emmc_250m_sel",
|
||||
emmc_250m_parents, 0x020, 0x024, 0x028, 16, 2, 23,
|
||||
0x1C0, 10),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_EMMC_400M_SEL, "emmc_400m_sel",
|
||||
emmc_400m_parents, 0x020, 0x024, 0x028, 24, 3, 31,
|
||||
0x1C0, 11),
|
||||
/* CLK_CFG_3 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x030,
|
||||
0x034, 0x038, 0, 3, 7, 0x1c0, 12),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SPIM_MST_SEL, "spim_mst_sel", spi_parents,
|
||||
0x030, 0x034, 0x038, 8, 3, 15, 0x1c0, 13),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NFI1X_SEL, "nfi1x_sel", nfi1x_parents,
|
||||
0x030, 0x034, 0x038, 16, 3, 23, 0x1c0, 14),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SPINFI_SEL, "spinfi_sel", spinfi_parents,
|
||||
0x030, 0x034, 0x038, 24, 3, 31, 0x1c0, 15),
|
||||
/* CLK_CFG_4 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x040,
|
||||
0x044, 0x048, 0, 3, 7, 0x1c0, 16),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, 0x040,
|
||||
0x044, 0x048, 8, 2, 15, 0x1c0, 17),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PCIE_MBIST_250M_SEL,
|
||||
"pcie_mbist_250m_sel", pcie_mbist_250m_parents,
|
||||
0x040, 0x044, 0x048, 16, 1, 23, 0x1C0, 18),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_TL_SEL, "pextp_tl_sel",
|
||||
pextp_tl_ck_parents, 0x040, 0x044, 0x048, 24, 3,
|
||||
31, 0x1C0, 19),
|
||||
/* CLK_CFG_5 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_TL_P1_SEL, "pextp_tl_p1_sel",
|
||||
pextp_tl_ck_parents, 0x050, 0x054, 0x058, 0, 3, 7,
|
||||
0x1C0, 20),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_TL_P2_SEL, "pextp_tl_p2_sel",
|
||||
pextp_tl_ck_parents, 0x050, 0x054, 0x058, 8, 3,
|
||||
15, 0x1C0, 21),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_TL_P3_SEL, "pextp_tl_p3_sel",
|
||||
pextp_tl_ck_parents, 0x050, 0x054, 0x058, 16, 3,
|
||||
23, 0x1C0, 22),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_SYS_SEL, "usb_sys_sel",
|
||||
eth_gmii_parents, 0x050, 0x054, 0x058, 24, 1, 31,
|
||||
0x1C0, 23),
|
||||
/* CLK_CFG_6 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_SYS_P1_SEL, "usb_sys_p1_sel",
|
||||
eth_gmii_parents, 0x060, 0x064, 0x068, 0, 1, 7,
|
||||
0x1C0, 24),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_XHCI_SEL, "usb_xhci_sel",
|
||||
eth_gmii_parents, 0x060, 0x064, 0x068, 8, 1, 15,
|
||||
0x1C0, 25),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_XHCI_P1_SEL, "usb_xhci_p1_sel",
|
||||
eth_gmii_parents, 0x060, 0x064, 0x068, 16, 1, 23,
|
||||
0x1C0, 26),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_FRMCNT_SEL, "usb_frmcnt_sel",
|
||||
usb_frmcnt_parents, 0x060, 0x064, 0x068, 24, 1,
|
||||
31, 0x1C0, 27),
|
||||
/* CLK_CFG_7 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_FRMCNT_P1_SEL, "usb_frmcnt_p1_sel",
|
||||
usb_frmcnt_parents, 0x070, 0x074, 0x078, 0, 1, 7,
|
||||
0x1C0, 28),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_SEL, "aud_sel", aud_parents, 0x070,
|
||||
0x074, 0x078, 8, 1, 15, 0x1c0, 29),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_A1SYS_SEL, "a1sys_sel", a1sys_parents,
|
||||
0x070, 0x074, 0x078, 16, 1, 23, 0x1c0, 30),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_L_SEL, "aud_l_sel", aud_l_parents,
|
||||
0x070, 0x074, 0x078, 24, 2, 31, 0x1c4, 0),
|
||||
/* CLK_CFG_8 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_A_TUNER_SEL, "a_tuner_sel", a1sys_parents,
|
||||
0x080, 0x084, 0x088, 0, 1, 7, 0x1c4, 1),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SSPXTP_SEL, "sspxtp_sel", sspxtp_parents,
|
||||
0x080, 0x084, 0x088, 8, 1, 15, 0x1c4, 2),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_PHY_SEL, "usb_phy_sel",
|
||||
sspxtp_parents, 0x080, 0x084, 0x088, 16, 1, 23,
|
||||
0x1c4, 3),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USXGMII_SBUS_0_SEL, "usxgmii_sbus_0_sel",
|
||||
usxgmii_sbus_0_parents, 0x080, 0x084, 0x088, 24,
|
||||
1, 31, 0x1C4, 4),
|
||||
/* CLK_CFG_9 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_USXGMII_SBUS_1_SEL, "usxgmii_sbus_1_sel",
|
||||
usxgmii_sbus_0_parents, 0x090, 0x094, 0x098, 0, 1,
|
||||
7, 0x1C4, 5),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_0_SEL, "sgm_0_sel", sgm_0_parents,
|
||||
0x090, 0x094, 0x098, 8, 1, 15, 0x1c4, 6),
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SGM_SBUS_0_SEL, "sgm_sbus_0_sel",
|
||||
usxgmii_sbus_0_parents, 0x090, 0x094, 0x098,
|
||||
16, 1, 23, 0x1C4, 7, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_1_SEL, "sgm_1_sel", sgm_0_parents,
|
||||
0x090, 0x094, 0x098, 24, 1, 31, 0x1c4, 8),
|
||||
/* CLK_CFG_10 */
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SGM_SBUS_1_SEL, "sgm_sbus_1_sel",
|
||||
usxgmii_sbus_0_parents, 0x0a0, 0x0a4, 0x0a8,
|
||||
0, 1, 7, 0x1C4, 9, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_XFI_PHY_0_XTAL_SEL, "xfi_phy_0_xtal_sel",
|
||||
sspxtp_parents, 0x0a0, 0x0a4, 0x0a8, 8, 1, 15,
|
||||
0x1C4, 10),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_XFI_PHY_1_XTAL_SEL, "xfi_phy_1_xtal_sel",
|
||||
sspxtp_parents, 0x0a0, 0x0a4, 0x0a8, 16, 1, 23,
|
||||
0x1C4, 11),
|
||||
/* CLK_CFG_11 */
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SYSAXI_SEL, "sysaxi_sel",
|
||||
axi_infra_parents, 0x0a0, 0x0a4, 0x0a8, 24,
|
||||
1, 31, 0x1C4, 12, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SYSAPB_SEL, "sysapb_sel",
|
||||
sysapb_parents, 0x0b0, 0x0b4, 0x0b8, 0, 1,
|
||||
7, 0x1c4, 13, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_REFCK_50M_SEL, "eth_refck_50m_sel",
|
||||
eth_refck_50m_parents, 0x0b0, 0x0b4, 0x0b8, 8, 1,
|
||||
15, 0x1C4, 14),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_SYS_200M_SEL, "eth_sys_200m_sel",
|
||||
eth_sys_200m_parents, 0x0b0, 0x0b4, 0x0b8, 16, 1,
|
||||
23, 0x1C4, 15),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_SYS_SEL, "eth_sys_sel",
|
||||
pcie_mbist_250m_parents, 0x0b0, 0x0b4, 0x0b8, 24,
|
||||
1, 31, 0x1C4, 16),
|
||||
/* CLK_CFG_12 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_XGMII_SEL, "eth_xgmii_sel",
|
||||
eth_xgmii_parents, 0x0c0, 0x0c4, 0x0c8, 0, 2, 7,
|
||||
0x1C4, 17),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_BUS_TOPS_SEL, "bus_tops_sel",
|
||||
bus_tops_parents, 0x0c0, 0x0c4, 0x0c8, 8, 2, 15,
|
||||
0x1C4, 18),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NPU_TOPS_SEL, "npu_tops_sel",
|
||||
npu_tops_parents, 0x0c0, 0x0c4, 0x0c8, 16, 1, 23,
|
||||
0x1C4, 19),
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_DRAMC_SEL, "dramc_sel",
|
||||
sspxtp_parents, 0x0c0, 0x0c4, 0x0c8, 24, 1,
|
||||
31, 0x1C4, 20, CLK_IS_CRITICAL),
|
||||
/* CLK_CFG_13 */
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_DRAMC_MD32_SEL, "dramc_md32_sel",
|
||||
dramc_md32_parents, 0x0d0, 0x0d4, 0x0d8, 0,
|
||||
2, 7, 0x1C4, 21, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD_FLAGS(
|
||||
CLK_TOP_INFRA_F26M_SEL, "csw_infra_f26m_sel", sspxtp_parents,
|
||||
0x0d0, 0x0d4, 0x0d8, 8, 1, 15, 0x1C4, 22, CLK_IS_CRITICAL),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_P0_SEL, "pextp_p0_sel",
|
||||
sspxtp_parents, 0x0d0, 0x0d4, 0x0d8, 16, 1, 23,
|
||||
0x1C4, 23),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_P1_SEL, "pextp_p1_sel",
|
||||
sspxtp_parents, 0x0d0, 0x0d4, 0x0d8, 24, 1, 31,
|
||||
0x1C4, 24),
|
||||
/* CLK_CFG_14 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_P2_SEL, "pextp_p2_sel",
|
||||
sspxtp_parents, 0x0e0, 0x0e4, 0x0e8, 0, 1, 7,
|
||||
0x1C4, 25),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_P3_SEL, "pextp_p3_sel",
|
||||
sspxtp_parents, 0x0e0, 0x0e4, 0x0e8, 8, 1, 15,
|
||||
0x1C4, 26),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P0_SEL, "da_xtp_glb_p0_sel",
|
||||
da_xtp_glb_p0_parents, 0x0e0, 0x0e4, 0x0e8, 16, 1,
|
||||
23, 0x1C4, 27),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P1_SEL, "da_xtp_glb_p1_sel",
|
||||
da_xtp_glb_p0_parents, 0x0e0, 0x0e4, 0x0e8, 24, 1,
|
||||
31, 0x1C4, 28),
|
||||
/* CLK_CFG_15 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P2_SEL, "da_xtp_glb_p2_sel",
|
||||
da_xtp_glb_p0_parents, 0x0f0, 0x0f4, 0x0f8, 0, 1,
|
||||
7, 0x1C4, 29),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P3_SEL, "da_xtp_glb_p3_sel",
|
||||
da_xtp_glb_p0_parents, 0x0f0, 0x0f4, 0x0f8, 8, 1,
|
||||
15, 0x1C4, 30),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_CKM_SEL, "ckm_sel", sspxtp_parents, 0x0F0,
|
||||
0x0f4, 0x0f8, 16, 1, 23, 0x1c8, 0),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_SEL, "da_sel", sspxtp_parents, 0x0f0,
|
||||
0x0f4, 0x0f8, 24, 1, 31, 0x1C8, 1),
|
||||
/* CLK_CFG_16 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_SEL, "pextp_sel", sspxtp_parents,
|
||||
0x0100, 0x104, 0x108, 0, 1, 7, 0x1c8, 2),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_TOPS_P2_26M_SEL, "tops_p2_26m_sel",
|
||||
sspxtp_parents, 0x0100, 0x104, 0x108, 8, 1, 15,
|
||||
0x1C8, 3),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_MCUSYS_BACKUP_625M_SEL,
|
||||
"mcusys_backup_625m_sel",
|
||||
mcusys_backup_625m_parents, 0x0100, 0x104, 0x108,
|
||||
16, 1, 23, 0x1C8, 4),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_SYNC_250M_SEL,
|
||||
"netsys_sync_250m_sel", pcie_mbist_250m_parents,
|
||||
0x0100, 0x104, 0x108, 24, 1, 31, 0x1c8, 5),
|
||||
/* CLK_CFG_17 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_MACSEC_SEL, "macsec_sel", macsec_parents,
|
||||
0x0110, 0x114, 0x118, 0, 2, 7, 0x1c8, 6),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_TOPS_400M_SEL,
|
||||
"netsys_tops_400m_sel", netsys_tops_400m_parents,
|
||||
0x0110, 0x114, 0x118, 8, 1, 15, 0x1c8, 7),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_PPEFB_250M_SEL,
|
||||
"netsys_ppefb_250m_sel", pcie_mbist_250m_parents,
|
||||
0x0110, 0x114, 0x118, 16, 1, 23, 0x1c8, 8),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_WARP_SEL, "netsys_warp_sel",
|
||||
netsys_parents, 0x0110, 0x114, 0x118, 24, 2, 31,
|
||||
0x1C8, 9),
|
||||
/* CLK_CFG_18 */
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_MII_SEL, "eth_mii_sel",
|
||||
eth_mii_parents, 0x0120, 0x124, 0x128, 0, 1, 7,
|
||||
0x1c8, 10),
|
||||
MUX_GATE_CLR_SET_UPD(CLK_TOP_NPU_SEL, "ck_npu_sel", netsys_2x_parents,
|
||||
0x0120, 0x124, 0x128, 8, 2, 15, 0x1c8, 11),
|
||||
};
|
||||
|
||||
static const struct mtk_composite top_aud_divs[] = {
|
||||
DIV_GATE(CLK_TOP_AUD_I2S_M, "aud_i2s_m", "aud_sel", 0x0420, 0, 0x0420,
|
||||
8, 8),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc topck_desc = {
|
||||
.fixed_clks = top_fixed_clks,
|
||||
.num_fixed_clks = ARRAY_SIZE(top_fixed_clks),
|
||||
.factor_clks = top_divs,
|
||||
.num_factor_clks = ARRAY_SIZE(top_divs),
|
||||
.mux_clks = top_muxes,
|
||||
.num_mux_clks = ARRAY_SIZE(top_muxes),
|
||||
.composite_clks = top_aud_divs,
|
||||
.num_composite_clks = ARRAY_SIZE(top_aud_divs),
|
||||
.clk_lock = &mt7988_clk_lock,
|
||||
};
|
||||
|
||||
static const char *const mcu_bus_div_parents[] = { "top_xtal", "ccipll2_b",
|
||||
"net1pll_d4" };
|
||||
|
||||
static const char *const mcu_arm_div_parents[] = { "top_xtal", "arm_b",
|
||||
"net1pll_d4" };
|
||||
|
||||
static struct mtk_composite mcu_muxes[] = {
|
||||
/* bus_pll_divider_cfg */
|
||||
MUX_GATE_FLAGS(CLK_MCU_BUS_DIV_SEL, "mcu_bus_div_sel",
|
||||
mcu_bus_div_parents, 0x7C0, 9, 2, -1, CLK_IS_CRITICAL),
|
||||
/* mp2_pll_divider_cfg */
|
||||
MUX_GATE_FLAGS(CLK_MCU_ARM_DIV_SEL, "mcu_arm_div_sel",
|
||||
mcu_arm_div_parents, 0x7A8, 9, 2, -1, CLK_IS_CRITICAL),
|
||||
};
|
||||
|
||||
static const struct mtk_clk_desc mcusys_desc = {
|
||||
.composite_clks = mcu_muxes,
|
||||
.num_composite_clks = ARRAY_SIZE(mcu_muxes),
|
||||
};
|
||||
|
||||
static const struct of_device_id of_match_clk_mt7988_topckgen[] = {
|
||||
{ .compatible = "mediatek,mt7988-topckgen", .data = &topck_desc },
|
||||
{ .compatible = "mediatek,mt7988-mcusys", .data = &mcusys_desc },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, of_match_clk_mt7988_topckgen);
|
||||
|
||||
static struct platform_driver clk_mt7988_topckgen_drv = {
|
||||
.probe = mtk_clk_simple_probe,
|
||||
.remove = mtk_clk_simple_remove,
|
||||
.driver = {
|
||||
.name = "clk-mt7988-topckgen",
|
||||
.of_match_table = of_match_clk_mt7988_topckgen,
|
||||
},
|
||||
};
|
||||
module_platform_driver(clk_mt7988_topckgen_drv);
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -1,262 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/firmware.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/nvmem-consumer.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
#include <linux/phy.h>
|
||||
|
||||
#define MEDAITEK_2P5GE_PHY_DMB_FW "mediatek/mediatek-2p5ge-phy-dmb.bin"
|
||||
#define MEDIATEK_2P5GE_PHY_PMB_FW "mediatek/mediatek-2p5ge-phy-pmb.bin"
|
||||
|
||||
#define MD32_EN_CFG 0x18
|
||||
#define MD32_EN BIT(0)
|
||||
|
||||
#define BASE100T_STATUS_EXTEND 0x10
|
||||
#define BASE1000T_STATUS_EXTEND 0x11
|
||||
#define EXTEND_CTRL_AND_STATUS 0x16
|
||||
|
||||
#define PHY_AUX_CTRL_STATUS 0x1d
|
||||
#define PHY_AUX_DPX_MASK GENMASK(5, 5)
|
||||
#define PHY_AUX_SPEED_MASK GENMASK(4, 2)
|
||||
|
||||
/* Registers on MDIO_MMD_VEND1 */
|
||||
#define MTK_PHY_LINK_STATUS_MISC 0xa2
|
||||
#define MTK_PHY_FDX_ENABLE BIT(5)
|
||||
|
||||
/* Registers on MDIO_MMD_VEND2 */
|
||||
#define MTK_PHY_LED0_ON_CTRL 0x24
|
||||
#define MTK_PHY_LED0_ON_LINK1000 BIT(0)
|
||||
#define MTK_PHY_LED0_ON_LINK100 BIT(1)
|
||||
#define MTK_PHY_LED0_ON_LINK10 BIT(2)
|
||||
#define MTK_PHY_LED0_ON_LINK2500 BIT(7)
|
||||
#define MTK_PHY_LED0_POLARITY BIT(14)
|
||||
|
||||
#define MTK_PHY_LED1_ON_CTRL 0x26
|
||||
#define MTK_PHY_LED1_ON_FDX BIT(4)
|
||||
#define MTK_PHY_LED1_ON_HDX BIT(5)
|
||||
#define MTK_PHY_LED1_POLARITY BIT(14)
|
||||
|
||||
enum {
|
||||
PHY_AUX_SPD_10 = 0,
|
||||
PHY_AUX_SPD_100,
|
||||
PHY_AUX_SPD_1000,
|
||||
PHY_AUX_SPD_2500,
|
||||
};
|
||||
|
||||
static int mt798x_2p5ge_phy_config_init(struct phy_device *phydev)
|
||||
{
|
||||
int ret;
|
||||
int i;
|
||||
const struct firmware *fw;
|
||||
struct device *dev = &phydev->mdio.dev;
|
||||
struct device_node *np;
|
||||
void __iomem *dmb_addr;
|
||||
void __iomem *pmb_addr;
|
||||
void __iomem *mcucsr_base;
|
||||
u16 reg;
|
||||
struct pinctrl *pinctrl;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "mediatek,2p5gphy-fw");
|
||||
if (!np)
|
||||
return -ENOENT;
|
||||
|
||||
dmb_addr = of_iomap(np, 0);
|
||||
if (!dmb_addr)
|
||||
return -ENOMEM;
|
||||
pmb_addr = of_iomap(np, 1);
|
||||
if (!pmb_addr)
|
||||
return -ENOMEM;
|
||||
mcucsr_base = of_iomap(np, 2);
|
||||
if (!mcucsr_base)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = request_firmware(&fw, MEDAITEK_2P5GE_PHY_DMB_FW, dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to load firmware: %s, ret: %d\n",
|
||||
MEDAITEK_2P5GE_PHY_DMB_FW, ret);
|
||||
return ret;
|
||||
}
|
||||
for (i = 0; i < fw->size - 1; i += 4)
|
||||
writel(*((uint32_t *)(fw->data + i)), dmb_addr + i);
|
||||
release_firmware(fw);
|
||||
|
||||
ret = request_firmware(&fw, MEDIATEK_2P5GE_PHY_PMB_FW, dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to load firmware: %s, ret: %d\n",
|
||||
MEDIATEK_2P5GE_PHY_PMB_FW, ret);
|
||||
return ret;
|
||||
}
|
||||
for (i = 0; i < fw->size - 1; i += 4)
|
||||
writel(*((uint32_t *)(fw->data + i)), pmb_addr + i);
|
||||
release_firmware(fw);
|
||||
|
||||
reg = readw(mcucsr_base + MD32_EN_CFG);
|
||||
writew(reg | MD32_EN, mcucsr_base + MD32_EN_CFG);
|
||||
dev_dbg(dev, "Firmware loading/trigger ok.\n");
|
||||
|
||||
/* Setup LED */
|
||||
phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_ON_CTRL,
|
||||
MTK_PHY_LED0_POLARITY);
|
||||
|
||||
phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_ON_CTRL,
|
||||
MTK_PHY_LED0_ON_LINK10 |
|
||||
MTK_PHY_LED0_ON_LINK100 |
|
||||
MTK_PHY_LED0_ON_LINK1000 |
|
||||
MTK_PHY_LED0_ON_LINK2500);
|
||||
|
||||
phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED1_ON_CTRL,
|
||||
MTK_PHY_LED1_ON_FDX | MTK_PHY_LED1_ON_HDX);
|
||||
|
||||
pinctrl = devm_pinctrl_get_select(&phydev->mdio.dev, "i2p5gbe-led");
|
||||
if (IS_ERR(pinctrl)) {
|
||||
dev_err(&phydev->mdio.dev, "Fail to set LED pins!\n");
|
||||
return PTR_ERR(pinctrl);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mt798x_2p5ge_phy_config_aneg(struct phy_device *phydev)
|
||||
{
|
||||
bool changed = false;
|
||||
u32 adv;
|
||||
int ret;
|
||||
|
||||
if (phydev->autoneg == AUTONEG_DISABLE) {
|
||||
/* Configure half duplex with genphy_setup_forced,
|
||||
* because genphy_c45_pma_setup_forced does not support.
|
||||
*/
|
||||
return phydev->duplex != DUPLEX_FULL
|
||||
? genphy_setup_forced(phydev)
|
||||
: genphy_c45_pma_setup_forced(phydev);
|
||||
}
|
||||
|
||||
ret = genphy_c45_an_config_aneg(phydev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
if (ret > 0)
|
||||
changed = true;
|
||||
|
||||
adv = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
|
||||
ret = phy_modify_changed(phydev, MII_CTRL1000,
|
||||
ADVERTISE_1000FULL | ADVERTISE_1000HALF,
|
||||
adv);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
if (ret > 0)
|
||||
changed = true;
|
||||
|
||||
return genphy_c45_check_and_restart_aneg(phydev, changed);
|
||||
}
|
||||
|
||||
static int mt798x_2p5ge_phy_get_features(struct phy_device *phydev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = genphy_read_abilities(phydev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* We don't support HDX at MAC layer on mt798x.
|
||||
* So mask phy's HDX capabilities, too.
|
||||
*/
|
||||
linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
|
||||
phydev->supported);
|
||||
linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT,
|
||||
phydev->supported);
|
||||
linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
|
||||
phydev->supported);
|
||||
linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
|
||||
phydev->supported);
|
||||
linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mt798x_2p5ge_phy_read_status(struct phy_device *phydev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = genphy_update_link(phydev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
phydev->speed = SPEED_UNKNOWN;
|
||||
phydev->duplex = DUPLEX_UNKNOWN;
|
||||
phydev->pause = 0;
|
||||
phydev->asym_pause = 0;
|
||||
|
||||
if (!phydev->link)
|
||||
return 0;
|
||||
|
||||
if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
|
||||
ret = genphy_c45_read_lpa(phydev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
/* Read the link partner's 1G advertisement */
|
||||
ret = phy_read(phydev, MII_STAT1000);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, ret);
|
||||
} else if (phydev->autoneg == AUTONEG_DISABLE) {
|
||||
linkmode_zero(phydev->lp_advertising);
|
||||
}
|
||||
|
||||
ret = phy_read(phydev, PHY_AUX_CTRL_STATUS);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
switch (FIELD_GET(PHY_AUX_SPEED_MASK, ret)) {
|
||||
case PHY_AUX_SPD_10:
|
||||
phydev->speed = SPEED_10;
|
||||
break;
|
||||
case PHY_AUX_SPD_100:
|
||||
phydev->speed = SPEED_100;
|
||||
break;
|
||||
case PHY_AUX_SPD_1000:
|
||||
phydev->speed = SPEED_1000;
|
||||
break;
|
||||
case PHY_AUX_SPD_2500:
|
||||
phydev->speed = SPEED_2500;
|
||||
phydev->duplex = DUPLEX_FULL; /* 2.5G must be FDX */
|
||||
break;
|
||||
}
|
||||
|
||||
ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LINK_STATUS_MISC);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
phydev->duplex = (ret & MTK_PHY_FDX_ENABLE) ? DUPLEX_FULL : DUPLEX_HALF;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct phy_driver mtk_gephy_driver[] = {
|
||||
{
|
||||
PHY_ID_MATCH_EXACT(0x00339c11),
|
||||
.name = "MediaTek MT798x 2.5GbE PHY",
|
||||
.config_init = mt798x_2p5ge_phy_config_init,
|
||||
.config_aneg = mt798x_2p5ge_phy_config_aneg,
|
||||
.get_features = mt798x_2p5ge_phy_get_features,
|
||||
.read_status = mt798x_2p5ge_phy_read_status,
|
||||
},
|
||||
};
|
||||
|
||||
module_phy_driver(mtk_gephy_driver);
|
||||
|
||||
static struct mdio_device_id __maybe_unused mtk_2p5ge_phy_tbl[] = {
|
||||
{ PHY_ID_MATCH_VENDOR(0x00339c00) },
|
||||
{ }
|
||||
};
|
||||
|
||||
MODULE_DESCRIPTION("MediaTek 2.5Gb Ethernet PHY driver");
|
||||
MODULE_AUTHOR("SkyLake Huang <SkyLake.Huang@mediatek.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
MODULE_DEVICE_TABLE(mdio, mtk_2p5ge_phy_tbl);
|
||||
MODULE_FIRMWARE(MEDAITEK_2P5GE_PHY_DMB_FW);
|
||||
MODULE_FIRMWARE(MEDIATEK_2P5GE_PHY_PMB_FW);
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,276 +0,0 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
|
||||
/*
|
||||
* Copyright (c) 2023 MediaTek Inc.
|
||||
* Author: Sam Shih <sam.shih@mediatek.com>
|
||||
* Author: Xiufeng Li <Xiufeng.Li@mediatek.com>
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_CLK_MT7988_H
|
||||
#define _DT_BINDINGS_CLK_MT7988_H
|
||||
|
||||
/* APMIXEDSYS */
|
||||
|
||||
#define CLK_APMIXED_NETSYSPLL 0
|
||||
#define CLK_APMIXED_MPLL 1
|
||||
#define CLK_APMIXED_MMPLL 2
|
||||
#define CLK_APMIXED_APLL2 3
|
||||
#define CLK_APMIXED_NET1PLL 4
|
||||
#define CLK_APMIXED_NET2PLL 5
|
||||
#define CLK_APMIXED_WEDMCUPLL 6
|
||||
#define CLK_APMIXED_SGMPLL 7
|
||||
#define CLK_APMIXED_ARM_B 8
|
||||
#define CLK_APMIXED_CCIPLL2_B 9
|
||||
#define CLK_APMIXED_USXGMIIPLL 10
|
||||
#define CLK_APMIXED_MSDCPLL 11
|
||||
|
||||
/* TOPCKGEN */
|
||||
|
||||
#define CLK_TOP_XTAL 0
|
||||
#define CLK_TOP_XTAL_D2 1
|
||||
#define CLK_TOP_RTC_32K 2
|
||||
#define CLK_TOP_RTC_32P7K 3
|
||||
#define CLK_TOP_MPLL_D2 4
|
||||
#define CLK_TOP_MPLL_D3_D2 5
|
||||
#define CLK_TOP_MPLL_D4 6
|
||||
#define CLK_TOP_MPLL_D8 7
|
||||
#define CLK_TOP_MPLL_D8_D2 8
|
||||
#define CLK_TOP_MMPLL_D2 9
|
||||
#define CLK_TOP_MMPLL_D3_D5 10
|
||||
#define CLK_TOP_MMPLL_D4 11
|
||||
#define CLK_TOP_MMPLL_D6_D2 12
|
||||
#define CLK_TOP_MMPLL_D8 13
|
||||
#define CLK_TOP_APLL2_D4 14
|
||||
#define CLK_TOP_NET1PLL_D4 15
|
||||
#define CLK_TOP_NET1PLL_D5 16
|
||||
#define CLK_TOP_NET1PLL_D5_D2 17
|
||||
#define CLK_TOP_NET1PLL_D5_D4 18
|
||||
#define CLK_TOP_NET1PLL_D8 19
|
||||
#define CLK_TOP_NET1PLL_D8_D2 20
|
||||
#define CLK_TOP_NET1PLL_D8_D4 21
|
||||
#define CLK_TOP_NET1PLL_D8_D8 22
|
||||
#define CLK_TOP_NET1PLL_D8_D16 23
|
||||
#define CLK_TOP_NET2PLL_D2 24
|
||||
#define CLK_TOP_NET2PLL_D4 25
|
||||
#define CLK_TOP_NET2PLL_D4_D4 26
|
||||
#define CLK_TOP_NET2PLL_D4_D8 27
|
||||
#define CLK_TOP_NET2PLL_D6 28
|
||||
#define CLK_TOP_NET2PLL_D8 29
|
||||
#define CLK_TOP_NETSYS_SEL 30
|
||||
#define CLK_TOP_NETSYS_500M_SEL 31
|
||||
#define CLK_TOP_NETSYS_2X_SEL 32
|
||||
#define CLK_TOP_NETSYS_GSW_SEL 33
|
||||
#define CLK_TOP_ETH_GMII_SEL 34
|
||||
#define CLK_TOP_NETSYS_MCU_SEL 35
|
||||
#define CLK_TOP_NETSYS_PAO_2X_SEL 36
|
||||
#define CLK_TOP_EIP197_SEL 37
|
||||
#define CLK_TOP_AXI_INFRA_SEL 38
|
||||
#define CLK_TOP_UART_SEL 39
|
||||
#define CLK_TOP_EMMC_250M_SEL 40
|
||||
#define CLK_TOP_EMMC_400M_SEL 41
|
||||
#define CLK_TOP_SPI_SEL 42
|
||||
#define CLK_TOP_SPIM_MST_SEL 43
|
||||
#define CLK_TOP_NFI1X_SEL 44
|
||||
#define CLK_TOP_SPINFI_SEL 45
|
||||
#define CLK_TOP_PWM_SEL 46
|
||||
#define CLK_TOP_I2C_SEL 47
|
||||
#define CLK_TOP_PCIE_MBIST_250M_SEL 48
|
||||
#define CLK_TOP_PEXTP_TL_SEL 49
|
||||
#define CLK_TOP_PEXTP_TL_P1_SEL 50
|
||||
#define CLK_TOP_PEXTP_TL_P2_SEL 51
|
||||
#define CLK_TOP_PEXTP_TL_P3_SEL 52
|
||||
#define CLK_TOP_USB_SYS_SEL 53
|
||||
#define CLK_TOP_USB_SYS_P1_SEL 54
|
||||
#define CLK_TOP_USB_XHCI_SEL 55
|
||||
#define CLK_TOP_USB_XHCI_P1_SEL 56
|
||||
#define CLK_TOP_USB_FRMCNT_SEL 57
|
||||
#define CLK_TOP_USB_FRMCNT_P1_SEL 58
|
||||
#define CLK_TOP_AUD_SEL 59
|
||||
#define CLK_TOP_A1SYS_SEL 60
|
||||
#define CLK_TOP_AUD_L_SEL 61
|
||||
#define CLK_TOP_A_TUNER_SEL 62
|
||||
#define CLK_TOP_SSPXTP_SEL 63
|
||||
#define CLK_TOP_USB_PHY_SEL 64
|
||||
#define CLK_TOP_USXGMII_SBUS_0_SEL 65
|
||||
#define CLK_TOP_USXGMII_SBUS_1_SEL 66
|
||||
#define CLK_TOP_SGM_0_SEL 67
|
||||
#define CLK_TOP_SGM_SBUS_0_SEL 68
|
||||
#define CLK_TOP_SGM_1_SEL 69
|
||||
#define CLK_TOP_SGM_SBUS_1_SEL 70
|
||||
#define CLK_TOP_XFI_PHY_0_XTAL_SEL 71
|
||||
#define CLK_TOP_XFI_PHY_1_XTAL_SEL 72
|
||||
#define CLK_TOP_SYSAXI_SEL 73
|
||||
#define CLK_TOP_SYSAPB_SEL 74
|
||||
#define CLK_TOP_ETH_REFCK_50M_SEL 75
|
||||
#define CLK_TOP_ETH_SYS_200M_SEL 76
|
||||
#define CLK_TOP_ETH_SYS_SEL 77
|
||||
#define CLK_TOP_ETH_XGMII_SEL 78
|
||||
#define CLK_TOP_BUS_TOPS_SEL 79
|
||||
#define CLK_TOP_NPU_TOPS_SEL 80
|
||||
#define CLK_TOP_DRAMC_SEL 81
|
||||
#define CLK_TOP_DRAMC_MD32_SEL 82
|
||||
#define CLK_TOP_INFRA_F26M_SEL 83
|
||||
#define CLK_TOP_PEXTP_P0_SEL 84
|
||||
#define CLK_TOP_PEXTP_P1_SEL 85
|
||||
#define CLK_TOP_PEXTP_P2_SEL 86
|
||||
#define CLK_TOP_PEXTP_P3_SEL 87
|
||||
#define CLK_TOP_DA_XTP_GLB_P0_SEL 88
|
||||
#define CLK_TOP_DA_XTP_GLB_P1_SEL 89
|
||||
#define CLK_TOP_DA_XTP_GLB_P2_SEL 90
|
||||
#define CLK_TOP_DA_XTP_GLB_P3_SEL 91
|
||||
#define CLK_TOP_CKM_SEL 92
|
||||
#define CLK_TOP_DA_SEL 93
|
||||
#define CLK_TOP_PEXTP_SEL 94
|
||||
#define CLK_TOP_TOPS_P2_26M_SEL 95
|
||||
#define CLK_TOP_MCUSYS_BACKUP_625M_SEL 96
|
||||
#define CLK_TOP_NETSYS_SYNC_250M_SEL 97
|
||||
#define CLK_TOP_MACSEC_SEL 98
|
||||
#define CLK_TOP_NETSYS_TOPS_400M_SEL 99
|
||||
#define CLK_TOP_NETSYS_PPEFB_250M_SEL 100
|
||||
#define CLK_TOP_NETSYS_WARP_SEL 101
|
||||
#define CLK_TOP_ETH_MII_SEL 102
|
||||
#define CLK_TOP_NPU_SEL 103
|
||||
#define CLK_TOP_AUD_I2S_M 104
|
||||
|
||||
/* MCUSYS */
|
||||
|
||||
#define CLK_MCU_BUS_DIV_SEL 0
|
||||
#define CLK_MCU_ARM_DIV_SEL 1
|
||||
|
||||
/* INFRACFG_AO */
|
||||
|
||||
#define CLK_INFRA_MUX_UART0_SEL 0
|
||||
#define CLK_INFRA_MUX_UART1_SEL 1
|
||||
#define CLK_INFRA_MUX_UART2_SEL 2
|
||||
#define CLK_INFRA_MUX_SPI0_SEL 3
|
||||
#define CLK_INFRA_MUX_SPI1_SEL 4
|
||||
#define CLK_INFRA_MUX_SPI2_SEL 5
|
||||
#define CLK_INFRA_PWM_SEL 6
|
||||
#define CLK_INFRA_PWM_CK1_SEL 7
|
||||
#define CLK_INFRA_PWM_CK2_SEL 8
|
||||
#define CLK_INFRA_PWM_CK3_SEL 9
|
||||
#define CLK_INFRA_PWM_CK4_SEL 10
|
||||
#define CLK_INFRA_PWM_CK5_SEL 11
|
||||
#define CLK_INFRA_PWM_CK6_SEL 12
|
||||
#define CLK_INFRA_PWM_CK7_SEL 13
|
||||
#define CLK_INFRA_PWM_CK8_SEL 14
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_O_P0_SEL 15
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_O_P1_SEL 16
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_O_P2_SEL 17
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_O_P3_SEL 18
|
||||
|
||||
/* INFRACFG */
|
||||
|
||||
#define CLK_INFRA_PCIE_PERI_26M_CK_P0 19
|
||||
#define CLK_INFRA_PCIE_PERI_26M_CK_P1 20
|
||||
#define CLK_INFRA_PCIE_PERI_26M_CK_P2 21
|
||||
#define CLK_INFRA_PCIE_PERI_26M_CK_P3 22
|
||||
#define CLK_INFRA_66M_GPT_BCK 23
|
||||
#define CLK_INFRA_66M_PWM_HCK 24
|
||||
#define CLK_INFRA_66M_PWM_BCK 25
|
||||
#define CLK_INFRA_66M_PWM_CK1 26
|
||||
#define CLK_INFRA_66M_PWM_CK2 27
|
||||
#define CLK_INFRA_66M_PWM_CK3 28
|
||||
#define CLK_INFRA_66M_PWM_CK4 29
|
||||
#define CLK_INFRA_66M_PWM_CK5 30
|
||||
#define CLK_INFRA_66M_PWM_CK6 31
|
||||
#define CLK_INFRA_66M_PWM_CK7 32
|
||||
#define CLK_INFRA_66M_PWM_CK8 33
|
||||
#define CLK_INFRA_133M_CQDMA_BCK 34
|
||||
#define CLK_INFRA_66M_AUD_SLV_BCK 35
|
||||
#define CLK_INFRA_AUD_26M 36
|
||||
#define CLK_INFRA_AUD_L 37
|
||||
#define CLK_INFRA_AUD_AUD 38
|
||||
#define CLK_INFRA_AUD_EG2 39
|
||||
#define CLK_INFRA_DRAMC_F26M 40
|
||||
#define CLK_INFRA_133M_DBG_ACKM 41
|
||||
#define CLK_INFRA_66M_AP_DMA_BCK 42
|
||||
#define CLK_INFRA_66M_SEJ_BCK 43
|
||||
#define CLK_INFRA_PRE_CK_SEJ_F13M 44
|
||||
#define CLK_INFRA_26M_THERM_SYSTEM 45
|
||||
#define CLK_INFRA_I2C_BCK 46
|
||||
#define CLK_INFRA_52M_UART0_CK 47
|
||||
#define CLK_INFRA_52M_UART1_CK 48
|
||||
#define CLK_INFRA_52M_UART2_CK 49
|
||||
#define CLK_INFRA_NFI 50
|
||||
#define CLK_INFRA_SPINFI 51
|
||||
#define CLK_INFRA_66M_NFI_HCK 52
|
||||
#define CLK_INFRA_104M_SPI0 53
|
||||
#define CLK_INFRA_104M_SPI1 54
|
||||
#define CLK_INFRA_104M_SPI2_BCK 55
|
||||
#define CLK_INFRA_66M_SPI0_HCK 56
|
||||
#define CLK_INFRA_66M_SPI1_HCK 57
|
||||
#define CLK_INFRA_66M_SPI2_HCK 58
|
||||
#define CLK_INFRA_66M_FLASHIF_AXI 59
|
||||
#define CLK_INFRA_RTC 60
|
||||
#define CLK_INFRA_26M_ADC_BCK 61
|
||||
#define CLK_INFRA_RC_ADC 62
|
||||
#define CLK_INFRA_MSDC400 63
|
||||
#define CLK_INFRA_MSDC2_HCK 64
|
||||
#define CLK_INFRA_133M_MSDC_0_HCK 65
|
||||
#define CLK_INFRA_66M_MSDC_0_HCK 66
|
||||
#define CLK_INFRA_133M_CPUM_BCK 67
|
||||
#define CLK_INFRA_BIST2FPC 68
|
||||
#define CLK_INFRA_I2C_X16W_MCK_CK_P1 69
|
||||
#define CLK_INFRA_I2C_X16W_PCK_CK_P1 70
|
||||
#define CLK_INFRA_133M_USB_HCK 71
|
||||
#define CLK_INFRA_133M_USB_HCK_CK_P1 72
|
||||
#define CLK_INFRA_66M_USB_HCK 73
|
||||
#define CLK_INFRA_66M_USB_HCK_CK_P1 74
|
||||
#define CLK_INFRA_USB_SYS 75
|
||||
#define CLK_INFRA_USB_SYS_CK_P1 76
|
||||
#define CLK_INFRA_USB_REF 77
|
||||
#define CLK_INFRA_USB_CK_P1 78
|
||||
#define CLK_INFRA_USB_FRMCNT 79
|
||||
#define CLK_INFRA_USB_FRMCNT_CK_P1 80
|
||||
#define CLK_INFRA_USB_PIPE 81
|
||||
#define CLK_INFRA_USB_PIPE_CK_P1 82
|
||||
#define CLK_INFRA_USB_UTMI 83
|
||||
#define CLK_INFRA_USB_UTMI_CK_P1 84
|
||||
#define CLK_INFRA_USB_XHCI 85
|
||||
#define CLK_INFRA_USB_XHCI_CK_P1 86
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_P0 87
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_P1 88
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_P2 89
|
||||
#define CLK_INFRA_PCIE_GFMUX_TL_P3 90
|
||||
#define CLK_INFRA_PCIE_PIPE_P0 91
|
||||
#define CLK_INFRA_PCIE_PIPE_P1 92
|
||||
#define CLK_INFRA_PCIE_PIPE_P2 93
|
||||
#define CLK_INFRA_PCIE_PIPE_P3 94
|
||||
#define CLK_INFRA_133M_PCIE_CK_P0 95
|
||||
#define CLK_INFRA_133M_PCIE_CK_P1 96
|
||||
#define CLK_INFRA_133M_PCIE_CK_P2 97
|
||||
#define CLK_INFRA_133M_PCIE_CK_P3 98
|
||||
|
||||
/* ETHDMA */
|
||||
|
||||
#define CLK_ETHDMA_XGP1_EN 0
|
||||
#define CLK_ETHDMA_XGP2_EN 1
|
||||
#define CLK_ETHDMA_XGP3_EN 2
|
||||
#define CLK_ETHDMA_FE_EN 3
|
||||
#define CLK_ETHDMA_GP2_EN 4
|
||||
#define CLK_ETHDMA_GP1_EN 5
|
||||
#define CLK_ETHDMA_GP3_EN 6
|
||||
#define CLK_ETHDMA_ESW_EN 7
|
||||
#define CLK_ETHDMA_CRYPT0_EN 8
|
||||
#define CLK_ETHDMA_NR_CLK 9
|
||||
|
||||
/* SGMIISYS_0 */
|
||||
|
||||
#define CLK_SGM0_TX_EN 0
|
||||
#define CLK_SGM0_RX_EN 1
|
||||
#define CLK_SGMII0_NR_CLK 2
|
||||
|
||||
/* SGMIISYS_1 */
|
||||
|
||||
#define CLK_SGM1_TX_EN 0
|
||||
#define CLK_SGM1_RX_EN 1
|
||||
#define CLK_SGMII1_NR_CLK 2
|
||||
|
||||
/* ETHWARP */
|
||||
|
||||
#define CLK_ETHWARP_WOCPU2_EN 0
|
||||
#define CLK_ETHWARP_WOCPU1_EN 1
|
||||
#define CLK_ETHWARP_WOCPU0_EN 2
|
||||
#define CLK_ETHWARP_NR_CLK 3
|
||||
|
||||
#endif /* _DT_BINDINGS_CLK_MT7988_H */
|
||||
|
|
@ -1,309 +0,0 @@
|
|||
/*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/of_mdio.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/of_gpio.h>
|
||||
|
||||
|
||||
#include "./rtl8367c/include/rtk_switch.h"
|
||||
#include "./rtl8367c/include/port.h"
|
||||
#include "./rtl8367c/include/vlan.h"
|
||||
#include "./rtl8367c/include/rtl8367c_asicdrv_port.h"
|
||||
|
||||
struct rtk_gsw {
|
||||
struct device *dev;
|
||||
struct mii_bus *bus;
|
||||
int reset_pin;
|
||||
};
|
||||
|
||||
static struct rtk_gsw *_gsw;
|
||||
|
||||
extern int gsw_debug_proc_init(void);
|
||||
extern void gsw_debug_proc_exit(void);
|
||||
|
||||
#ifdef CONFIG_SWCONFIG
|
||||
extern int rtl8367s_swconfig_init( void (*reset_func)(void) );
|
||||
#endif
|
||||
|
||||
/*mii_mgr_read/mii_mgr_write is the callback API for rtl8367 driver*/
|
||||
unsigned int mii_mgr_read(unsigned int phy_addr,unsigned int phy_register,unsigned int *read_data)
|
||||
{
|
||||
struct mii_bus *bus = _gsw->bus;
|
||||
|
||||
mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
|
||||
|
||||
*read_data = bus->read(bus, phy_addr, phy_register);
|
||||
|
||||
mutex_unlock(&bus->mdio_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned int mii_mgr_write(unsigned int phy_addr,unsigned int phy_register,unsigned int write_data)
|
||||
{
|
||||
struct mii_bus *bus = _gsw->bus;
|
||||
|
||||
mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
|
||||
|
||||
bus->write(bus, phy_addr, phy_register, write_data);
|
||||
|
||||
mutex_unlock(&bus->mdio_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rtl8367s_hw_reset(void)
|
||||
{
|
||||
struct rtk_gsw *gsw = _gsw;
|
||||
|
||||
if (gsw->reset_pin < 0)
|
||||
return 0;
|
||||
|
||||
gpio_direction_output(gsw->reset_pin, 0);
|
||||
|
||||
usleep_range(1000, 1100);
|
||||
|
||||
gpio_set_value(gsw->reset_pin, 1);
|
||||
|
||||
mdelay(500);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rtl8367s_vlan_config(int want_at_p0)
|
||||
{
|
||||
rtk_vlan_cfg_t vlan1, vlan2;
|
||||
|
||||
/* Set LAN/WAN VLAN partition */
|
||||
memset(&vlan1, 0x00, sizeof(rtk_vlan_cfg_t));
|
||||
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, EXT_PORT0);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT1);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT2);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT3);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, EXT_PORT0);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT1);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT2);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT3);
|
||||
|
||||
if (want_at_p0) {
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT4);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT4);
|
||||
} else {
|
||||
RTK_PORTMASK_PORT_SET(vlan1.mbr, UTP_PORT0);
|
||||
RTK_PORTMASK_PORT_SET(vlan1.untag, UTP_PORT0);
|
||||
}
|
||||
|
||||
vlan1.ivl_en = 1;
|
||||
|
||||
rtk_vlan_set(1, &vlan1);
|
||||
|
||||
memset(&vlan2, 0x00, sizeof(rtk_vlan_cfg_t));
|
||||
|
||||
RTK_PORTMASK_PORT_SET(vlan2.mbr, EXT_PORT1);
|
||||
RTK_PORTMASK_PORT_SET(vlan2.untag, EXT_PORT1);
|
||||
|
||||
if (want_at_p0) {
|
||||
RTK_PORTMASK_PORT_SET(vlan2.mbr, UTP_PORT0);
|
||||
RTK_PORTMASK_PORT_SET(vlan2.untag, UTP_PORT0);
|
||||
} else {
|
||||
RTK_PORTMASK_PORT_SET(vlan2.mbr, UTP_PORT4);
|
||||
RTK_PORTMASK_PORT_SET(vlan2.untag, UTP_PORT4);
|
||||
}
|
||||
|
||||
vlan2.ivl_en = 1;
|
||||
rtk_vlan_set(2, &vlan2);
|
||||
|
||||
rtk_vlan_portPvid_set(EXT_PORT0, 1, 0);
|
||||
rtk_vlan_portPvid_set(UTP_PORT1, 1, 0);
|
||||
rtk_vlan_portPvid_set(UTP_PORT2, 1, 0);
|
||||
rtk_vlan_portPvid_set(UTP_PORT3, 1, 0);
|
||||
rtk_vlan_portPvid_set(EXT_PORT1, 2, 0);
|
||||
|
||||
if (want_at_p0) {
|
||||
rtk_vlan_portPvid_set(UTP_PORT0, 2, 0);
|
||||
rtk_vlan_portPvid_set(UTP_PORT4, 1, 0);
|
||||
} else {
|
||||
rtk_vlan_portPvid_set(UTP_PORT0, 1, 0);
|
||||
rtk_vlan_portPvid_set(UTP_PORT4, 2, 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rtl8367s_hw_init(void)
|
||||
{
|
||||
|
||||
rtl8367s_hw_reset();
|
||||
|
||||
if(rtk_switch_init())
|
||||
return -1;
|
||||
|
||||
mdelay(500);
|
||||
|
||||
if (rtk_vlan_reset())
|
||||
return -1;
|
||||
|
||||
if (rtk_vlan_init())
|
||||
return -1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void set_rtl8367s_sgmii(void)
|
||||
{
|
||||
rtk_port_mac_ability_t mac_cfg;
|
||||
rtk_mode_ext_t mode;
|
||||
|
||||
mode = MODE_EXT_HSGMII;
|
||||
mac_cfg.forcemode = MAC_FORCE;
|
||||
mac_cfg.speed = PORT_SPEED_2500M;
|
||||
mac_cfg.duplex = PORT_FULL_DUPLEX;
|
||||
mac_cfg.link = PORT_LINKUP;
|
||||
mac_cfg.nway = DISABLED;
|
||||
mac_cfg.txpause = ENABLED;
|
||||
mac_cfg.rxpause = ENABLED;
|
||||
rtk_port_macForceLinkExt_set(EXT_PORT0, mode, &mac_cfg);
|
||||
rtk_port_sgmiiNway_set(EXT_PORT0, DISABLED);
|
||||
rtk_port_phyEnableAll_set(ENABLED);
|
||||
|
||||
}
|
||||
|
||||
static void set_rtl8367s_rgmii(void)
|
||||
{
|
||||
rtk_port_mac_ability_t mac_cfg;
|
||||
rtk_mode_ext_t mode;
|
||||
|
||||
mode = MODE_EXT_RGMII;
|
||||
mac_cfg.forcemode = MAC_FORCE;
|
||||
mac_cfg.speed = PORT_SPEED_1000M;
|
||||
mac_cfg.duplex = PORT_FULL_DUPLEX;
|
||||
mac_cfg.link = PORT_LINKUP;
|
||||
mac_cfg.nway = DISABLED;
|
||||
mac_cfg.txpause = ENABLED;
|
||||
mac_cfg.rxpause = ENABLED;
|
||||
rtk_port_macForceLinkExt_set(EXT_PORT1, mode, &mac_cfg);
|
||||
rtk_port_rgmiiDelayExt_set(EXT_PORT1, 1, 3);
|
||||
rtk_port_phyEnableAll_set(ENABLED);
|
||||
|
||||
}
|
||||
|
||||
void init_gsw(void)
|
||||
{
|
||||
rtl8367s_hw_init();
|
||||
set_rtl8367s_sgmii();
|
||||
set_rtl8367s_rgmii();
|
||||
}
|
||||
|
||||
// bleow are platform driver
|
||||
static const struct of_device_id rtk_gsw_match[] = {
|
||||
{ .compatible = "mediatek,rtk-gsw" },
|
||||
{},
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, rtk_gsw_match);
|
||||
|
||||
static int rtk_gsw_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct device_node *mdio;
|
||||
struct mii_bus *mdio_bus;
|
||||
struct rtk_gsw *gsw;
|
||||
const char *pm;
|
||||
int ret;
|
||||
|
||||
mdio = of_parse_phandle(np, "mediatek,mdio", 0);
|
||||
|
||||
if (!mdio)
|
||||
return -EINVAL;
|
||||
|
||||
mdio_bus = of_mdio_find_bus(mdio);
|
||||
|
||||
if (!mdio_bus)
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
gsw = devm_kzalloc(&pdev->dev, sizeof(struct rtk_gsw), GFP_KERNEL);
|
||||
|
||||
if (!gsw)
|
||||
return -ENOMEM;
|
||||
|
||||
gsw->dev = &pdev->dev;
|
||||
|
||||
gsw->bus = mdio_bus;
|
||||
|
||||
gsw->reset_pin = of_get_named_gpio(np, "mediatek,reset-pin", 0);
|
||||
if (gsw->reset_pin >= 0) {
|
||||
ret = devm_gpio_request(gsw->dev, gsw->reset_pin, "mediatek,reset-pin");
|
||||
if (ret)
|
||||
printk("fail to devm_gpio_request\n");
|
||||
}
|
||||
|
||||
_gsw = gsw;
|
||||
|
||||
init_gsw();
|
||||
|
||||
//init default vlan or init swocnfig
|
||||
if(!of_property_read_string(pdev->dev.of_node,
|
||||
"mediatek,port_map", &pm)) {
|
||||
|
||||
if (!strcasecmp(pm, "wllll"))
|
||||
rtl8367s_vlan_config(1);
|
||||
else
|
||||
rtl8367s_vlan_config(0);
|
||||
|
||||
} else {
|
||||
#ifdef CONFIG_SWCONFIG
|
||||
rtl8367s_swconfig_init(&init_gsw);
|
||||
#else
|
||||
rtl8367s_vlan_config(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
gsw_debug_proc_init();
|
||||
|
||||
platform_set_drvdata(pdev, gsw);
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
static int rtk_gsw_remove(struct platform_device *pdev)
|
||||
{
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
gsw_debug_proc_exit();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver gsw_driver = {
|
||||
.probe = rtk_gsw_probe,
|
||||
.remove = rtk_gsw_remove,
|
||||
.driver = {
|
||||
.name = "rtk-gsw",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = rtk_gsw_match,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(gsw_driver);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Mark Lee <marklee0201@gmail.com>");
|
||||
MODULE_DESCRIPTION("rtl8367c switch driver for MT7622");
|
||||
|
||||
|
|
@ -1,515 +0,0 @@
|
|||
CONFIG_64BIT=y
|
||||
# CONFIG_AHCI_MTK is not set
|
||||
CONFIG_AQUANTIA_PHY=y
|
||||
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
|
||||
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
|
||||
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
|
||||
CONFIG_ARCH_FORCE_MAX_ORDER=11
|
||||
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS=18
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
# CONFIG_ARCH_NXP is not set
|
||||
CONFIG_ARCH_PROC_KCORE_TEXT=y
|
||||
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
||||
CONFIG_ARCH_STACKWALK=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_WANTS_NO_INSTR=y
|
||||
CONFIG_ARCH_WANTS_THP_SWAP=y
|
||||
CONFIG_ARM64=y
|
||||
CONFIG_ARM64_4K_PAGES=y
|
||||
# CONFIG_ARM64_CNP is not set
|
||||
# CONFIG_ARM64_ERRATUM_1742098 is not set
|
||||
# CONFIG_ARM64_ERRATUM_2051678 is not set
|
||||
# CONFIG_ARM64_ERRATUM_2054223 is not set
|
||||
# CONFIG_ARM64_ERRATUM_2067961 is not set
|
||||
# CONFIG_ARM64_ERRATUM_2077057 is not set
|
||||
# CONFIG_ARM64_ERRATUM_2441007 is not set
|
||||
# CONFIG_ARM64_ERRATUM_2441009 is not set
|
||||
# CONFIG_ARM64_ERRATUM_2658417 is not set
|
||||
CONFIG_ARM64_ERRATUM_843419=y
|
||||
CONFIG_ARM64_ERRATUM_845719=y
|
||||
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
|
||||
CONFIG_ARM64_MODULE_PLTS=y
|
||||
CONFIG_ARM64_PAGE_SHIFT=12
|
||||
CONFIG_ARM64_PA_BITS=48
|
||||
CONFIG_ARM64_PA_BITS_48=y
|
||||
# CONFIG_ARM64_SW_TTBR0_PAN is not set
|
||||
CONFIG_ARM64_TAGGED_ADDR_ABI=y
|
||||
CONFIG_ARM64_VA_BITS=39
|
||||
CONFIG_ARM64_VA_BITS_39=y
|
||||
# CONFIG_ARMV8_DEPRECATED is not set
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_GIC_V2M=y
|
||||
CONFIG_ARM_GIC_V3=y
|
||||
CONFIG_ARM_GIC_V3_ITS=y
|
||||
CONFIG_ARM_GIC_V3_ITS_PCI=y
|
||||
CONFIG_ARM_MEDIATEK_CPUFREQ=y
|
||||
CONFIG_ARM_PMU=y
|
||||
CONFIG_ARM_PSCI_FW=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BLK_PM=y
|
||||
CONFIG_BLOCK_COMPAT=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
|
||||
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_MEDIATEK=y
|
||||
CONFIG_COMMON_CLK_MT2712=y
|
||||
# CONFIG_COMMON_CLK_MT2712_BDPSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_IMGSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_JPGDECSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_MFGCFG is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_MMSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_VDECSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_VENCSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT6779 is not set
|
||||
# CONFIG_COMMON_CLK_MT6795 is not set
|
||||
# CONFIG_COMMON_CLK_MT6797 is not set
|
||||
CONFIG_COMMON_CLK_MT7622=y
|
||||
CONFIG_COMMON_CLK_MT7622_AUDSYS=y
|
||||
CONFIG_COMMON_CLK_MT7622_ETHSYS=y
|
||||
CONFIG_COMMON_CLK_MT7622_HIFSYS=y
|
||||
CONFIG_COMMON_CLK_MT7981=y
|
||||
CONFIG_COMMON_CLK_MT7981_ETHSYS=y
|
||||
# CONFIG_COMMON_CLK_MT7986 is not set
|
||||
# CONFIG_COMMON_CLK_MT7988 is not set
|
||||
# CONFIG_COMMON_CLK_MT8173 is not set
|
||||
# CONFIG_COMMON_CLK_MT8183 is not set
|
||||
# CONFIG_COMMON_CLK_MT8186 is not set
|
||||
# CONFIG_COMMON_CLK_MT8195 is not set
|
||||
# CONFIG_COMMON_CLK_MT8365 is not set
|
||||
# CONFIG_COMMON_CLK_MT8516 is not set
|
||||
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
|
||||
CONFIG_COMPAT=y
|
||||
CONFIG_COMPAT_32BIT_TIME=y
|
||||
# CONFIG_COMPAT_ALIGNMENT_FIXUPS is not set
|
||||
CONFIG_COMPAT_BINFMT_ELF=y
|
||||
CONFIG_COMPAT_NETLINK_MESSAGES=y
|
||||
CONFIG_COMPAT_OLD_SIGACTION=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
|
||||
CONFIG_CONTEXT_TRACKING=y
|
||||
CONFIG_CONTEXT_TRACKING_IDLE=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_LITTLE_ENDIAN=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_AES_ARM64=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
|
||||
CONFIG_CRYPTO_CMAC=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_CRYPTD=y
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
CONFIG_CRYPTO_DRBG=y
|
||||
CONFIG_CRYPTO_DRBG_HMAC=y
|
||||
CONFIG_CRYPTO_DRBG_MENU=y
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_ECC=y
|
||||
CONFIG_CRYPTO_ECDH=y
|
||||
CONFIG_CRYPTO_GHASH_ARM64_CE=y
|
||||
CONFIG_CRYPTO_HASH_INFO=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_JITTERENTROPY=y
|
||||
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
|
||||
CONFIG_CRYPTO_LIB_SHA1=y
|
||||
CONFIG_CRYPTO_LIB_SHA256=y
|
||||
CONFIG_CRYPTO_LIB_UTILS=y
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
# CONFIG_CRYPTO_POLYVAL_ARM64_CE is not set
|
||||
CONFIG_CRYPTO_RNG=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_RNG_DEFAULT=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA256_ARM64=y
|
||||
CONFIG_CRYPTO_SHA2_ARM64_CE=y
|
||||
CONFIG_CRYPTO_SHA512=y
|
||||
# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set
|
||||
# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set
|
||||
CONFIG_CRYPTO_ZSTD=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_MISC=y
|
||||
CONFIG_DIMLIB=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_DIRECT_REMAP=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DYNAMIC_DEBUG=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_EINT_MTK=y
|
||||
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_F2FS_FS=y
|
||||
CONFIG_FIT_PARTITION=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FWNODE_MDIO=y
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
CONFIG_FW_LOADER_SYSFS=y
|
||||
CONFIG_GCC12_NO_ARRAY_BOUNDS=y
|
||||
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_CPU_VULNERABILITIES=y
|
||||
CONFIG_GENERIC_CSUM=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_GETTIMEOFDAY=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IOREMAP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GLOB=y
|
||||
CONFIG_GPIO_CDEV=y
|
||||
CONFIG_GRO_CELLS=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
# CONFIG_HISI_PCIE_PMU is not set
|
||||
# CONFIG_HISI_PTT is not set
|
||||
# CONFIG_HNS3_PMU is not set
|
||||
# CONFIG_HP_WATCHDOG is not set
|
||||
CONFIG_HW_RANDOM=y
|
||||
# CONFIG_HW_RANDOM_CN10K is not set
|
||||
CONFIG_HW_RANDOM_MTK=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MT65XX=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
# CONFIG_IR_MTK is not set
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_JUMP_LABEL=y
|
||||
# CONFIG_KEYBOARD_MT6779 is not set
|
||||
# CONFIG_LEDS_PWM_MULTICOLOR is not set
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MDIO_DEVRES=y
|
||||
CONFIG_MEDIATEK_2P5G_PHY=y
|
||||
CONFIG_MEDIATEK_GE_PHY=y
|
||||
CONFIG_MEDIATEK_GE_SOC_PHY=y
|
||||
CONFIG_MEDIATEK_WATCHDOG=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_CQHCI=y
|
||||
CONFIG_MMC_MTK=y
|
||||
CONFIG_MODULES_TREE_LOOKUP=y
|
||||
CONFIG_MODULES_USE_ELF_RELA=y
|
||||
CONFIG_MTD_NAND_CORE=y
|
||||
CONFIG_MTD_NAND_ECC=y
|
||||
CONFIG_MTD_NAND_ECC_MEDIATEK=y
|
||||
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
|
||||
CONFIG_MTD_NAND_MTK=y
|
||||
CONFIG_MTD_NAND_MTK_BMT=y
|
||||
CONFIG_MTD_PARSER_TRX=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y
|
||||
CONFIG_MTD_SPLIT_FIRMWARE=y
|
||||
CONFIG_MTD_SPLIT_FIT_FW=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=20
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_MTD_UBI_FASTMAP=y
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
# CONFIG_MTK_CMDQ is not set
|
||||
# CONFIG_MTK_CQDMA is not set
|
||||
CONFIG_MTK_HSDMA=y
|
||||
CONFIG_MTK_INFRACFG=y
|
||||
CONFIG_MTK_PMIC_WRAP=y
|
||||
CONFIG_MTK_SCPSYS=y
|
||||
CONFIG_MTK_SCPSYS_PM_DOMAINS=y
|
||||
CONFIG_MTK_SVS=y
|
||||
CONFIG_MTK_THERMAL=y
|
||||
CONFIG_MTK_TIMER=y
|
||||
# CONFIG_MTK_UART_APDMA is not set
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_SG_DMA_LENGTH=y
|
||||
CONFIG_NET_DEVLINK=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_MT7530=y
|
||||
CONFIG_NET_DSA_MT7530_MDIO=y
|
||||
CONFIG_NET_DSA_MT7530_MMIO=y
|
||||
CONFIG_NET_DSA_TAG_MTK=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NET_MEDIATEK_SOC=y
|
||||
CONFIG_NET_MEDIATEK_SOC_USXGMII=y
|
||||
CONFIG_NET_MEDIATEK_SOC_WED=y
|
||||
CONFIG_NET_SELFTESTS=y
|
||||
CONFIG_NET_SWITCHDEV=y
|
||||
CONFIG_NET_VENDOR_MEDIATEK=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=2
|
||||
CONFIG_NVMEM=y
|
||||
# CONFIG_NVMEM_MTK_EFUSE is not set
|
||||
CONFIG_NVMEM_SYSFS=y
|
||||
# CONFIG_OCTEON_EP is not set
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_DYNAMIC=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_OVERLAY=y
|
||||
CONFIG_OF_RESOLVE=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_POOL=y
|
||||
CONFIG_PAGE_POOL_STATS=y
|
||||
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
|
||||
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
|
||||
# CONFIG_PAGE_TABLE_CHECK is not set
|
||||
CONFIG_PAHOLE_HAS_SPLIT_BTF=y
|
||||
CONFIG_PAHOLE_VERSION=124
|
||||
CONFIG_PARTITION_PERCPU=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEASPM=y
|
||||
# CONFIG_PCIEASPM_DEFAULT is not set
|
||||
CONFIG_PCIEASPM_PERFORMANCE=y
|
||||
# CONFIG_PCIEASPM_POWERSAVE is not set
|
||||
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_MEDIATEK=y
|
||||
CONFIG_PCIE_PME=y
|
||||
CONFIG_PCI_DEBUG=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
CONFIG_PGTABLE_LEVELS=3
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYLINK=y
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
# CONFIG_PHY_MTK_DP is not set
|
||||
# CONFIG_PHY_MTK_PCIE is not set
|
||||
CONFIG_PHY_MTK_TPHY=y
|
||||
# CONFIG_PHY_MTK_UFS is not set
|
||||
# CONFIG_PHY_MTK_XSPHY is not set
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_MT2712 is not set
|
||||
# CONFIG_PINCTRL_MT6765 is not set
|
||||
# CONFIG_PINCTRL_MT6795 is not set
|
||||
# CONFIG_PINCTRL_MT6797 is not set
|
||||
CONFIG_PINCTRL_MT7622=y
|
||||
CONFIG_PINCTRL_MT7981=y
|
||||
CONFIG_PINCTRL_MT7988=y
|
||||
# CONFIG_PINCTRL_MT7986 is not set
|
||||
# CONFIG_PINCTRL_MT8173 is not set
|
||||
# CONFIG_PINCTRL_MT8183 is not set
|
||||
# CONFIG_PINCTRL_MT8186 is not set
|
||||
# CONFIG_PINCTRL_MT8188 is not set
|
||||
CONFIG_PINCTRL_MT8516=y
|
||||
CONFIG_PINCTRL_MTK=y
|
||||
CONFIG_PINCTRL_MTK_MOORE=y
|
||||
CONFIG_PINCTRL_MTK_V2=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_OPP=y
|
||||
CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_SYSCON=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
# CONFIG_PREEMPT_DYNAMIC is not set
|
||||
CONFIG_PREEMPT_NONE_BUILD=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PSTORE=y
|
||||
CONFIG_PSTORE_COMPRESS=y
|
||||
CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
|
||||
CONFIG_PSTORE_CONSOLE=y
|
||||
CONFIG_PSTORE_DEFLATE_COMPRESS=y
|
||||
CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
|
||||
CONFIG_PSTORE_PMSG=y
|
||||
CONFIG_PSTORE_RAM=y
|
||||
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
|
||||
CONFIG_PWM=y
|
||||
# CONFIG_PWM_CLK is not set
|
||||
CONFIG_PWM_MEDIATEK=y
|
||||
# CONFIG_PWM_MTK_DISP is not set
|
||||
CONFIG_PWM_SYSFS=y
|
||||
# CONFIG_PWM_XILINX is not set
|
||||
CONFIG_QUEUED_RWLOCKS=y
|
||||
CONFIG_QUEUED_SPINLOCKS=y
|
||||
# CONFIG_RANDOMIZE_KSTACK_OFFSET is not set
|
||||
CONFIG_RANDSTRUCT_NONE=y
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RATIONAL=y
|
||||
# CONFIG_RAVE_SP_CORE is not set
|
||||
CONFIG_REALTEK_PHY=y
|
||||
CONFIG_REED_SOLOMON=y
|
||||
CONFIG_REED_SOLOMON_DEC8=y
|
||||
CONFIG_REED_SOLOMON_ENC8=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_MT6380=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_MT7622=y
|
||||
CONFIG_RTC_I2C_AND_SPI=y
|
||||
CONFIG_RTL8367S_GSW=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
# CONFIG_SCHED_CLUSTER is not set
|
||||
CONFIG_SCHED_MC=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_COMMON=y
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_MT6577=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=3
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=3
|
||||
CONFIG_SERIAL_DEV_BUS=y
|
||||
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SGL_ALLOC=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SOCK_RX_QUEUE_MAPPING=y
|
||||
CONFIG_SOFTIRQ_ON_OWN_STACK=y
|
||||
CONFIG_SPARSEMEM=y
|
||||
CONFIG_SPARSEMEM_EXTREME=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_DYNAMIC=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPI_MT65XX=y
|
||||
CONFIG_SPI_MTK_NOR=y
|
||||
CONFIG_SPI_MTK_SNFI=y
|
||||
CONFIG_SRCU=y
|
||||
# CONFIG_SURFACE_PLATFORMS is not set
|
||||
CONFIG_SWCONFIG=y
|
||||
CONFIG_SWIOTLB=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
CONFIG_SYSVIPC_COMPAT=y
|
||||
# CONFIG_TEST_DYNAMIC_DEBUG is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_EMULATION=y
|
||||
CONFIG_THERMAL_GOV_BANG_BANG=y
|
||||
CONFIG_THERMAL_GOV_FAIR_SHARE=y
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_GOV_USER_SPACE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THERMAL_WRITABLE_TRIPS=y
|
||||
CONFIG_THREAD_INFO_IN_TASK=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UCLAMP_TASK is not set
|
||||
# CONFIG_UNMAP_KERNEL_AT_EL0 is not set
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_VMAP_STACK=y
|
||||
# CONFIG_VMWARE_VMCI is not set
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
|
||||
CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
|
||||
# CONFIG_WATCHDOG_PRETIMEOUT_GOV_NOOP is not set
|
||||
CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
|
||||
CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m
|
||||
CONFIG_WATCHDOG_SYSFS=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XXHASH=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZONE_DMA32=y
|
||||
CONFIG_ZSTD_COMMON=y
|
||||
CONFIG_ZSTD_COMPRESS=y
|
||||
CONFIG_ZSTD_DECOMPRESS=y
|
||||
Some files were not shown because too many files have changed in this diff Show more
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Add table
Add a link
Reference in a new issue