mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
57 lines
2.2 KiB
Diff
57 lines
2.2 KiB
Diff
From 7b438d0377fbd520b475a68bdd9de1692393f22d Mon Sep 17 00:00:00 2001
|
|
From: Mengqi Zhang <mengqi.zhang@mediatek.com>
|
|
Date: Sun, 6 Nov 2022 11:39:24 +0800
|
|
Subject: [PATCH 2/6] mmc: mtk-sd: add Inline Crypto Engine clock control
|
|
|
|
Add crypto clock control and ungate it before CQHCI init.
|
|
|
|
Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.com>
|
|
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
|
Link: https://lore.kernel.org/r/20221106033924.9854-2-mengqi.zhang@mediatek.com
|
|
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
|
|
---
|
|
drivers/mmc/host/mtk-sd.c | 12 ++++++++++++
|
|
1 file changed, 12 insertions(+)
|
|
|
|
--- a/drivers/mmc/host/mtk-sd.c
|
|
+++ b/drivers/mmc/host/mtk-sd.c
|
|
@@ -452,6 +452,7 @@ struct msdc_host {
|
|
struct clk *bus_clk; /* bus clock which used to access register */
|
|
struct clk *src_clk_cg; /* msdc source clock control gate */
|
|
struct clk *sys_clk_cg; /* msdc subsys clock control gate */
|
|
+ struct clk *crypto_clk; /* msdc crypto clock control gate */
|
|
struct clk_bulk_data bulk_clks[MSDC_NR_CLOCKS];
|
|
u32 mclk; /* mmc subsystem clock frequency */
|
|
u32 src_clk_freq; /* source clock frequency */
|
|
@@ -840,6 +841,7 @@ static void msdc_set_busy_timeout(struct
|
|
static void msdc_gate_clock(struct msdc_host *host)
|
|
{
|
|
clk_bulk_disable_unprepare(MSDC_NR_CLOCKS, host->bulk_clks);
|
|
+ clk_disable_unprepare(host->crypto_clk);
|
|
clk_disable_unprepare(host->src_clk_cg);
|
|
clk_disable_unprepare(host->src_clk);
|
|
clk_disable_unprepare(host->bus_clk);
|
|
@@ -855,6 +857,7 @@ static int msdc_ungate_clock(struct msdc
|
|
clk_prepare_enable(host->bus_clk);
|
|
clk_prepare_enable(host->src_clk);
|
|
clk_prepare_enable(host->src_clk_cg);
|
|
+ clk_prepare_enable(host->crypto_clk);
|
|
ret = clk_bulk_prepare_enable(MSDC_NR_CLOCKS, host->bulk_clks);
|
|
if (ret) {
|
|
dev_err(host->dev, "Cannot enable pclk/axi/ahb clock gates\n");
|
|
@@ -2670,6 +2673,15 @@ static int msdc_drv_probe(struct platfor
|
|
goto host_free;
|
|
}
|
|
|
|
+ /* only eMMC has crypto property */
|
|
+ if (!(mmc->caps2 & MMC_CAP2_NO_MMC)) {
|
|
+ host->crypto_clk = devm_clk_get_optional(&pdev->dev, "crypto");
|
|
+ if (IS_ERR(host->crypto_clk))
|
|
+ host->crypto_clk = NULL;
|
|
+ else
|
|
+ mmc->caps2 |= MMC_CAP2_CRYPTO;
|
|
+ }
|
|
+
|
|
host->irq = platform_get_irq(pdev, 0);
|
|
if (host->irq < 0) {
|
|
ret = -EINVAL;
|