mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
103 lines
4 KiB
Diff
103 lines
4 KiB
Diff
From 5d911479e4c732729bfa798e4a9e3e5aec3e30a7 Mon Sep 17 00:00:00 2001
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From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Date: Fri, 20 Jan 2023 10:20:36 +0100
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Subject: [PATCH 04/15] clk: mediatek: clk-mux: Propagate struct device for
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mtk-mux
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Like done for other clocks, propagate struct device for mtk mux clocks
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registered through clk-mux helpers to enable runtime pm support.
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Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Tested-by: Miles Chen <miles.chen@mediatek.com>
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Link: https://lore.kernel.org/r/20230120092053.182923-7-angelogioacchino.delregno@collabora.com
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Tested-by: Mingming Su <mingming.su@mediatek.com>
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Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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[daniel@makrotopia.org: removed parts not relevant for OpenWrt]
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---
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drivers/clk/mediatek/clk-mt7986-infracfg.c | 3 ++-
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drivers/clk/mediatek/clk-mt7986-topckgen.c | 3 ++-
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drivers/clk/mediatek/clk-mux.c | 14 ++++++++------
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drivers/clk/mediatek/clk-mux.h | 3 ++-
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4 files changed, 14 insertions(+), 9 deletions(-)
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--- a/drivers/clk/mediatek/clk-mt7986-infracfg.c
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+++ b/drivers/clk/mediatek/clk-mt7986-infracfg.c
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@@ -178,7 +178,8 @@ static int clk_mt7986_infracfg_probe(str
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return -ENOMEM;
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mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data);
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- mtk_clk_register_muxes(infra_muxes, ARRAY_SIZE(infra_muxes), node,
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+ mtk_clk_register_muxes(&pdev->dev, infra_muxes,
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+ ARRAY_SIZE(infra_muxes), node,
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&mt7986_clk_lock, clk_data);
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mtk_clk_register_gates(&pdev->dev, node, infra_clks,
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ARRAY_SIZE(infra_clks), clk_data);
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--- a/drivers/clk/mediatek/clk-mt7986-topckgen.c
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+++ b/drivers/clk/mediatek/clk-mt7986-topckgen.c
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@@ -303,7 +303,8 @@ static int clk_mt7986_topckgen_probe(str
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mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
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clk_data);
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mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
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- mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), node,
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+ mtk_clk_register_muxes(&pdev->dev, top_muxes,
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+ ARRAY_SIZE(top_muxes), node,
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&mt7986_clk_lock, clk_data);
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clk_prepare_enable(clk_data->hws[CLK_TOP_SYSAXI_SEL]->clk);
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--- a/drivers/clk/mediatek/clk-mux.c
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+++ b/drivers/clk/mediatek/clk-mux.c
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@@ -154,9 +154,10 @@ const struct clk_ops mtk_mux_gate_clr_se
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};
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EXPORT_SYMBOL_GPL(mtk_mux_gate_clr_set_upd_ops);
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-static struct clk_hw *mtk_clk_register_mux(const struct mtk_mux *mux,
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- struct regmap *regmap,
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- spinlock_t *lock)
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+static struct clk_hw *mtk_clk_register_mux(struct device *dev,
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+ const struct mtk_mux *mux,
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+ struct regmap *regmap,
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+ spinlock_t *lock)
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{
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struct mtk_clk_mux *clk_mux;
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struct clk_init_data init = {};
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@@ -177,7 +178,7 @@ static struct clk_hw *mtk_clk_register_m
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clk_mux->lock = lock;
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clk_mux->hw.init = &init;
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- ret = clk_hw_register(NULL, &clk_mux->hw);
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+ ret = clk_hw_register(dev, &clk_mux->hw);
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if (ret) {
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kfree(clk_mux);
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return ERR_PTR(ret);
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@@ -198,7 +199,8 @@ static void mtk_clk_unregister_mux(struc
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kfree(mux);
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}
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-int mtk_clk_register_muxes(const struct mtk_mux *muxes,
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+int mtk_clk_register_muxes(struct device *dev,
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+ const struct mtk_mux *muxes,
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int num, struct device_node *node,
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spinlock_t *lock,
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struct clk_hw_onecell_data *clk_data)
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@@ -222,7 +224,7 @@ int mtk_clk_register_muxes(const struct
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continue;
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}
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- hw = mtk_clk_register_mux(mux, regmap, lock);
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+ hw = mtk_clk_register_mux(dev, mux, regmap, lock);
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if (IS_ERR(hw)) {
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pr_err("Failed to register clk %s: %pe\n", mux->name,
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--- a/drivers/clk/mediatek/clk-mux.h
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+++ b/drivers/clk/mediatek/clk-mux.h
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@@ -83,7 +83,8 @@ extern const struct clk_ops mtk_mux_gate
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0, _upd_ofs, _upd, CLK_SET_RATE_PARENT, \
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mtk_mux_clr_set_upd_ops)
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-int mtk_clk_register_muxes(const struct mtk_mux *muxes,
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+int mtk_clk_register_muxes(struct device *dev,
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+ const struct mtk_mux *muxes,
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int num, struct device_node *node,
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spinlock_t *lock,
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struct clk_hw_onecell_data *clk_data);
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