mirror of
https://github.com/Ysurac/openmptcprouter.git
synced 2025-03-09 15:40:20 +00:00
181 lines
7.2 KiB
Diff
181 lines
7.2 KiB
Diff
From f23375db001ec0fe9f565be75eff43adde15407e Mon Sep 17 00:00:00 2001
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From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Date: Fri, 20 Jan 2023 10:20:35 +0100
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Subject: [PATCH 03/15] clk: mediatek: clk-mtk: Propagate struct device for
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composites
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Like done for cpumux clocks, propagate struct device for composite
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clocks registered through clk-mtk helpers to be able to get runtime
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pm support for MTK clocks.
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Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Tested-by: Miles Chen <miles.chen@mediatek.com>
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Link: https://lore.kernel.org/r/20230120092053.182923-6-angelogioacchino.delregno@collabora.com
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Tested-by: Mingming Su <mingming.su@mediatek.com>
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Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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[daniel@makrotopia.org: remove parts not relevant for OpenWrt]
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---
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drivers/clk/mediatek/clk-mt2701.c | 10 ++++++----
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drivers/clk/mediatek/clk-mt2712.c | 12 ++++++++----
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drivers/clk/mediatek/clk-mt7622.c | 8 +++++---
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drivers/clk/mediatek/clk-mt7629.c | 8 +++++---
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drivers/clk/mediatek/clk-mtk.c | 11 ++++++-----
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drivers/clk/mediatek/clk-mtk.h | 3 ++-
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6 files changed, 32 insertions(+), 20 deletions(-)
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--- a/drivers/clk/mediatek/clk-mt2701.c
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+++ b/drivers/clk/mediatek/clk-mt2701.c
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@@ -677,8 +677,9 @@ static int mtk_topckgen_init(struct plat
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mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs),
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clk_data);
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- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
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- base, &mt2701_clk_lock, clk_data);
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+ mtk_clk_register_composites(&pdev->dev, top_muxes,
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+ ARRAY_SIZE(top_muxes), base,
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+ &mt2701_clk_lock, clk_data);
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mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
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base, &mt2701_clk_lock, clk_data);
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@@ -897,8 +898,9 @@ static int mtk_pericfg_init(struct platf
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mtk_clk_register_gates(&pdev->dev, node, peri_clks,
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ARRAY_SIZE(peri_clks), clk_data);
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- mtk_clk_register_composites(peri_muxs, ARRAY_SIZE(peri_muxs), base,
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- &mt2701_clk_lock, clk_data);
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+ mtk_clk_register_composites(&pdev->dev, peri_muxs,
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+ ARRAY_SIZE(peri_muxs), base,
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+ &mt2701_clk_lock, clk_data);
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r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
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if (r)
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--- a/drivers/clk/mediatek/clk-mt2712.c
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+++ b/drivers/clk/mediatek/clk-mt2712.c
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@@ -1320,8 +1320,9 @@ static int clk_mt2712_top_probe(struct p
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mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs),
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top_clk_data);
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mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
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- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
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- &mt2712_clk_lock, top_clk_data);
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+ mtk_clk_register_composites(&pdev->dev, top_muxes,
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+ ARRAY_SIZE(top_muxes), base,
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+ &mt2712_clk_lock, top_clk_data);
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mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
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&mt2712_clk_lock, top_clk_data);
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mtk_clk_register_gates(&pdev->dev, node, top_clks,
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@@ -1395,8 +1396,11 @@ static int clk_mt2712_mcu_probe(struct p
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clk_data = mtk_alloc_clk_data(CLK_MCU_NR_CLK);
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- mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), base,
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- &mt2712_clk_lock, clk_data);
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+ r = mtk_clk_register_composites(&pdev->dev, mcu_muxes,
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+ ARRAY_SIZE(mcu_muxes), base,
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+ &mt2712_clk_lock, clk_data);
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+ if (r)
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+ dev_err(&pdev->dev, "Could not register composites: %d\n", r);
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r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
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--- a/drivers/clk/mediatek/clk-mt7622.c
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+++ b/drivers/clk/mediatek/clk-mt7622.c
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@@ -615,8 +615,9 @@ static int mtk_topckgen_init(struct plat
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mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
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clk_data);
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- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
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- base, &mt7622_clk_lock, clk_data);
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+ mtk_clk_register_composites(&pdev->dev, top_muxes,
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+ ARRAY_SIZE(top_muxes), base,
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+ &mt7622_clk_lock, clk_data);
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mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
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base, &mt7622_clk_lock, clk_data);
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@@ -685,7 +686,8 @@ static int mtk_pericfg_init(struct platf
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mtk_clk_register_gates(&pdev->dev, node, peri_clks,
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ARRAY_SIZE(peri_clks), clk_data);
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- mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base,
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+ mtk_clk_register_composites(&pdev->dev, peri_muxes,
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+ ARRAY_SIZE(peri_muxes), base,
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&mt7622_clk_lock, clk_data);
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r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
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--- a/drivers/clk/mediatek/clk-mt7629.c
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+++ b/drivers/clk/mediatek/clk-mt7629.c
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@@ -564,8 +564,9 @@ static int mtk_topckgen_init(struct plat
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mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
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clk_data);
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- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
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- base, &mt7629_clk_lock, clk_data);
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+ mtk_clk_register_composites(&pdev->dev, top_muxes,
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+ ARRAY_SIZE(top_muxes), base,
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+ &mt7629_clk_lock, clk_data);
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clk_prepare_enable(clk_data->hws[CLK_TOP_AXI_SEL]->clk);
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clk_prepare_enable(clk_data->hws[CLK_TOP_MEM_SEL]->clk);
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@@ -607,7 +608,8 @@ static int mtk_pericfg_init(struct platf
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mtk_clk_register_gates(&pdev->dev, node, peri_clks,
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ARRAY_SIZE(peri_clks), clk_data);
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- mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base,
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+ mtk_clk_register_composites(&pdev->dev, peri_muxes,
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+ ARRAY_SIZE(peri_muxes), base,
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&mt7629_clk_lock, clk_data);
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r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
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--- a/drivers/clk/mediatek/clk-mtk.c
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+++ b/drivers/clk/mediatek/clk-mtk.c
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@@ -197,8 +197,8 @@ void mtk_clk_unregister_factors(const st
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}
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EXPORT_SYMBOL_GPL(mtk_clk_unregister_factors);
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-static struct clk_hw *mtk_clk_register_composite(const struct mtk_composite *mc,
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- void __iomem *base, spinlock_t *lock)
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+static struct clk_hw *mtk_clk_register_composite(struct device *dev,
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+ const struct mtk_composite *mc, void __iomem *base, spinlock_t *lock)
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{
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struct clk_hw *hw;
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struct clk_mux *mux = NULL;
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@@ -264,7 +264,7 @@ static struct clk_hw *mtk_clk_register_c
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div_ops = &clk_divider_ops;
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}
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- hw = clk_hw_register_composite(NULL, mc->name, parent_names, num_parents,
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+ hw = clk_hw_register_composite(dev, mc->name, parent_names, num_parents,
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mux_hw, mux_ops,
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div_hw, div_ops,
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gate_hw, gate_ops,
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@@ -308,7 +308,8 @@ static void mtk_clk_unregister_composite
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kfree(mux);
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}
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-int mtk_clk_register_composites(const struct mtk_composite *mcs, int num,
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+int mtk_clk_register_composites(struct device *dev,
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+ const struct mtk_composite *mcs, int num,
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void __iomem *base, spinlock_t *lock,
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struct clk_hw_onecell_data *clk_data)
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{
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@@ -327,7 +328,7 @@ int mtk_clk_register_composites(const st
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continue;
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}
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- hw = mtk_clk_register_composite(mc, base, lock);
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+ hw = mtk_clk_register_composite(dev, mc, base, lock);
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if (IS_ERR(hw)) {
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pr_err("Failed to register clk %s: %pe\n", mc->name,
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--- a/drivers/clk/mediatek/clk-mtk.h
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+++ b/drivers/clk/mediatek/clk-mtk.h
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@@ -149,7 +149,8 @@ struct mtk_composite {
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.flags = 0, \
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}
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-int mtk_clk_register_composites(const struct mtk_composite *mcs, int num,
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+int mtk_clk_register_composites(struct device *dev,
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+ const struct mtk_composite *mcs, int num,
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void __iomem *base, spinlock_t *lock,
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struct clk_hw_onecell_data *clk_data);
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void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num,
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