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			74 lines
		
	
	
	
		
			2.4 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			74 lines
		
	
	
	
		
			2.4 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From b8eb1081d267708ba976525a1fe2162901b34f3a Mon Sep 17 00:00:00 2001
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| From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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| Date: Fri, 20 Jan 2023 10:20:37 +0100
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| Subject: [PATCH] clk: mediatek: clk-mtk: Add dummy clock ops
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| 
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| In order to migrate some (few) old clock drivers to the common
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| mtk_clk_simple_probe() function, add dummy clock ops to be able
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| to insert a dummy clock with ID 0 at the beginning of the list.
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| 
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| Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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| Reviewed-by: Miles Chen <miles.chen@mediatek.com>
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| Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
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| Tested-by: Miles Chen <miles.chen@mediatek.com>
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| Link: https://lore.kernel.org/r/20230120092053.182923-8-angelogioacchino.delregno@collabora.com
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| Tested-by: Mingming Su <mingming.su@mediatek.com>
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| Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| ---
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|  drivers/clk/mediatek/clk-mtk.c | 16 ++++++++++++++++
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|  drivers/clk/mediatek/clk-mtk.h | 19 +++++++++++++++++++
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|  2 files changed, 35 insertions(+)
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| 
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| --- a/drivers/clk/mediatek/clk-mtk.c
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| +++ b/drivers/clk/mediatek/clk-mtk.c
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| @@ -18,6 +18,22 @@
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|  #include "clk-mtk.h"
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|  #include "clk-gate.h"
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|  
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| +const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };
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| +EXPORT_SYMBOL_GPL(cg_regs_dummy);
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| +
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| +static int mtk_clk_dummy_enable(struct clk_hw *hw)
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| +{
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| +	return 0;
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| +}
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| +
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| +static void mtk_clk_dummy_disable(struct clk_hw *hw) { }
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| +
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| +const struct clk_ops mtk_clk_dummy_ops = {
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| +	.enable		= mtk_clk_dummy_enable,
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| +	.disable	= mtk_clk_dummy_disable,
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| +};
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| +EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops);
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| +
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|  static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data,
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|  			      unsigned int clk_num)
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|  {
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| --- a/drivers/clk/mediatek/clk-mtk.h
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| +++ b/drivers/clk/mediatek/clk-mtk.h
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| @@ -22,6 +22,25 @@
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|  
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|  struct platform_device;
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|  
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| +/*
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| + * We need the clock IDs to start from zero but to maintain devicetree
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| + * backwards compatibility we can't change bindings to start from zero.
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| + * Only a few platforms are affected, so we solve issues given by the
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| + * commonized MTK clocks probe function(s) by adding a dummy clock at
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| + * the beginning where needed.
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| + */
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| +#define CLK_DUMMY		0
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| +
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| +extern const struct clk_ops mtk_clk_dummy_ops;
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| +extern const struct mtk_gate_regs cg_regs_dummy;
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| +
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| +#define GATE_DUMMY(_id, _name) {				\
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| +		.id = _id,					\
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| +		.name = _name,					\
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| +		.regs = &cg_regs_dummy,				\
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| +		.ops = &mtk_clk_dummy_ops,			\
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| +	}
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| +
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|  struct mtk_fixed_clk {
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|  	int id;
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|  	const char *name;
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