Remove nftset log on dnsmasq

Added glinet mt6000

.github/ISSUE_TEMPLATE/help.md

@@ -21,4 +21,4 @@ labels: help wanted
   - OpenMPTCProuter VPS provider:
   - OpenMPTCProuter platform: <!--- (RPI2/RPI3/x86/x86_64) -->
 
-<!--- (please do not attach text files) -->
+<!--- (please do not attach text files, use pastebin or paste in issue) -->

.github/ISSUE_TEMPLATE/issue.md

@@ -39,4 +39,4 @@ labels: bug
   - OpenMPTCProuter platform: <!--- (RPI2/RPI3/x86/x86_64) -->
   - Country: <!--- Some ISP have restrictions in many countries -->
 
-<!--- (please do not attach text files) -->
+<!--- (please do not attach text files, use pastebin or paste in issue) -->

5.4/include/kernel-defaults.mk

@@ -0,0 +1,202 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2006-2020 OpenWrt.org
+
+ifdef CONFIG_STRIP_KERNEL_EXPORTS
+  KERNEL_MAKEOPTS_IMAGE += \
+	EXTRA_LDSFLAGS="-I$(KERNEL_BUILD_DIR) -include symtab.h"
+endif
+
+INITRAMFS_EXTRA_FILES ?= $(GENERIC_PLATFORM_DIR)/image/initramfs-base-files.txt
+
+ifneq (,$(KERNEL_CC))
+  KERNEL_MAKEOPTS += CC="$(KERNEL_CC)"
+endif
+
+export HOST_EXTRACFLAGS=-I$(STAGING_DIR_HOST)/include
+
+# defined in quilt.mk
+Kernel/Patch:=$(Kernel/Patch/Default)
+
+ifneq (,$(findstring .xz,$(LINUX_SOURCE)))
+  LINUX_CAT:=xzcat
+else
+  LINUX_CAT:=gzip -dc
+endif
+
+ifeq ($(strip $(CONFIG_EXTERNAL_KERNEL_TREE)),"")
+  ifeq ($(strip $(CONFIG_KERNEL_GIT_CLONE_URI)),"")
+    define Kernel/Prepare/Default
+	$(LINUX_CAT) $(DL_DIR)/$(LINUX_SOURCE) | $(TAR) -C $(KERNEL_BUILD_DIR) $(TAR_OPTIONS)
+	$(Kernel/Patch)
+	$(if $(QUILT),touch $(LINUX_DIR)/.quilt_used)
+    endef
+  else
+    define Kernel/Prepare/Default
+	$(LINUX_CAT) $(DL_DIR)/$(LINUX_SOURCE) | $(TAR) -C $(KERNEL_BUILD_DIR) $(TAR_OPTIONS)
+    endef
+  endif
+else
+  define Kernel/Prepare/Default
+	mkdir -p $(KERNEL_BUILD_DIR)
+	if [ -d $(LINUX_DIR) ]; then \
+		rmdir $(LINUX_DIR); \
+	fi
+	ln -s $(CONFIG_EXTERNAL_KERNEL_TREE) $(LINUX_DIR)
+	if [ -d $(LINUX_DIR)/user_headers ]; then \
+		rm -rf $(LINUX_DIR)/user_headers; \
+	fi
+  endef
+endif
+
+ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y)
+  ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS_SEPARATE),y)
+    define Kernel/SetInitramfs/PreConfigure
+	grep -v -e CONFIG_BLK_DEV_INITRD $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config
+	echo 'CONFIG_BLK_DEV_INITRD=y' >> $(LINUX_DIR)/.config
+	echo 'CONFIG_INITRAMFS_SOURCE=""' >> $(LINUX_DIR)/.config
+    endef
+  else
+  ifeq ($(strip $(CONFIG_EXTERNAL_CPIO)),"")
+    define Kernel/SetInitramfs/PreConfigure
+	grep -v -e INITRAMFS -e CONFIG_RD_ -e CONFIG_BLK_DEV_INITRD $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config
+	echo 'CONFIG_BLK_DEV_INITRD=y' >> $(LINUX_DIR)/.config
+	echo 'CONFIG_INITRAMFS_SOURCE="$(strip $(TARGET_DIR) $(INITRAMFS_EXTRA_FILES))"' >> $(LINUX_DIR)/.config
+    endef
+  else
+    define Kernel/SetInitramfs/PreConfigure
+	grep -v INITRAMFS $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config
+	echo 'CONFIG_INITRAMFS_SOURCE="$(call qstrip,$(CONFIG_EXTERNAL_CPIO))"' >> $(LINUX_DIR)/.config
+    endef
+  endif
+endif
+
+  define Kernel/SetInitramfs
+	rm -f $(LINUX_DIR)/.config.prev
+	mv $(LINUX_DIR)/.config $(LINUX_DIR)/.config.old
+	$(call Kernel/SetInitramfs/PreConfigure)
+	echo "# CONFIG_INITRAMFS_PRESERVE_MTIME is not set" >> $(LINUX_DIR)/.config
+  ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS_SEPARATE),y)
+	echo 'CONFIG_INITRAMFS_ROOT_UID=$(shell id -u)' >> $(LINUX_DIR)/.config
+	echo 'CONFIG_INITRAMFS_ROOT_GID=$(shell id -g)' >> $(LINUX_DIR)/.config
+	echo "$(if $(CONFIG_TARGET_INITRAMFS_FORCE),CONFIG_INITRAMFS_FORCE=y,# CONFIG_INITRAMFS_FORCE is not set)" >> $(LINUX_DIR)/.config
+  else
+	echo "# CONFIG_INITRAMFS_FORCE is not set" >> $(LINUX_DIR)/.config
+  endif
+	echo "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_NONE),CONFIG_INITRAMFS_COMPRESSION_NONE=y,# CONFIG_INITRAMFS_COMPRESSION_NONE is not set)" >> $(LINUX_DIR)/.config
+	echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_GZIP),CONFIG_INITRAMFS_COMPRESSION_GZIP=y\nCONFIG_RD_GZIP=y,# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set\n# CONFIG_RD_GZIP is not set)" >> $(LINUX_DIR)/.config
+	echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_BZIP2),CONFIG_INITRAMFS_COMPRESSION_BZIP2=y\nCONFIG_RD_BZIP2=y,# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set\n# CONFIG_RD_BZIP2 is not set)" >> $(LINUX_DIR)/.config
+	echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZMA),CONFIG_INITRAMFS_COMPRESSION_LZMA=y\nCONFIG_RD_LZMA=y,# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set\n# CONFIG_RD_LZMA is not set)" >> $(LINUX_DIR)/.config
+	echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZO),CONFIG_INITRAMFS_COMPRESSION_LZO=y\nCONFIG_RD_LZO=y,# CONFIG_INITRAMFS_COMPRESSION_LZO is not set\n# CONFIG_RD_LZO is not set)" >> $(LINUX_DIR)/.config
+	echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_XZ),CONFIG_INITRAMFS_COMPRESSION_XZ=y\nCONFIG_RD_XZ=y,# CONFIG_INITRAMFS_COMPRESSION_XZ is not set\n# CONFIG_RD_XZ is not set)" >> $(LINUX_DIR)/.config
+	echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZ4),CONFIG_INITRAMFS_COMPRESSION_LZ4=y\nCONFIG_RD_LZ4=y,# CONFIG_INITRAMFS_COMPRESSION_LZ4 is not set\n# CONFIG_RD_LZ4 is not set)" >> $(LINUX_DIR)/.config
+	echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_ZSTD),CONFIG_INITRAMFS_COMPRESSION_ZSTD=y\nCONFIG_RD_ZSTD=y,# CONFIG_INITRAMFS_COMPRESSION_ZSTD is not set\n# CONFIG_RD_ZSTD is not set)" >> $(LINUX_DIR)/.config
+  endef
+else
+endif
+
+define Kernel/SetNoInitramfs
+	mv $(LINUX_DIR)/.config.set $(LINUX_DIR)/.config.old
+	grep -v INITRAMFS $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config.set
+	echo 'CONFIG_INITRAMFS_SOURCE=""' >> $(LINUX_DIR)/.config.set
+	echo '# CONFIG_INITRAMFS_FORCE is not set' >> $(LINUX_DIR)/.config.set
+	echo "# CONFIG_INITRAMFS_PRESERVE_MTIME is not set" >> $(LINUX_DIR)/.config.set
+endef
+
+define Kernel/Configure/Default
+	rm -f $(LINUX_DIR)/localversion
+	$(LINUX_CONF_CMD) > $(LINUX_DIR)/.config.target
+# copy CONFIG_KERNEL_* settings over to .config.target
+	awk '/^(#[[:space:]]+)?CONFIG_KERNEL/{sub("CONFIG_KERNEL_","CONFIG_");print}' $(TOPDIR)/.config >> $(LINUX_DIR)/.config.target
+	echo "# CONFIG_KALLSYMS_EXTRA_PASS is not set" >> $(LINUX_DIR)/.config.target
+	echo "# CONFIG_KALLSYMS_ALL is not set" >> $(LINUX_DIR)/.config.target
+	echo "CONFIG_KALLSYMS_UNCOMPRESSED=y" >> $(LINUX_DIR)/.config.target
+	$(SCRIPT_DIR)/package-metadata.pl kconfig $(TMP_DIR)/.packageinfo $(TOPDIR)/.config $(KERNEL_PATCHVER) > $(LINUX_DIR)/.config.override
+	$(SCRIPT_DIR)/kconfig.pl 'm+' '+' $(LINUX_DIR)/.config.target /dev/null $(LINUX_DIR)/.config.override > $(LINUX_DIR)/.config.set
+	$(call Kernel/SetNoInitramfs)
+	rm -rf $(KERNEL_BUILD_DIR)/modules
+	cmp -s $(LINUX_DIR)/.config.set $(LINUX_DIR)/.config.prev || { \
+		cp $(LINUX_DIR)/.config.set $(LINUX_DIR)/.config; \
+		cp $(LINUX_DIR)/.config.set $(LINUX_DIR)/.config.prev; \
+	}
+	$(_SINGLE) [ -d $(LINUX_DIR)/user_headers ] || $(KERNEL_MAKE) $(if $(findstring uml,$(BOARD)),ARCH=$(ARCH)) INSTALL_HDR_PATH=$(LINUX_DIR)/user_headers headers_install
+	grep '=[ym]' $(LINUX_DIR)/.config.set | LC_ALL=C sort | mkhash md5 > $(LINUX_DIR)/.vermagic
+endef
+
+define Kernel/Configure/Initramfs
+	$(call Kernel/SetInitramfs)
+endef
+
+define Kernel/CompileModules/Default
+	rm -f $(LINUX_DIR)/vmlinux $(LINUX_DIR)/System.map
+	+$(KERNEL_MAKE) $(if $(KERNELNAME),$(KERNELNAME),all) modules
+	# If .config did not change, use the previous timestamp to avoid package rebuilds
+	cmp -s $(LINUX_DIR)/.config $(LINUX_DIR)/.config.modules.save && \
+		mv $(LINUX_DIR)/.config.modules.save $(LINUX_DIR)/.config; \
+	$(CP) $(LINUX_DIR)/.config $(LINUX_DIR)/.config.modules.save
+endef
+
+OBJCOPY_STRIP = -R .reginfo -R .notes -R .note -R .comment -R .mdebug -R .note.gnu.build-id
+
+# AMD64 shares the location with x86
+ifeq ($(LINUX_KARCH),x86_64)
+IMAGES_DIR:=../../x86/boot
+endif
+
+define Kernel/CopyImage
+	cmp -s $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).debug || { \
+		$(KERNEL_CROSS)objcopy -O binary $(OBJCOPY_STRIP) -S $(LINUX_DIR)/vmlinux $(LINUX_KERNEL)$(1); \
+		$(KERNEL_CROSS)objcopy $(OBJCOPY_STRIP) -S $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).elf; \
+		$(CP) $(LINUX_DIR)/vmlinux $(KERNEL_BUILD_DIR)/vmlinux$(1).debug; \
+		$(foreach k, \
+			$(if $(KERNEL_IMAGES),$(KERNEL_IMAGES),$(filter-out vmlinux dtbs,$(KERNELNAME))), \
+			$(CP) $(LINUX_DIR)/arch/$(LINUX_KARCH)/boot/$(IMAGES_DIR)/$(k) $(KERNEL_BUILD_DIR)/$(k)$(1); \
+		) \
+	}
+endef
+
+# Always add "modules" so a proper Module.symvers file is written that
+# also contains symbols from the kernel modules. Without these symbols
+# external packages that depend on exported symbols from kernel modules
+# will fail to build.
+define Kernel/CompileImage/Default
+	rm -f $(TARGET_DIR)/init
+	+$(KERNEL_MAKE) $(KERNEL_MAKEOPTS_IMAGE) $(if $(KERNELNAME),$(KERNELNAME),all) modules
+	$(call Kernel/CopyImage)
+endef
+
+# Here as well, always add "modules", see comment above.
+ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+define Kernel/CompileImage/Initramfs
+	$(call Kernel/Configure/Initramfs)
+	$(CP) $(GENERIC_PLATFORM_DIR)/other-files/init $(TARGET_DIR)/init
+	$(if $(SOURCE_DATE_EPOCH),touch -hcd "@$(SOURCE_DATE_EPOCH)" $(TARGET_DIR) $(TARGET_DIR)/init)
+	rm -rf $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/usr/initramfs_data.cpio*
+ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS_SEPARATE),y)
+ifneq ($(qstrip $(CONFIG_EXTERNAL_CPIO)),)
+	$(CP) $(CONFIG_EXTERNAL_CPIO) $(KERNEL_BUILD_DIR)/initrd.cpio
+else
+	( cd $(TARGET_DIR); find . | LC_ALL=C sort | $(STAGING_DIR_HOST)/bin/cpio --reproducible -o -H newc -R 0:0 > $(KERNEL_BUILD_DIR)/initrd.cpio )
+endif
+	$(if $(SOURCE_DATE_EPOCH),touch -hcd "@$(SOURCE_DATE_EPOCH)" $(KERNEL_BUILD_DIR)/initrd.cpio)
+	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_BZIP2),bzip2 -9 -c < $(KERNEL_BUILD_DIR)/initrd.cpio > $(KERNEL_BUILD_DIR)/initrd.cpio.bzip2)
+	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_GZIP),gzip -n -f -S .gzip -9n $(KERNEL_BUILD_DIR)/initrd.cpio)
+	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZMA),$(STAGING_DIR_HOST)/bin/lzma e -lc1 -lp2 -pb2 $(KERNEL_BUILD_DIR)/initrd.cpio $(KERNEL_BUILD_DIR)/initrd.cpio.lzma)
+# ?	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZO),)
+	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_XZ),$(STAGING_DIR_HOST)/bin/xz -T$(if $(filter 1,$(NPROC)),2,0) -9 -fz --check=crc32 $(KERNEL_BUILD_DIR)/initrd.cpio)
+# ?	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_LZ4),)
+	$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_ZSTD),$(STAGING_DIR_HOST)/bin/zstd -T0 -f -o $(KERNEL_BUILD_DIR)/initrd.cpio.zstd $(KERNEL_BUILD_DIR)/initrd.cpio)
+endif
+	+$(KERNEL_MAKE) $(KERNEL_MAKEOPTS_IMAGE) $(if $(KERNELNAME),$(KERNELNAME),all) modules
+	$(call Kernel/CopyImage,-initramfs)
+endef
+else
+define Kernel/CompileImage/Initramfs
+endef
+endif
+
+define Kernel/Clean/Default
+	rm -f $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/.configured
+	rm -f $(LINUX_KERNEL)
+	$(_SINGLE)$(MAKE) -C $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION) clean
+endef

5.4/include/kernel-version.mk

@@ -0,0 +1,62 @@
+
+# Use the default kernel version if the Makefile doesn't override it
+LINUX_RELEASE?=1
+
+ifdef CONFIG_TESTING_KERNEL
+  KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
+endif
+
+LINUX_VERSION-5.4 = .238
+LINUX_VERSION-5.15 = .86
+LINUX_VERSION-6.1 = .10
+
+LINUX_KERNEL_HASH-5.4.132 = 8466adbfb3579e751ede683496df7bb20f258b5f882250f3dd82be63736d00ef
+LINUX_KERNEL_HASH-5.4.182 = b2f1201f64f010e9e3c85d6f303a559a7944a80a0244a86b8f5035bd23f1f40d
+LINUX_KERNEL_HASH-5.4.188 = 9fbc8bfdc28c9fce2307bdf7cf1172c9819df673397a411c40a5c3d0a570fdbc
+LINUX_KERNEL_HASH-5.4.194 = 284157891929f26f34ddd4c447980c1ce364c78df4f89b64edeac8ff9a1d3df6
+LINUX_KERNEL_HASH-5.4.203 = fc933f5b13066cfa54aacb5e86747a167bad1d8d23972e4a03ab5ee36c29798a
+LINUX_KERNEL_HASH-5.4.238 = 70a2b2da85598eba6a73cdc0749e441cbdf3011d9babcb7028a46aa8d98aa91f
+LINUX_KERNEL_HASH-5.15.4 = 549d0fb75e65f6158e6f4becc648f249d386843da0e1211460bde8b1ea99cbca
+LINUX_KERNEL_HASH-5.15.15 = 1d3c57cf8071af174933df3e5d77da801e240a59da3c5e8406f7769de2c83a5a
+LINUX_KERNEL_HASH-5.15.17 = 2787f5c0cc59984902fd97916dc604f39718c73817497c25f963141bfb70abde
+LINUX_KERNEL_HASH-5.15.29 = 5905e684602c47ae95746d4003cb834335e5451aca4ac7c3013f15dd49ed876e
+LINUX_KERNEL_HASH-5.15.36 = 36345db17a937c197c72ca9c7f34c262b3a12f927c237ff7770193014e29c690
+LINUX_KERNEL_HASH-5.15.50 = 554d507d37a23810fe8c83912761e4a4f73c40794bc685ff7ca98042fe1bd70f
+LINUX_KERNEL_HASH-5.15.63 = 6dd3cd1e5a629d0002bc6c6ec7e8ea96710104f38664122dd56c83dfd4eb7341
+LINUX_KERNEL_HASH-5.15.77 = 142f841f33796a84c62fae2f2b96d2120bd8bbf9e0aac4ce157692cdb0afe9f9
+LINUX_KERNEL_HASH-5.15.78 = 0db99f7347a38c27b8c155f3c9c8b260011aea0a4ded85ee95e6095b1e69a499
+LINUX_KERNEL_HASH-6.1 = 2ca1f17051a430f6fed1196e4952717507171acfd97d96577212502703b25deb
+LINUX_KERNEL_HASH-5.15.83 = 40590843c04c85789105157f69efbd71a4efe87ae2568e40d1b7258c3f747ff3
+LINUX_KERNEL_HASH-6.1.3 = 6dc89ae7a7513e433c597c7346ed7ff4bfd115ea43a3b5e27a6bdb38c5580317
+LINUX_KERNEL_HASH-5.4.225 = 59f596f6714317955cf481590babcf015aff2bc1900bd8e8dc8f7af73bc560aa
+LINUX_KERNEL_HASH-5.15.86 = 80fcd9efa443502de9e2750f6dfb59e8de43a5d87a6d2be09dca748d79b5f2ee
+LINUX_KERNEL_HASH-6.1.8 = b60bb53ab8ba370a270454b11e93d41af29126fc72bd6ede517673e2e57b816d
+LINUX_KERNEL_HASH-6.1.10 = 0be2919ba91cf5873a4cb4d429de78aad0469120d624e333a43b4b011d74d19d
+
+remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
+sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))
+
+ifneq ($(call qstrip,$(CONFIG_KERNEL_GIT_CLONE_URI)),)
+  LINUX_VERSION:=$(call sanitize_uri,$(call remove_uri_prefix,$(CONFIG_KERNEL_GIT_CLONE_URI)))
+  ifeq ($(call qstrip,$(CONFIG_KERNEL_GIT_REF)),)
+    CONFIG_KERNEL_GIT_REF:=HEAD
+  endif
+  LINUX_VERSION:=$(LINUX_VERSION)-$(call sanitize_uri,$(CONFIG_KERNEL_GIT_REF))
+else
+ifdef KERNEL_PATCHVER
+  LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))
+endif
+ifdef KERNEL_TESTING_PATCHVER
+  LINUX_TESTING_VERSION:=$(KERNEL_TESTING_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_TESTING_PATCHVER)))
+endif
+endif
+
+split_version=$(subst ., ,$(1))
+merge_version=$(subst $(space),.,$(1))
+KERNEL_BASE=$(firstword $(subst -, ,$(LINUX_VERSION)))
+KERNEL=$(call merge_version,$(wordlist 1,2,$(call split_version,$(KERNEL_BASE))))
+KERNEL_PATCHVER ?= $(KERNEL)
+
+# disable the md5sum check for unknown kernel versions
+LINUX_KERNEL_HASH:=$(LINUX_KERNEL_HASH-$(strip $(LINUX_VERSION)))
+LINUX_KERNEL_HASH?=x

5.4/include/meson.mk

@@ -0,0 +1,146 @@
+# To build your package using meson:
+#
+# include $(INCLUDE_DIR)/meson.mk
+# MESON_ARGS+=-Dfoo -Dbar=baz
+#
+# To pass additional environment variables to meson:
+#
+# MESON_VARS+=FOO=bar
+#
+# Default configure/compile/install targets are provided, but can be
+# overwritten if required:
+#
+# define Build/Configure
+#   $(call Build/Configure/Meson)
+#   ...
+# endef
+#
+# same for Build/Compile and Build/Install
+#
+# Host packages are built in the same fashion, just use these vars instead:
+#
+# MESON_HOST_ARGS+=-Dfoo -Dbar=baz
+# MESON_HOST_VARS+=FOO=bar
+
+MESON_DIR:=$(STAGING_DIR_HOST)/lib/meson
+
+MESON_HOST_BUILD_DIR:=$(HOST_BUILD_DIR)/openwrt-build
+MESON_HOST_VARS:=
+MESON_HOST_ARGS:=
+
+MESON_BUILD_DIR:=$(PKG_BUILD_DIR)/openwrt-build
+MESON_VARS:=
+MESON_ARGS:=
+
+ifneq ($(findstring i386,$(CONFIG_ARCH)),)
+MESON_ARCH:="x86"
+else ifneq ($(findstring powerpc64,$(CONFIG_ARCH)),)
+MESON_ARCH:="ppc64"
+else ifneq ($(findstring powerpc,$(CONFIG_ARCH)),)
+MESON_ARCH:="ppc"
+else ifneq ($(findstring mips64el,$(CONFIG_ARCH)),)
+MESON_ARCH:="mips64"
+else ifneq ($(findstring mipsel,$(CONFIG_ARCH)),)
+MESON_ARCH:="mips"
+else ifneq ($(findstring armeb,$(CONFIG_ARCH)),)
+MESON_ARCH:="arm"
+else
+MESON_ARCH:=$(CONFIG_ARCH)
+endif
+
+# this is undefined for just x64_64
+ifeq ($(origin CPU_TYPE),undefined)
+MESON_CPU:="generic"
+else
+MESON_CPU:="$(CPU_TYPE)$(if $(CPU_SUBTYPE),+$(CPU_SUBTYPE))"
+endif
+
+define Meson
+	$(2) $(STAGING_DIR_HOST)/bin/$(PYTHON) $(STAGING_DIR_HOST)/bin/meson.py $(1)
+endef
+
+define Meson/CreateNativeFile
+	$(STAGING_DIR_HOST)/bin/sed \
+		-e "s|@CC@|$(foreach BIN,$(HOSTCC),'$(BIN)',)|" \
+		-e "s|@CXX@|$(foreach BIN,$(HOSTCXX),'$(BIN)',)|" \
+		-e "s|@PKGCONFIG@|$(PKG_CONFIG)|" \
+		-e "s|@CMAKE@|$(STAGING_DIR_HOST)/bin/cmake|" \
+		-e "s|@PYTHON@|$(STAGING_DIR_HOST)/bin/python3|" \
+		-e "s|@CFLAGS@|$(foreach FLAG,$(HOST_CFLAGS) $(HOST_CPPFLAGS),'$(FLAG)',)|" \
+		-e "s|@CXXFLAGS@|$(foreach FLAG,$(HOST_CXXFLAGS) $(HOST_CPPFLAGS),'$(FLAG)',)|" \
+		-e "s|@LDFLAGS@|$(foreach FLAG,$(HOST_LDFLAGS),'$(FLAG)',)|" \
+		-e "s|@PREFIX@|$(HOST_BUILD_PREFIX)|" \
+		< $(MESON_DIR)/openwrt-native.txt.in \
+		> $(1)
+endef
+
+define Meson/CreateCrossFile
+	$(STAGING_DIR_HOST)/bin/sed \
+		-e "s|@CC@|$(foreach BIN,$(TARGET_CC),'$(BIN)',)|" \
+		-e "s|@CXX@|$(foreach BIN,$(TARGET_CXX),'$(BIN)',)|" \
+		-e "s|@AR@|$(TARGET_AR)|" \
+		-e "s|@STRIP@|$(TARGET_CROSS)strip|" \
+		-e "s|@NM@|$(TARGET_NM)|" \
+		-e "s|@PKGCONFIG@|$(PKG_CONFIG)|" \
+		-e "s|@CMAKE@|$(STAGING_DIR_HOST)/bin/cmake|" \
+		-e "s|@PYTHON@|$(STAGING_DIR_HOST)/bin/python3|" \
+		-e "s|@CFLAGS@|$(foreach FLAG,$(TARGET_CFLAGS) $(EXTRA_CFLAGS) $(TARGET_CPPFLAGS) $(EXTRA_CPPFLAGS),'$(FLAG)',)|" \
+		-e "s|@CXXFLAGS@|$(foreach FLAG,$(TARGET_CXXFLAGS) $(EXTRA_CXXFLAGS) $(TARGET_CPPFLAGS) $(EXTRA_CPPFLAGS),'$(FLAG)',)|" \
+		-e "s|@LDFLAGS@|$(foreach FLAG,$(TARGET_LDFLAGS) $(EXTRA_LDFLAGS),'$(FLAG)',)|" \
+		-e "s|@ARCH@|$(MESON_ARCH)|" \
+		-e "s|@CPU@|$(MESON_CPU)|" \
+		-e "s|@ENDIAN@|$(if $(CONFIG_BIG_ENDIAN),big,little)|" \
+		< $(MESON_DIR)/openwrt-cross.txt.in \
+		> $(1)
+endef
+
+define Host/Configure/Meson
+	$(call Meson/CreateNativeFile,$(HOST_BUILD_DIR)/openwrt-native.txt)
+	$(call Meson, \
+		--native-file $(HOST_BUILD_DIR)/openwrt-native.txt \
+		$(MESON_HOST_ARGS) \
+		$(MESON_HOST_BUILD_DIR) \
+		$(MESON_HOST_BUILD_DIR)/.., \
+		$(MESON_HOST_VARS))
+endef
+
+define Host/Compile/Meson
+	+$(NINJA) -C $(MESON_HOST_BUILD_DIR) $(1)
+endef
+
+define Host/Install/Meson
+	+$(NINJA) -C $(MESON_HOST_BUILD_DIR) install
+endef
+
+define Host/Uninstall/Meson
+	+$(NINJA) -C $(MESON_HOST_BUILD_DIR) uninstall || true
+endef
+
+define Build/Configure/Meson
+	$(call Meson/CreateNativeFile,$(PKG_BUILD_DIR)/openwrt-native.txt)
+	$(call Meson/CreateCrossFile,$(PKG_BUILD_DIR)/openwrt-cross.txt)
+	$(call Meson, \
+		--buildtype plain \
+		--native-file $(PKG_BUILD_DIR)/openwrt-native.txt \
+		--cross-file $(PKG_BUILD_DIR)/openwrt-cross.txt \
+		$(MESON_ARGS) \
+		$(MESON_BUILD_DIR) \
+		$(MESON_BUILD_DIR)/.., \
+		$(MESON_VARS))
+endef
+
+define Build/Compile/Meson
+	+$(NINJA) -C $(MESON_BUILD_DIR) $(1)
+endef
+
+define Build/Install/Meson
+	+DESTDIR="$(PKG_INSTALL_DIR)" $(NINJA) -C $(MESON_BUILD_DIR) install
+endef
+
+Host/Configure=$(call Host/Configure/Meson)
+Host/Compile=$(call Host/Compile/Meson)
+Host/Install=$(call Host/Install/Meson)
+Host/Uninstall=$(call Host/Uninstall/Meson)
+Build/Configure=$(call Build/Configure/Meson)
+Build/Compile=$(call Build/Compile/Meson)
+Build/Install=$(call Build/Install/Meson)

5.4/include/netfilter.mk.iptables

@@ -0,0 +1,389 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2006-2020 OpenWrt.org
+
+ifneq ($(__inc_netfilter),1)
+__inc_netfilter:=1
+
+ifeq ($(NF_KMOD),1)
+P_V4:=ipv4/netfilter/
+P_V6:=ipv6/netfilter/
+P_XT:=netfilter/
+P_EBT:=bridge/netfilter/
+endif
+
+# 1: variable
+# 2: kconfig symbols
+# 3: file list
+# 4: version dependency
+define nf_add
+ $(if $(4),ifeq ($$(strip $$(call CompareKernelPatchVer,$$(KERNEL_PATCHVER),$(firstword $(4)),$(lastword $(4)))),1))
+  $(1)-$$($(2)) += $(3)
+ $(if $(4),endif)
+ KCONFIG_$(1) = $(filter-out $(2),$(KCONFIG_$(1))) $(2)
+endef
+
+
+# core
+
+# kernel only
+$(eval $(if $(NF_KMOD),$(call nf_add,NF_REJECT,CONFIG_NF_REJECT_IPV4, $(P_V4)nf_reject_ipv4),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,NF_IPT,CONFIG_IP_NF_IPTABLES, $(P_V4)ip_tables),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NF_IPT,CONFIG_NETFILTER_XTABLES, $(P_XT)x_tables),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_CORE,CONFIG_NETFILTER_XTABLES, $(P_XT)xt_tcpudp),))
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_CORE,CONFIG_IP_NF_FILTER, $(P_V4)iptable_filter),))
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_CORE,CONFIG_IP_NF_MANGLE, $(P_V4)iptable_mangle),))
+
+# userland only
+$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_CORE,CONFIG_IP_NF_IPTABLES, xt_standard ipt_icmp xt_tcp xt_udp xt_comment xt_set xt_SET)))
+
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_LIMIT, $(P_XT)xt_limit))
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_MAC, $(P_XT)xt_mac))
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_MULTIPORT, $(P_XT)xt_multiport))
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_COMMENT, $(P_XT)xt_comment))
+
+#cluster
+$(eval $(call nf_add,IPT_CLUSTER,CONFIG_NETFILTER_XT_MATCH_CLUSTER, $(P_XT)xt_cluster))
+
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_XT)xt_LOG))
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_XT)nf_log_common, lt 5.13))
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_V4)nf_log_ipv4, lt 5.13))
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_LOG, $(P_XT)nf_log_syslog, ge 5.13))
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_TARGET_TCPMSS, $(P_XT)xt_TCPMSS))
+$(eval $(call nf_add,IPT_CORE,CONFIG_IP_NF_TARGET_REJECT, $(P_V4)ipt_REJECT))
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MATCH_TIME, $(P_XT)xt_time))
+$(eval $(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MARK, $(P_XT)xt_mark))
+
+# kernel has xt_MARK.ko merged into xt_mark.ko, userspace is still separate
+# userland: xt_MARK.so
+$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_CORE,CONFIG_NETFILTER_XT_MARK, $(P_XT)xt_MARK)))
+
+
+# conntrack
+
+# kernel only
+$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_CONNTRACK, $(P_XT)nf_conntrack),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_DEFRAG_IPV4, $(P_V4)nf_defrag_ipv4),))
+
+$(eval $(call nf_add,IPT_CONNTRACK,CONFIG_NETFILTER_XT_MATCH_STATE, $(P_XT)xt_state))
+$(eval $(call nf_add,IPT_CONNTRACK,CONFIG_NETFILTER_XT_TARGET_CT, $(P_XT)xt_CT))
+$(eval $(call nf_add,IPT_CONNTRACK,CONFIG_NETFILTER_XT_MATCH_CONNTRACK, $(P_XT)xt_conntrack))
+
+
+# conntrack-extra
+
+$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_CONNBYTES, $(P_XT)xt_connbytes))
+$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_CONNLIMIT, $(P_XT)xt_connlimit))
+$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_CONNCOUNT, $(P_XT)nf_conncount))
+$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_CONNMARK, $(P_XT)xt_connmark))
+$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_HELPER, $(P_XT)xt_helper))
+$(eval $(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_MATCH_RECENT, $(P_XT)xt_recent))
+
+$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_CONNTRACK_EXTRA,CONFIG_NETFILTER_XT_CONNMARK, $(P_XT)xt_CONNMARK)))
+
+#conntrack-label
+
+$(eval $(call nf_add,IPT_CONNTRACK_LABEL,CONFIG_NETFILTER_XT_MATCH_CONNLABEL, $(P_XT)xt_connlabel))
+
+# extra
+
+$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_ADDRTYPE, $(if $(NF_KMOD),$(P_XT)xt_addrtype,$(P_XT)ipt_addrtype)))
+$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_OWNER, $(P_XT)xt_owner))
+$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_PKTTYPE, $(P_XT)xt_pkttype))
+$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_QUOTA, $(P_XT)xt_quota))
+$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_CGROUP, $(P_XT)xt_cgroup))
+
+#$(eval $(call nf_add,IPT_EXTRA,CONFIG_IP_NF_TARGET_ROUTE, $(P_V4)ipt_ROUTE))
+
+# physdev
+
+$(eval $(call nf_add,IPT_PHYSDEV,CONFIG_NETFILTER_XT_MATCH_PHYSDEV, $(P_XT)xt_physdev))
+
+# filter
+
+$(eval $(call nf_add,IPT_FILTER,CONFIG_NETFILTER_XT_MATCH_STRING, $(P_XT)xt_string))
+$(eval $(call nf_add,IPT_FILTER,CONFIG_NETFILTER_XT_MATCH_BPF, $(P_XT)xt_bpf))
+
+
+# ipopt
+
+$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_DSCP, $(P_XT)xt_dscp))
+$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_DSCP, $(P_XT)xt_DSCP))
+$(eval $(call nf_add,IPT_HASHLIMIT,CONFIG_NETFILTER_XT_MATCH_HASHLIMIT, $(P_XT)xt_hashlimit))
+$(eval $(call nf_add,IPT_RPFILTER,CONFIG_IP_NF_MATCH_RPFILTER, $(P_V4)ipt_rpfilter))
+$(eval $(call nf_add,IPT_RPFILTER,CONFIG_IP6_NF_MATCH_RPFILTER, $(P_V6)ip6t_rpfilter))
+$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_LENGTH, $(P_XT)xt_length))
+$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_STATISTIC, $(P_XT)xt_statistic))
+$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_TCPMSS, $(P_XT)xt_tcpmss))
+
+$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_CLASSIFY, $(P_XT)xt_CLASSIFY))
+$(eval $(call nf_add,IPT_IPOPT,CONFIG_IP_NF_TARGET_ECN, $(P_V4)ipt_ECN))
+
+$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_ECN, $(P_XT)xt_ecn))
+
+# userland only
+$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_DSCP, xt_tos)))
+$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_DSCP, xt_TOS)))
+$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_HL, ipt_ttl)))
+$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_HL, ipt_TTL)))
+
+$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_MATCH_HL, $(P_XT)xt_hl))
+$(eval $(call nf_add,IPT_IPOPT,CONFIG_NETFILTER_XT_TARGET_HL, $(P_XT)xt_HL))
+
+# iprange
+$(eval $(call nf_add,IPT_IPRANGE,CONFIG_NETFILTER_XT_MATCH_IPRANGE, $(P_XT)xt_iprange))
+
+#clusterip
+$(eval $(call nf_add,IPT_CLUSTERIP,CONFIG_IP_NF_TARGET_CLUSTERIP, $(P_V4)ipt_CLUSTERIP))
+
+# ipsec
+$(eval $(call nf_add,IPT_IPSEC,CONFIG_IP_NF_MATCH_AH, $(P_V4)ipt_ah))
+$(eval $(call nf_add,IPT_IPSEC,CONFIG_NETFILTER_XT_MATCH_ESP, $(P_XT)xt_esp))
+$(eval $(call nf_add,IPT_IPSEC,CONFIG_NETFILTER_XT_MATCH_POLICY, $(P_XT)xt_policy))
+
+# flow offload support
+$(eval $(call nf_add,IPT_FLOW,CONFIG_NETFILTER_XT_TARGET_FLOWOFFLOAD, $(P_XT)xt_FLOWOFFLOAD))
+
+# IPv6
+
+# kernel only
+$(eval $(if $(NF_KMOD),$(call nf_add,NF_REJECT6,CONFIG_NF_REJECT_IPV6, $(P_V6)nf_reject_ipv6),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,NF_IPT6,CONFIG_IP6_NF_IPTABLES, $(P_V6)ip6_tables),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,NF_CONNTRACK,CONFIG_NF_DEFRAG_IPV6, $(P_V6)nf_defrag_ipv6),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_FILTER, $(P_V6)ip6table_filter),))
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_MANGLE, $(P_V6)ip6table_mangle),))
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_IPV6,CONFIG_NF_LOG_IPV6, $(P_V6)nf_log_ipv6,lt 5.13),))
+
+$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_IPV6,CONFIG_IP6_NF_IPTABLES, ip6t_icmp6)))
+
+
+$(eval $(call nf_add,IPT_IPV6,CONFIG_IP6_NF_TARGET_REJECT, $(P_V6)ip6t_REJECT))
+
+# ipv6 extra
+$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_IPV6HEADER, $(P_V6)ip6t_ipv6header))
+$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_AH, $(P_V6)ip6t_ah))
+$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_MH, $(P_V6)ip6t_mh))
+$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_EUI64, $(P_V6)ip6t_eui64))
+$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_OPTS, $(P_V6)ip6t_hbh))
+$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_FRAG, $(P_V6)ip6t_frag))
+$(eval $(call nf_add,IPT_IPV6_EXTRA,CONFIG_IP6_NF_MATCH_RT, $(P_V6)ip6t_rt))
+
+# nat
+
+# kernel only
+$(eval $(if $(NF_KMOD),$(call nf_add,NF_NAT,CONFIG_NF_NAT, $(P_XT)nf_nat),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_NAT, $(P_XT)xt_nat),))
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT,CONFIG_IP_NF_NAT, $(P_V4)iptable_nat),))
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_NAT, $(P_V6)ip6table_nat),))
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_TARGET_NPT, $(P_V6)ip6t_NPT),))
+
+# userland only
+$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_NAT,CONFIG_NF_NAT, ipt_SNAT ipt_DNAT)))
+$(eval $(if $(NF_KMOD),,$(call nf_add,IPT_NAT6,CONFIG_IP6_NF_TARGET_NPT, ip6t_DNPT ip6t_SNPT)))
+
+$(eval $(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_TARGET_MASQUERADE, $(P_XT)xt_MASQUERADE))
+$(eval $(call nf_add,IPT_NAT,CONFIG_NETFILTER_XT_TARGET_REDIRECT, $(P_XT)xt_REDIRECT))
+
+
+# nat-extra
+
+$(eval $(call nf_add,IPT_NAT_EXTRA,CONFIG_IP_NF_TARGET_NETMAP, $(P_XT)xt_NETMAP))
+
+
+# nathelper
+
+$(eval $(call nf_add,NF_NATHELPER,CONFIG_NF_CONNTRACK_FTP, $(P_XT)nf_conntrack_ftp))
+$(eval $(call nf_add,NF_NATHELPER,CONFIG_NF_NAT_FTP, $(P_XT)nf_nat_ftp))
+
+
+# nathelper-extra
+
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_BROADCAST, $(P_XT)nf_conntrack_broadcast))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_AMANDA, $(P_XT)nf_conntrack_amanda))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_AMANDA, $(P_XT)nf_nat_amanda))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_H323, $(P_XT)nf_conntrack_h323))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_H323, $(P_V4)nf_nat_h323))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_PPTP, $(P_XT)nf_conntrack_pptp))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_PPTP, $(P_V4)nf_nat_pptp))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_SIP, $(P_XT)nf_conntrack_sip))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_SIP, $(P_XT)nf_nat_sip))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_SNMP, $(P_XT)nf_conntrack_snmp))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_SNMP_BASIC, $(P_V4)nf_nat_snmp_basic))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_TFTP, $(P_XT)nf_conntrack_tftp))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_TFTP, $(P_XT)nf_nat_tftp))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_CONNTRACK_IRC, $(P_XT)nf_conntrack_irc))
+$(eval $(call nf_add,NF_NATHELPER_EXTRA,CONFIG_NF_NAT_IRC, $(P_XT)nf_nat_irc))
+
+
+# ulog
+
+$(eval $(call nf_add,IPT_ULOG,CONFIG_IP_NF_TARGET_ULOG, $(P_V4)ipt_ULOG))
+
+
+# nflog
+
+$(eval $(call nf_add,IPT_NFLOG,CONFIG_NETFILTER_XT_TARGET_NFLOG, $(P_XT)xt_NFLOG))
+
+
+# nfqueue
+
+$(eval $(call nf_add,IPT_NFQUEUE,CONFIG_NETFILTER_XT_TARGET_NFQUEUE, $(P_XT)xt_NFQUEUE))
+
+
+# debugging
+
+$(eval $(call nf_add,IPT_DEBUG,CONFIG_NETFILTER_XT_TARGET_TRACE, $(P_XT)xt_TRACE))
+
+# tproxy
+
+$(eval $(call nf_add,IPT_TPROXY,CONFIG_NETFILTER_XT_MATCH_SOCKET, $(P_XT)xt_socket))
+$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_SOCKET_IPV4, $(P_V4)nf_socket_ipv4))
+$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_SOCKET_IPV6, $(P_V6)nf_socket_ipv6))
+$(eval $(call nf_add,IPT_TPROXY,CONFIG_NETFILTER_XT_TARGET_TPROXY, $(P_XT)xt_TPROXY))
+$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_TPROXY_IPV4, $(P_V4)nf_tproxy_ipv4))
+$(eval $(call nf_add,IPT_TPROXY,CONFIG_NF_TPROXY_IPV6, $(P_V6)nf_tproxy_ipv6))
+
+# led
+$(eval $(call nf_add,IPT_LED,CONFIG_NETFILTER_XT_TARGET_LED, $(P_XT)xt_LED))
+
+# tee
+
+$(eval $(call nf_add,IPT_TEE,CONFIG_NETFILTER_XT_TARGET_TEE, $(P_XT)xt_TEE))
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_TEE,CONFIG_NF_DUP_IPV4, $(P_V4)nf_dup_ipv4),))
+$(eval $(if $(NF_KMOD),$(call nf_add,IPT_TEE,CONFIG_NF_DUP_IPV6, $(P_V6)nf_dup_ipv6),))
+
+# u32
+
+$(eval $(call nf_add,IPT_U32,CONFIG_NETFILTER_XT_MATCH_U32, $(P_XT)xt_u32))
+
+# checksum
+
+$(eval $(call nf_add,IPT_CHECKSUM,CONFIG_NETFILTER_XT_TARGET_CHECKSUM, $(P_XT)xt_CHECKSUM))
+
+
+# netlink
+
+$(eval $(call nf_add,NFNETLINK,CONFIG_NETFILTER_NETLINK, $(P_XT)nfnetlink))
+
+# nflog
+
+$(eval $(call nf_add,NFNETLINK_LOG,CONFIG_NETFILTER_NETLINK_LOG, $(P_XT)nfnetlink_log))
+
+# nfqueue
+
+$(eval $(call nf_add,NFNETLINK_QUEUE,CONFIG_NETFILTER_NETLINK_QUEUE, $(P_XT)nfnetlink_queue))
+
+#
+# ebtables
+#
+
+$(eval $(if $(NF_KMOD),$(call nf_add,EBTABLES,CONFIG_BRIDGE_NF_EBTABLES, $(P_EBT)ebtables),))
+
+# ebtables: tables
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_BROUTE, $(P_EBT)ebtable_broute))
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_T_FILTER, $(P_EBT)ebtable_filter))
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_T_NAT, $(P_EBT)ebtable_nat))
+
+# ebtables: matches
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_802_3, $(P_EBT)ebt_802_3))
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_AMONG, $(P_EBT)ebt_among))
+$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_ARP, $(P_EBT)ebt_arp))
+$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_IP, $(P_EBT)ebt_ip))
+$(eval $(call nf_add,EBTABLES_IP6,CONFIG_BRIDGE_EBT_IP6, $(P_EBT)ebt_ip6))
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_LIMIT, $(P_EBT)ebt_limit))
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_MARK, $(P_EBT)ebt_mark_m))
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_PKTTYPE, $(P_EBT)ebt_pkttype))
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_STP, $(P_EBT)ebt_stp))
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_VLAN, $(P_EBT)ebt_vlan))
+
+# targets
+$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_ARPREPLY, $(P_EBT)ebt_arpreply))
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_MARK_T, $(P_EBT)ebt_mark))
+$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_DNAT, $(P_EBT)ebt_dnat))
+$(eval $(call nf_add,EBTABLES,CONFIG_BRIDGE_EBT_REDIRECT, $(P_EBT)ebt_redirect))
+$(eval $(call nf_add,EBTABLES_IP4,CONFIG_BRIDGE_EBT_SNAT, $(P_EBT)ebt_snat))
+
+# watchers
+$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_LOG, $(P_EBT)ebt_log))
+$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_ULOG, $(P_EBT)ebt_ulog))
+$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_NFLOG, $(P_EBT)ebt_nflog))
+$(eval $(call nf_add,EBTABLES_WATCHERS,CONFIG_BRIDGE_EBT_NFQUEUE, $(P_EBT)ebt_nfqueue))
+
+# nftables
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NF_TABLES, $(P_XT)nf_tables),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NF_TABLES_SET, $(P_XT)nf_tables_set),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_COUNTER, $(P_XT)nft_counter),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_CT, $(P_XT)nft_ct),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_HASH, $(P_XT)nft_hash),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_LIMIT, $(P_XT)nft_limit),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_LOG, $(P_XT)nft_log),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_META, $(P_XT)nft_meta),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_NUMGEN, $(P_XT)nft_numgen),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_OBJREF, $(P_XT)nft_objref),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_QUOTA, $(P_XT)nft_quota),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REDIR, $(P_XT)nft_redir),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REJECT, $(P_XT)nft_reject $(P_V4)nft_reject_ipv4 $(P_V6)nft_reject_ipv6),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_CORE,CONFIG_NFT_REJECT_INET, $(P_XT)nft_reject_inet),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NFT_BRIDGE_META, $(P_EBT)nft_meta_bridge),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_BRIDGE,CONFIG_NFT_BRIDGE_REJECT, $(P_EBT)nft_reject_bridge),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_NAT, $(P_XT)nft_nat),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_NAT, $(P_XT)nft_chain_nat),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_REDIR_IPV4, $(P_V4)nft_redir_ipv4),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_MASQ, $(P_XT)nft_masq),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT,CONFIG_NFT_MASQ_IPV4, $(P_V4)nft_masq_ipv4),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT6,CONFIG_NFT_REDIR_IPV6, $(P_V6)nft_redir_ipv6),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_NAT6,CONFIG_NFT_MASQ_IPV6, $(P_V6)nft_masq_ipv6),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB, $(P_XT)nft_fib),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB_INET, $(P_XT)nft_fib_inet),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB_IPV4, $(P_V4)nft_fib_ipv4),))
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_FIB,CONFIG_NFT_FIB_IPV6, $(P_V6)nft_fib_ipv6),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_QUEUE,CONFIG_NFT_QUEUE, $(P_XT)nft_queue),))
+
+$(eval $(if $(NF_KMOD),$(call nf_add,NFT_COMPAT,CONFIG_NFT_COMPAT, $(P_XT)nft_compat),))
+
+# userland only
+IPT_BUILTIN += $(NF_IPT-y) $(NF_IPT-m)
+IPT_BUILTIN += $(IPT_CORE-y) $(IPT_CORE-m)
+IPT_BUILTIN += $(NF_CONNTRACK-y)
+IPT_BUILTIN += $(NF_CONNTRACK6-y)
+IPT_BUILTIN += $(IPT_CONNTRACK-y)
+IPT_BUILTIN += $(IPT_CONNTRACK_EXTRA-y)
+IPT_BUILTIN += $(IPT_EXTRA-y)
+IPT_BUILTIN += $(IPT_PHYSDEV-y)
+IPT_BUILTIN += $(IPT_FILTER-y)
+IPT_BUILTIN += $(IPT_FLOW-y) $(IPT_FLOW-m)
+IPT_BUILTIN += $(IPT_IPOPT-y)
+IPT_BUILTIN += $(IPT_IPRANGE-y)
+IPT_BUILTIN += $(IPT_CLUSTER-y)
+IPT_BUILTIN += $(IPT_CLUSTERIP-y)
+IPT_BUILTIN += $(IPT_IPSEC-y)
+IPT_BUILTIN += $(IPT_IPV6-y) $(IPT_IPV6-m)
+IPT_BUILTIN += $(NF_NAT-y)
+IPT_BUILTIN += $(NF_NAT6-y)
+IPT_BUILTIN += $(IPT_NAT-y)
+IPT_BUILTIN += $(IPT_NAT6-y)
+IPT_BUILTIN += $(IPT_NAT_EXTRA-y)
+IPT_BUILTIN += $(NF_NATHELPER-y)
+IPT_BUILTIN += $(NF_NATHELPER_EXTRA-y)
+IPT_BUILTIN += $(IPT_ULOG-y)
+IPT_BUILTIN += $(IPT_TPROXY-y)
+IPT_BUILTIN += $(NFNETLINK-y)
+IPT_BUILTIN += $(NFNETLINK_LOG-y)
+IPT_BUILTIN += $(NFNETLINK_QUEUE-y)
+IPT_BUILTIN += $(EBTABLES-y)
+IPT_BUILTIN += $(EBTABLES_IP4-y)
+IPT_BUILTIN += $(EBTABLES_IP6-y)
+IPT_BUILTIN += $(EBTABLES_WATCHERS-y)
+
+endif # __inc_netfilter

5.4/include/target.mk.iptables

@@ -0,0 +1,352 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2007-2008 OpenWrt.org
+# Copyright (C) 2016 LEDE Project
+
+ifneq ($(__target_inc),1)
+__target_inc=1
+
+# default device type
+DEVICE_TYPE?=router
+
+# Default packages - the really basic set
+DEFAULT_PACKAGES:=\
+	base-files \
+	ca-bundle \
+	dropbear \
+	fstools \
+	libc \
+	libgcc \
+	libustream-wolfssl \
+	logd \
+	mtd \
+	netifd \
+	opkg \
+	uci \
+	uclient-fetch \
+	urandom-seed \
+	urngd
+
+ifneq ($(CONFIG_SELINUX),)
+DEFAULT_PACKAGES+=busybox-selinux procd-selinux
+else
+DEFAULT_PACKAGES+=busybox procd
+endif
+
+# include ujail on systems with enough storage
+ifeq ($(CONFIG_SMALL_FLASH),)
+DEFAULT_PACKAGES+=procd-ujail
+endif
+
+# include seccomp ld-preload hooks if kernel supports it
+ifneq ($(CONFIG_SECCOMP),)
+DEFAULT_PACKAGES+=procd-seccomp
+endif
+
+# For the basic set
+DEFAULT_PACKAGES.basic:=
+# For nas targets
+DEFAULT_PACKAGES.nas:=\
+	block-mount \
+	fdisk \
+	lsblk \
+	mdadm
+# For router targets
+DEFAULT_PACKAGES.router:=\
+	dnsmasq \
+	firewall \
+	ip6tables \
+	iptables \
+	kmod-nft-offload \
+	odhcp6c \
+	odhcpd-ipv6only \
+	ppp \
+	ppp-mod-pppoe
+
+ifneq ($(DUMP),)
+  all: dumpinfo
+endif
+
+target_conf=$(subst .,_,$(subst -,_,$(subst /,_,$(1))))
+ifeq ($(DUMP),)
+  PLATFORM_DIR:=$(TOPDIR)/target/linux/$(BOARD)
+  SUBTARGET:=$(strip $(foreach subdir,$(patsubst $(PLATFORM_DIR)/%/target.mk,%,$(wildcard $(PLATFORM_DIR)/*/target.mk)),$(if $(CONFIG_TARGET_$(call target_conf,$(BOARD)_$(subdir))),$(subdir))))
+else
+  PLATFORM_DIR:=${CURDIR}
+  ifeq ($(SUBTARGETS),)
+    SUBTARGETS:=$(strip $(patsubst $(PLATFORM_DIR)/%/target.mk,%,$(wildcard $(PLATFORM_DIR)/*/target.mk)))
+  endif
+endif
+
+TARGETID:=$(BOARD)$(if $(SUBTARGET),/$(SUBTARGET))
+PLATFORM_SUBDIR:=$(PLATFORM_DIR)$(if $(SUBTARGET),/$(SUBTARGET))
+
+ifneq ($(TARGET_BUILD),1)
+  ifndef DUMP
+    include $(PLATFORM_DIR)/Makefile
+    ifneq ($(PLATFORM_DIR),$(PLATFORM_SUBDIR))
+      include $(PLATFORM_SUBDIR)/target.mk
+    endif
+  endif
+else
+  ifneq ($(SUBTARGET),)
+    -include ./$(SUBTARGET)/target.mk
+  endif
+endif
+
+# Add device specific packages (here below to allow device type set from subtarget)
+DEFAULT_PACKAGES += $(DEFAULT_PACKAGES.$(DEVICE_TYPE))
+
+filter_packages = $(filter-out -% $(patsubst -%,%,$(filter -%,$(1))),$(1))
+extra_packages = $(if $(filter wpad wpad-% nas,$(1)),iwinfo)
+
+define ProfileDefault
+  NAME:=
+  PRIORITY:=
+  PACKAGES:=
+endef
+
+ifndef Profile
+define Profile
+  $(eval $(call ProfileDefault))
+  $(eval $(call Profile/$(1)))
+  dumpinfo : $(call shexport,Profile/$(1)/Description)
+  PACKAGES := $(filter-out -%,$(PACKAGES))
+  DUMPINFO += \
+	echo "Target-Profile: $(1)"; \
+	$(if $(PRIORITY), echo "Target-Profile-Priority: $(PRIORITY)"; ) \
+	echo "Target-Profile-Name: $(NAME)"; \
+	echo "Target-Profile-Packages: $(PACKAGES) $(call extra_packages,$(DEFAULT_PACKAGES) $(PACKAGES))"; \
+	echo "Target-Profile-Description:"; \
+	echo "$$$$$$$$$(call shvar,Profile/$(1)/Description)"; \
+	echo "@@"; \
+	echo;
+endef
+endif
+
+ifneq ($(PLATFORM_DIR),$(PLATFORM_SUBDIR))
+  define IncludeProfiles
+    -include $(sort $(wildcard $(PLATFORM_DIR)/profiles/*.mk))
+    -include $(sort $(wildcard $(PLATFORM_SUBDIR)/profiles/*.mk))
+  endef
+else
+  define IncludeProfiles
+    -include $(sort $(wildcard $(PLATFORM_DIR)/profiles/*.mk))
+  endef
+endif
+
+PROFILE?=$(call qstrip,$(CONFIG_TARGET_PROFILE))
+
+ifeq ($(TARGET_BUILD),1)
+  ifneq ($(DUMP),)
+    $(eval $(call IncludeProfiles))
+  endif
+endif
+
+ifneq ($(TARGET_BUILD)$(if $(DUMP),,1),)
+  include $(INCLUDE_DIR)/kernel-version.mk
+endif
+
+GENERIC_PLATFORM_DIR := $(TOPDIR)/target/linux/generic
+GENERIC_BACKPORT_DIR := $(GENERIC_PLATFORM_DIR)/backport$(if $(wildcard $(GENERIC_PLATFORM_DIR)/backport-$(KERNEL_PATCHVER)),-$(KERNEL_PATCHVER))
+GENERIC_PATCH_DIR := $(GENERIC_PLATFORM_DIR)/pending$(if $(wildcard $(GENERIC_PLATFORM_DIR)/pending-$(KERNEL_PATCHVER)),-$(KERNEL_PATCHVER))
+GENERIC_HACK_DIR := $(GENERIC_PLATFORM_DIR)/hack$(if $(wildcard $(GENERIC_PLATFORM_DIR)/hack-$(KERNEL_PATCHVER)),-$(KERNEL_PATCHVER))
+GENERIC_FILES_DIR := $(foreach dir,$(wildcard $(GENERIC_PLATFORM_DIR)/files $(GENERIC_PLATFORM_DIR)/files-$(KERNEL_PATCHVER)),"$(dir)")
+
+__config_name_list = $(1)/config-$(KERNEL_PATCHVER) $(1)/config-default
+__config_list = $(firstword $(wildcard $(call __config_name_list,$(1))))
+find_kernel_config=$(if $(__config_list),$(__config_list),$(lastword $(__config_name_list)))
+
+GENERIC_LINUX_CONFIG = $(call find_kernel_config,$(GENERIC_PLATFORM_DIR))
+LINUX_TARGET_CONFIG = $(call find_kernel_config,$(PLATFORM_DIR))
+ifneq ($(PLATFORM_DIR),$(PLATFORM_SUBDIR))
+  LINUX_SUBTARGET_CONFIG = $(call find_kernel_config,$(PLATFORM_SUBDIR))
+endif
+
+# config file list used for compiling
+LINUX_KCONFIG_LIST = $(wildcard $(GENERIC_LINUX_CONFIG) $(LINUX_TARGET_CONFIG) $(LINUX_SUBTARGET_CONFIG) $(TOPDIR)/env/kernel-config)
+
+# default config list for reconfiguring
+# defaults to subtarget if subtarget exists and target does not
+# defaults to target otherwise
+USE_SUBTARGET_CONFIG = $(if $(wildcard $(LINUX_TARGET_CONFIG)),,$(if $(LINUX_SUBTARGET_CONFIG),1))
+
+LINUX_RECONFIG_LIST = $(wildcard $(GENERIC_LINUX_CONFIG) $(LINUX_TARGET_CONFIG) $(if $(USE_SUBTARGET_CONFIG),$(LINUX_SUBTARGET_CONFIG)))
+LINUX_RECONFIG_TARGET = $(if $(USE_SUBTARGET_CONFIG),$(LINUX_SUBTARGET_CONFIG),$(LINUX_TARGET_CONFIG))
+
+# select the config file to be changed by kernel_menuconfig/kernel_oldconfig
+ifeq ($(CONFIG_TARGET),platform)
+  LINUX_RECONFIG_LIST = $(wildcard $(GENERIC_LINUX_CONFIG) $(LINUX_TARGET_CONFIG))
+  LINUX_RECONFIG_TARGET = $(LINUX_TARGET_CONFIG)
+endif
+ifeq ($(CONFIG_TARGET),subtarget)
+  LINUX_RECONFIG_LIST = $(wildcard $(GENERIC_LINUX_CONFIG) $(LINUX_TARGET_CONFIG) $(LINUX_SUBTARGET_CONFIG))
+  LINUX_RECONFIG_TARGET = $(LINUX_SUBTARGET_CONFIG)
+endif
+ifeq ($(CONFIG_TARGET),subtarget_platform)
+  LINUX_RECONFIG_LIST = $(wildcard $(GENERIC_LINUX_CONFIG) $(LINUX_SUBTARGET_CONFIG) $(LINUX_TARGET_CONFIG))
+  LINUX_RECONFIG_TARGET = $(LINUX_TARGET_CONFIG)
+endif
+ifeq ($(CONFIG_TARGET),env)
+  LINUX_RECONFIG_LIST = $(LINUX_KCONFIG_LIST)
+  LINUX_RECONFIG_TARGET = $(TOPDIR)/env/kernel-config
+endif
+
+__linux_confcmd = $(2) $(patsubst %,+,$(wordlist 2,9999,$(1))) $(1)
+
+LINUX_CONF_CMD = $(SCRIPT_DIR)/kconfig.pl $(call __linux_confcmd,$(LINUX_KCONFIG_LIST))
+LINUX_RECONF_CMD = $(SCRIPT_DIR)/kconfig.pl $(call __linux_confcmd,$(LINUX_RECONFIG_LIST))
+LINUX_RECONF_DIFF = $(SCRIPT_DIR)/kconfig.pl - '>' $(call __linux_confcmd,$(filter-out $(LINUX_RECONFIG_TARGET),$(LINUX_RECONFIG_LIST))) $(1) $(GENERIC_PLATFORM_DIR)/config-filter
+
+ifeq ($(DUMP),1)
+  BuildTarget=$(BuildTargets/DumpCurrent)
+
+  CPU_CFLAGS = -Os -pipe
+  ifneq ($(findstring mips,$(ARCH)),)
+    ifneq ($(findstring mips64,$(ARCH)),)
+      CPU_TYPE ?= mips64
+    else
+      CPU_TYPE ?= mips32
+    endif
+    CPU_CFLAGS += -mno-branch-likely
+    CPU_CFLAGS_mips32 = -mips32 -mtune=mips32
+    CPU_CFLAGS_mips64 = -mips64 -mtune=mips64 -mabi=64
+    CPU_CFLAGS_mips64r2 = -mips64r2 -mtune=mips64r2 -mabi=64
+    CPU_CFLAGS_4kec = -mips32r2 -mtune=4kec
+    CPU_CFLAGS_24kc = -mips32r2 -mtune=24kc
+    CPU_CFLAGS_74kc = -mips32r2 -mtune=74kc
+    CPU_CFLAGS_octeonplus = -march=octeon+ -mabi=64
+  endif
+  ifeq ($(ARCH),i386)
+    CPU_TYPE ?= pentium-mmx
+    CPU_CFLAGS_pentium-mmx = -march=pentium-mmx
+    CPU_CFLAGS_pentium4 = -march=pentium4
+  endif
+  ifneq ($(findstring arm,$(ARCH)),)
+    CPU_TYPE ?= xscale
+  endif
+  ifeq ($(ARCH),powerpc)
+    CPU_CFLAGS_603e:=-mcpu=603e
+    CPU_CFLAGS_8540:=-mcpu=8540
+    CPU_CFLAGS_405:=-mcpu=405
+    CPU_CFLAGS_440:=-mcpu=440
+    CPU_CFLAGS_464fp:=-mcpu=464fp
+  endif
+  ifeq ($(ARCH),powerpc64)
+    CPU_TYPE ?= powerpc64
+    CPU_CFLAGS_e5500:=-mcpu=e5500
+    CPU_CFLAGS_powerpc64:=-mcpu=powerpc64
+  endif
+  ifeq ($(ARCH),sparc)
+    CPU_TYPE = sparc
+    CPU_CFLAGS_ultrasparc = -mcpu=ultrasparc
+  endif
+  ifeq ($(ARCH),aarch64)
+    CPU_TYPE ?= generic
+    CPU_CFLAGS_generic = -mcpu=generic
+    CPU_CFLAGS_cortex-a53 = -mcpu=cortex-a53
+  endif
+  ifeq ($(ARCH),arc)
+    CPU_TYPE ?= arc700
+    CPU_CFLAGS += -matomic
+    CPU_CFLAGS_arc700 = -mcpu=arc700
+    CPU_CFLAGS_archs = -mcpu=archs
+  endif
+  ifneq ($(CPU_TYPE),)
+    ifndef CPU_CFLAGS_$(CPU_TYPE)
+      $(warning CPU_TYPE "$(CPU_TYPE)" doesn't correspond to a known type)
+    endif
+  endif
+  DEFAULT_CFLAGS=$(strip $(CPU_CFLAGS) $(CPU_CFLAGS_$(CPU_TYPE)) $(CPU_CFLAGS_$(CPU_SUBTYPE)))
+
+  ifneq ($(BOARD),)
+    TMP_CONFIG:=$(TMP_DIR)/.kconfig-$(call target_conf,$(TARGETID))
+    $(TMP_CONFIG): $(LINUX_KCONFIG_LIST)
+		$(LINUX_CONF_CMD) > $@ || rm -f $@
+    -include $(TMP_CONFIG)
+    .SILENT: $(TMP_CONFIG)
+    .PRECIOUS: $(TMP_CONFIG)
+
+    ifdef KERNEL_TESTING_PATCHVER
+      ifneq ($(KERNEL_TESTING_PATCHVER),$(KERNEL_PATCHVER))
+        FEATURES += testing-kernel
+      endif
+    endif
+    ifneq ($(CONFIG_OF),)
+      FEATURES += dt
+    endif
+    ifneq ($(CONFIG_GENERIC_GPIO)$(CONFIG_GPIOLIB),)
+      FEATURES += gpio
+    endif
+    ifneq ($(CONFIG_PCI),)
+      FEATURES += pci
+    endif
+    ifneq ($(CONFIG_PCIEPORTBUS),)
+      FEATURES += pcie
+    endif
+    ifneq ($(CONFIG_USB)$(CONFIG_USB_SUPPORT),)
+      ifneq ($(CONFIG_USB_ARCH_HAS_HCD)$(CONFIG_USB_EHCI_HCD),)
+        FEATURES += usb
+      endif
+    endif
+    ifneq ($(CONFIG_PCMCIA)$(CONFIG_PCCARD),)
+      FEATURES += pcmcia
+    endif
+    ifneq ($(CONFIG_VGA_CONSOLE)$(CONFIG_FB),)
+      FEATURES += display
+    endif
+    ifneq ($(CONFIG_RTC_CLASS),)
+      FEATURES += rtc
+    endif
+    ifneq ($(CONFIG_VIRTIO),)
+      FEATURES += virtio
+    endif
+    ifneq ($(CONFIG_CPU_MIPS32_R2),)
+      FEATURES += mips16
+    endif
+    FEATURES += $(foreach v,6 7,$(if $(CONFIG_CPU_V$(v)),arm_v$(v)))
+
+    # remove duplicates
+    FEATURES:=$(sort $(FEATURES))
+  endif
+endif
+
+CUR_SUBTARGET:=$(SUBTARGET)
+ifeq ($(SUBTARGETS),)
+  CUR_SUBTARGET := default
+endif
+
+define BuildTargets/DumpCurrent
+  .PHONY: dumpinfo
+  dumpinfo : export DESCRIPTION=$$(Target/Description)
+  dumpinfo:
+	@echo 'Target: $(TARGETID)'; \
+	 echo 'Target-Board: $(BOARD)'; \
+	 echo 'Target-Name: $(BOARDNAME)$(if $(SUBTARGETS),$(if $(SUBTARGET),))'; \
+	 echo 'Target-Arch: $(ARCH)'; \
+	 echo 'Target-Arch-Packages: $(if $(ARCH_PACKAGES),$(ARCH_PACKAGES),$(ARCH)$(if $(CPU_TYPE),_$(CPU_TYPE))$(if $(CPU_SUBTYPE),_$(CPU_SUBTYPE)))'; \
+	 echo 'Target-Features: $(FEATURES)'; \
+	 echo 'Target-Depends: $(DEPENDS)'; \
+	 echo 'Target-Optimization: $(if $(CFLAGS),$(CFLAGS),$(DEFAULT_CFLAGS))'; \
+	 echo 'CPU-Type: $(CPU_TYPE)$(if $(CPU_SUBTYPE),+$(CPU_SUBTYPE))'; \
+	 echo 'Linux-Version: $(LINUX_VERSION)'; \
+	$(if $(LINUX_TESTING_VERSION),echo 'Linux-Testing-Version: $(LINUX_TESTING_VERSION)';) \
+	 echo 'Linux-Release: $(LINUX_RELEASE)'; \
+	 echo 'Linux-Kernel-Arch: $(LINUX_KARCH)'; \
+	$(if $(SUBTARGET),,$(if $(DEFAULT_SUBTARGET), echo 'Default-Subtarget: $(DEFAULT_SUBTARGET)'; )) \
+	 echo 'Target-Description:'; \
+	 echo "$$$$DESCRIPTION"; \
+	 echo '@@'; \
+	 echo 'Default-Packages: $(DEFAULT_PACKAGES) $(call extra_packages,$(DEFAULT_PACKAGES))'; \
+	 $(DUMPINFO)
+	$(if $(CUR_SUBTARGET),$(SUBMAKE) -r --no-print-directory -C image -s DUMP=1 SUBTARGET=$(CUR_SUBTARGET))
+	$(if $(SUBTARGET),,@$(foreach SUBTARGET,$(SUBTARGETS),$(SUBMAKE) -s DUMP=1 SUBTARGET=$(SUBTARGET); ))
+endef
+
+include $(INCLUDE_DIR)/kernel.mk
+ifeq ($(TARGET_BUILD),1)
+  include $(INCLUDE_DIR)/kernel-build.mk
+  BuildTarget?=$(BuildKernel)
+endif
+
+endif #__target_inc

5.4/package/boot/arm-trusted-firmware-rockchip-vendor/Makefile

@@ -0,0 +1,81 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2022 ImmortalWrt.org
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=arm-trusted-firmware-rockchip-vendor
+PKG_RELEASE:=$(AUTORELEASE)
+
+PKG_SOURCE_PROTO:=git
+PKG_SOURCE_URL=https://github.com/rockchip-linux/rkbin.git
+PKG_SOURCE_DATE:=2022-08-01
+PKG_SOURCE_VERSION:=b0c100f1a260d807df450019774993c761beb79d
+PKG_MIRROR_HASH:=17723ac8f6ec446c759444ee29ba4fe544cebb3785e26d8e10c91c54b9df3f1a
+
+PKG_MAINTAINER:=Tianling Shen <cnsztl@immortalwrt.org>
+
+MAKE_PATH:=$(PKG_NAME)
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/arm-trusted-firmware-rockchip-vendor
+    SECTION:=boot
+    CATEGORY:=Boot Loaders
+    TITLE:=ARM Trusted Firmware for Rockchip
+endef
+
+define Package/arm-trusted-firmware-rk3328
+    $(Package/arm-trusted-firmware-rockchip-vendor)
+    DEPENDS:=@TARGET_rockchip_armv8
+    VARIANT:=rk3328
+endef
+
+define Package/arm-trusted-firmware-rk3399
+    $(Package/arm-trusted-firmware-rockchip-vendor)
+    DEPENDS:=@TARGET_rockchip_armv8
+    VARIANT:=rk3399
+endef
+
+define Package/arm-trusted-firmware-rk3566
+    $(Package/arm-trusted-firmware-rockchip-vendor)
+    DEPENDS:=@TARGET_rockchip_armv8
+    VARIANT:=rk3566
+endef
+
+define Package/arm-trusted-firmware-rk3568
+    $(Package/arm-trusted-firmware-rockchip-vendor)
+    DEPENDS:=@TARGET_rockchip_armv8
+    VARIANT:=rk3568
+endef
+
+define Build/Configure
+	$(SED) 's,$$$$(PKG_BUILD_DIR),$(PKG_BUILD_DIR),g' $(PKG_BUILD_DIR)/trust.ini
+	$(SED) 's,$$$$(VARIANT),$(BUILD_VARIANT),g' $(PKG_BUILD_DIR)/trust.ini
+	$(call Build/Configure/Default)
+endef
+
+define Build/Compile
+	$(CURDIR)/pack-firmware.sh build $(BUILD_VARIANT) '$(PKG_BUILD_DIR)'
+endef
+
+define Build/InstallDev
+	$(CURDIR)/pack-firmware.sh install $(BUILD_VARIANT) '$(PKG_BUILD_DIR)' '$(STAGING_DIR_IMAGE)'
+endef
+
+define Package/arm-trusted-firmware-rk3328/install
+endef
+
+define Package/arm-trusted-firmware-rk3399/install
+endef
+
+define Package/arm-trusted-firmware-rk3566/install
+endef
+
+define Package/arm-trusted-firmware-rk3568/install
+endef
+
+$(eval $(call BuildPackage,arm-trusted-firmware-rk3328))
+$(eval $(call BuildPackage,arm-trusted-firmware-rk3399))
+$(eval $(call BuildPackage,arm-trusted-firmware-rk3566))
+$(eval $(call BuildPackage,arm-trusted-firmware-rk3568))

5.4/package/boot/arm-trusted-firmware-rockchip-vendor/pack-firmware.sh

@@ -0,0 +1,60 @@
+#!/bin/bash
+# Copyright (C) 2021 ImmortalWrt.org
+
+ACTION="$1"
+VARIANT="$2"
+PKG_BUILD_DIR="$3"
+STAGING_DIR_IMAGE="$4"
+
+case "$VARIANT" in
+"rk3328")
+	ATF="rk33/rk322xh_bl31_v1.49.elf"
+	DDR="rk33/rk3328_ddr_333MHz_v1.19.bin"
+	LOADER="rk33/rk322xh_miniloader_v2.50.bin"
+	;;
+"rk3399")
+	ATF="rk33/rk3399_bl31_v1.35.elf"
+	DDR="rk33/rk3399_ddr_800MHz_v1.27.bin"
+	LOADER="rk33/rk3399_miniloader_v1.26.bin"
+	;;
+"rk3566")
+	ATF="rk35/rk3568_bl31_v1.34.elf"
+	DDR="rk35/rk3566_ddr_1056MHz_v1.13.bin"
+	;;
+"rk3568")
+	ATF="rk35/rk3568_bl31_v1.34.elf"
+	DDR="rk35/rk3568_ddr_1560MHz_v1.13.bin"
+	;;
+*)
+	echo -e "Not compatible with your platform: $VARIANT."
+	exit 1
+	;;
+esac
+
+set -x
+if [ "$ACTION" == "build" ]; then
+	case "$VARIANT" in
+	rk33*)
+		"$PKG_BUILD_DIR"/tools/mkimage -n "$VARIANT" -T "rksd" -d "$PKG_BUILD_DIR/bin/$DDR" "$PKG_BUILD_DIR/$VARIANT-idbloader.bin"
+		cat "$PKG_BUILD_DIR/bin/$LOADER" >> "$PKG_BUILD_DIR/$VARIANT-idbloader.bin"
+		"$PKG_BUILD_DIR/tools/trust_merger" --replace "bl31.elf" "$PKG_BUILD_DIR/bin/$ATF" "$PKG_BUILD_DIR/trust.ini"
+		;;
+	esac
+elif [ "$ACTION" == "install" ]; then
+	mkdir -p "$STAGING_DIR_IMAGE"
+	cp -fp "$PKG_BUILD_DIR/bin/$ATF" "$STAGING_DIR_IMAGE"/
+	case "$VARIANT" in
+	rk33*)
+		cp -fp "$PKG_BUILD_DIR/tools/loaderimage" "$STAGING_DIR_IMAGE"/
+		cp -fp "$PKG_BUILD_DIR/$VARIANT-idbloader.bin" "$STAGING_DIR_IMAGE"/
+		cp -fp "$PKG_BUILD_DIR/$VARIANT-trust.bin" "$STAGING_DIR_IMAGE"/
+		;;
+	rk35*)
+		cp -fp "$PKG_BUILD_DIR/bin/$DDR" "$STAGING_DIR_IMAGE"/
+		;;
+	esac
+else
+	echo -e "Unknown operation: $ACTION."
+	exit 1
+fi
+set +x

5.4/package/boot/arm-trusted-firmware-rockchip-vendor/src/trust.ini

@@ -0,0 +1,15 @@
+[VERSION]
+MAJOR=1
+MINOR=0
+[BL30_OPTION]
+SEC=0
+[BL31_OPTION]
+SEC=1
+PATH=bl31.elf
+ADDR=0x10000
+[BL32_OPTION]
+SEC=0
+[BL33_OPTION]
+SEC=0
+[OUTPUT]
+PATH=$(PKG_BUILD_DIR)/$(VARIANT)-trust.bin

5.4/package/boot/arm-trusted-firmware-rockchip/Makefile

@@ -0,0 +1,49 @@
+#
+# Copyright (C) 2020 Tobias Maedel <openwrt@tbspace.de>
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=arm-trusted-firmware-rockchip
+PKG_VERSION:=2.8
+PKG_RELEASE:=1
+
+PKG_SOURCE:=atf-v$(PKG_VERSION).tar.gz
+PKG_SOURCE_URL:=https://github.com/atf-builds/atf/releases/download/v$(PKG_VERSION)/atf-v$(PKG_VERSION).tar.gz?
+PKG_HASH:=61df69619fd611da9e43abf66be28d6d59722feef559587fad0ca4cd9e499758
+
+PKG_LICENSE:=BSD-3-Clause
+PKG_LICENSE_FILES:=license.md
+
+PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>
+
+MAKE_PATH:=$(PKG_NAME)
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/arm-trusted-firmware-rockchip
+    SECTION:=boot
+    CATEGORY:=Boot Loaders
+    TITLE:=ARM Trusted Firmware for Rockchip
+    DEPENDS:=@TARGET_rockchip_armv8
+endef
+
+define Build/Prepare
+	$(TAR) -C $(PKG_BUILD_DIR) -xf $(DL_DIR)/$(PKG_SOURCE)
+endef
+
+define Build/Compile
+endef
+
+define Build/InstallDev
+	$(INSTALL_DIR) -p $(STAGING_DIR_IMAGE)
+	$(CP) $(PKG_BUILD_DIR)/rk*.elf $(STAGING_DIR_IMAGE)/
+endef
+
+define Package/arm-trusted-firmware-rockchip/install
+endef
+
+$(eval $(call BuildPackage,arm-trusted-firmware-rockchip))

5.4/package/boot/uboot-rockchip/Makefile

@@ -0,0 +1,322 @@
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_VERSION:=2023.04
+PKG_RELEASE:=$(AUTORELEASE)
+
+PKG_HASH:=e31cac91545ff41b71cec5d8c22afd695645cd6e2a442ccdacacd60534069341
+
+PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>
+
+include $(INCLUDE_DIR)/u-boot.mk
+include $(INCLUDE_DIR)/package.mk
+
+define U-Boot/Default
+  BUILD_TARGET:=rockchip
+  UENV:=default
+  HIDDEN:=1
+endef
+
+
+# RK3328 boards
+
+define U-Boot/nanopi-r2c-rk3328
+  BUILD_SUBTARGET:=armv8
+  NAME:=NanoPi R2C
+  BUILD_DEVICES:= \
+    friendlyarm_nanopi-r2c
+  DEPENDS:=+PACKAGE_u-boot-nanopi-r2c-rk3328:arm-trusted-firmware-rk3328
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk322xh_bl31_v1.49.elf
+  USE_RKBIN:=1
+endef
+
+define U-Boot/nanopi-r2s-rk3328
+  BUILD_SUBTARGET:=armv8
+  NAME:=NanoPi R2S
+  BUILD_DEVICES:= \
+    friendlyarm_nanopi-r2s \
+    friendlyarm_nanopi-neo3
+  DEPENDS:=+PACKAGE_u-boot-nanopi-r2s-rk3328:arm-trusted-firmware-rk3328
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk322xh_bl31_v1.49.elf
+  USE_RKBIN:=1
+endef
+
+define U-Boot/orangepi-r1-plus-rk3328
+  BUILD_SUBTARGET:=armv8
+  NAME:=Orange Pi R1 Plus
+  BUILD_DEVICES:= \
+    xunlong_orangepi-r1-plus
+  DEPENDS:=+PACKAGE_u-boot-orangepi-r1-plus-rk3328:arm-trusted-firmware-rk3328
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk322xh_bl31_v1.49.elf
+  USE_RKBIN:=1
+endef
+
+define U-Boot/orangepi-r1-plus-lts-rk3328
+  BUILD_SUBTARGET:=armv8
+  NAME:=Orange Pi R1 Plus LTS
+  BUILD_DEVICES:= \
+    xunlong_orangepi-r1-plus-lts
+  DEPENDS:=+PACKAGE_u-boot-orangepi-r1-plus-lts-rk3328:arm-trusted-firmware-rk3328
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk322xh_bl31_v1.49.elf
+  USE_RKBIN:=1
+endef
+
+
+# RK3399 boards
+
+define U-Boot/guangmiao-g4c-rk3399
+  BUILD_SUBTARGET:=armv8
+  NAME:=GuangMiao G4C
+  BUILD_DEVICES:= \
+    sharevdi_guangmiao-g4c
+  DEPENDS:=+PACKAGE_u-boot-guangmiao-g4c-rk3399:arm-trusted-firmware-rockchip
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
+  ATF:=rk3399_bl31.elf
+endef
+
+define U-Boot/nanopi-r4s-rk3399
+  BUILD_SUBTARGET:=armv8
+  NAME:=NanoPi R4S
+  BUILD_DEVICES:= \
+    friendlyarm_nanopi-r4s
+  DEPENDS:=+PACKAGE_u-boot-nanopi-r4s-rk3399:arm-trusted-firmware-rk3399
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3399_bl31_v1.35.elf
+  USE_RKBIN:=1
+endef
+
+define U-Boot/nanopi-r4se-rk3399
+  BUILD_SUBTARGET:=armv8
+  NAME:=NanoPi R4SE
+  BUILD_DEVICES:= \
+    friendlyarm_nanopi-r4se
+  DEPENDS:=+PACKAGE_u-boot-nanopi-r4se-rk3399:arm-trusted-firmware-rk3399
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3399_bl31_v1.35.elf
+  USE_RKBIN:=1
+endef
+
+define U-Boot/rock-pi-4-rk3399
+  BUILD_SUBTARGET:=armv8
+  NAME:=Rock Pi 4
+  BUILD_DEVICES:= \
+    radxa_rock-pi-4
+  DEPENDS:=+PACKAGE_u-boot-rock-pi-4-rk3399:arm-trusted-firmware-rockchip
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
+  ATF:=rk3399_bl31.elf
+endef
+
+define U-Boot/rockpro64-rk3399
+  BUILD_SUBTARGET:=armv8
+  NAME:=RockPro64
+  BUILD_DEVICES:= \
+    pine64_rockpro64
+  DEPENDS:=+PACKAGE_u-boot-rockpro64-rk3399:arm-trusted-firmware-rockchip
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
+  ATF:=rk3399_bl31.elf
+endef
+
+define U-Boot/rongpin-king3399-rk3399
+  BUILD_SUBTARGET:=armv8
+  NAME:=Rongpin King3399
+  BUILD_DEVICES:= \
+    rongpin_king3399
+  DEPENDS:=+PACKAGE_u-boot-rongpin-king3399-rk3399:arm-trusted-firmware-rk3399
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3399_bl31_v1.35.elf
+  USE_RKBIN:=1
+endef
+
+define U-Boot/rocktech-mpc1903-rk3399
+  BUILD_SUBTARGET:=armv8
+  NAME:=Rocktech MPC1903
+  BUILD_DEVICES:= \
+    rocktech_mpc1903
+  DEPENDS:=+PACKAGE_u-boot-rocktech-mpc1903-rk3399:arm-trusted-firmware-rk3399
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3399_bl31_v1.35.elf
+  USE_RKBIN:=1
+endef
+
+define U-Boot/sharevdi-h3399pc-rk3399
+  BUILD_SUBTARGET:=armv8
+  NAME:=SHAREVDI H3399PC
+  BUILD_DEVICES:= \
+    sharevdi_h3399pc
+  DEPENDS:=+PACKAGE_u-boot-sharevdi-h3399pc-rk3399:arm-trusted-firmware-rk3399
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3399_bl31_v1.35.elf
+  USE_RKBIN:=1
+endef
+
+define U-Boot/dilusense-dlfr100-rk3399
+  BUILD_SUBTARGET:=armv8
+  NAME:=Dilusense DLFR100
+  BUILD_DEVICES:= \
+    dilusense_dlfr100
+  DEPENDS:=+PACKAGE_u-boot-dilusense-dlfr100-rk3399:arm-trusted-firmware-rk3399
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3399_bl31_v1.35.elf
+  USE_RKBIN:=1
+endef
+
+# RK3568 boards
+
+define U-Boot/mrkaio-m68s-rk3568
+  BUILD_SUBTARGET:=armv8
+  NAME:=Mrkaio M68S
+  BUILD_DEVICES:= \
+    ezpro_mrkaio-m68s \
+    ezpro_mrkaio-m68s-plus
+  DEPENDS:=+PACKAGE_u-boot-mrkaio-m68s-rk3568:arm-trusted-firmware-rk3568
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3568_bl31_v1.34.elf
+  DDR:=rk3568_ddr_1560MHz_v1.13.bin
+endef
+
+define U-Boot/nanopi-r5s-rk3568
+  BUILD_SUBTARGET:=armv8
+  NAME:=NanoPi R5S
+  BUILD_DEVICES:= \
+    friendlyarm_nanopi-r5c \
+    friendlyarm_nanopi-r5s
+  DEPENDS:=+PACKAGE_u-boot-nanopi-r5s-rk3568:arm-trusted-firmware-rk3568
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3568_bl31_v1.34.elf
+  DDR:=rk3568_ddr_1560MHz_v1.13.bin
+endef
+
+define U-Boot/opc-h68k-rk3568
+  BUILD_SUBTARGET:=armv8
+  NAME:=OPC-H68K Board
+  BUILD_DEVICES:= \
+    hinlink_opc-h66k \
+    hinlink_opc-h68k \
+    hinlink_opc-h69k
+  DEPENDS:=+PACKAGE_u-boot-opc-h68k-rk3568:arm-trusted-firmware-rk3568
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3568_bl31_v1.34.elf
+  DDR:=rk3568_ddr_1560MHz_v1.13.bin
+endef
+
+define U-Boot/photonicat-rk3568
+  BUILD_SUBTARGET:=armv8
+  NAME:=Ariaboard Photonicat
+  BUILD_DEVICES:= \
+    ariaboard_photonicat
+  DEPENDS:=+PACKAGE_u-boot-photonicat-rk3568:arm-trusted-firmware-rk3568
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3568_bl31_v1.34.elf
+  DDR:=rk3568_ddr_1560MHz_v1.13.bin
+endef
+
+define U-Boot/radxa-e25-rk3568
+  BUILD_SUBTARGET:=armv8
+  NAME:=Radxa E25
+  BUILD_DEVICES:= \
+    radxa_e25
+  DEPENDS:=+PACKAGE_u-boot-radxa-e25-rk3568:arm-trusted-firmware-rk3568
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3568_bl31_v1.34.elf
+  DDR:=rk3568_ddr_1560MHz_v1.13.bin
+endef
+
+define U-Boot/rock-3a-rk3568
+  BUILD_SUBTARGET:=armv8
+  NAME:=ROCK3 Model A
+  BUILD_DEVICES:= \
+    radxa_rock-3a
+  DEPENDS:=+PACKAGE_u-boot-rock-3a-rk3568:arm-trusted-firmware-rk3568
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3568_bl31_v1.34.elf
+  DDR:=rk3568_ddr_1560MHz_v1.13.bin
+endef
+
+define U-Boot/r66s-rk3568
+  BUILD_SUBTARGET:=armv8
+  NAME:=R66S/R68S
+  BUILD_DEVICES:= \
+    fastrhino_r66s \
+    fastrhino_r68s
+  DEPENDS:=+PACKAGE_u-boot-r66s-rk3568:arm-trusted-firmware-rk3568
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3568_bl31_v1.34.elf
+  DDR:=rk3568_ddr_1560MHz_v1.13.bin
+endef
+
+define U-Boot/station-p2-rk3568
+  BUILD_SUBTARGET:=armv8
+  NAME:=StationP2
+  BUILD_DEVICES:= \
+       firefly_station-p2
+  DEPENDS:=+PACKAGE_u-boot-station-p2-rk3568:arm-trusted-firmware-rk3568
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3568_bl31_v1.34.elf
+  DDR:=rk3568_ddr_1560MHz_v1.13.bin
+endef
+
+UBOOT_TARGETS := \
+  mrkaio-m68s-rk3568 \
+  opc-h68k-rk3568 \
+  photonicat-rk3568 \
+  radxa-e25-rk3568 \
+  rock-3a-rk3568 \
+  r66s-rk3568 \
+  station-p2-rk3568 \
+  sharevdi-h3399pc-rk3399 \
+  guangmiao-g4c-rk3399 \
+  nanopi-r4s-rk3399 \
+  nanopi-r4se-rk3399 \
+  nanopi-r5s-rk3568 \
+  rock-pi-4-rk3399 \
+  rockpro64-rk3399 \
+  rongpin-king3399-rk3399 \
+  rocktech-mpc1903-rk3399 \
+  dilusense-dlfr100-rk3399 \
+  nanopi-r2c-rk3328 \
+  nanopi-r2s-rk3328 \
+  orangepi-r1-plus-rk3328 \
+  orangepi-r1-plus-lts-rk3328
+
+UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
+
+UBOOT_MAKE_FLAGS += \
+  PATH=$(STAGING_DIR_HOST)/bin:$(PATH) \
+  BL31=$(STAGING_DIR_IMAGE)/$(ATF)
+
+ifeq ($(CONFIG_PACKAGE_arm-trusted-firmware-rk3568),y)
+UBOOT_MAKE_FLAGS += \
+  ROCKCHIP_TPL=$(STAGING_DIR_IMAGE)/$(DDR)
+endif
+
+define Build/Configure
+	$(call Build/Configure/U-Boot)
+
+	$(SED) 's/CONFIG_TOOLS_LIBCRYPTO=y/# CONFIG_TOOLS_LIBCRYPTO is not set/' $(PKG_BUILD_DIR)/.config
+	$(SED) 's#CONFIG_MKIMAGE_DTC_PATH=.*#CONFIG_MKIMAGE_DTC_PATH="$(PKG_BUILD_DIR)/scripts/dtc/dtc"#g' $(PKG_BUILD_DIR)/.config
+	echo 'CONFIG_IDENT_STRING=" OpenWrt"' >> $(PKG_BUILD_DIR)/.config
+endef
+
+define Build/InstallDev
+	$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
+ifneq ($(USE_RKBIN),)
+	$(STAGING_DIR_IMAGE)/loaderimage --pack --uboot $(PKG_BUILD_DIR)/u-boot-dtb.bin $(PKG_BUILD_DIR)/uboot.img 0x200000
+	$(CP) $(PKG_BUILD_DIR)/uboot.img $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-uboot.img
+else
+	$(CP) $(PKG_BUILD_DIR)/idbloader.img $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-idbloader.img
+	$(CP) $(PKG_BUILD_DIR)/u-boot.itb $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot.itb
+endif
+endef
+
+define Package/u-boot/install/default
+endef
+
+$(eval $(call BuildPackage/U-Boot))

5.4/package/boot/uboot-rockchip/patches/001-Revert-rockchip-rk3399-Drop-altbootcmd.patch

@@ -0,0 +1,26 @@
+From 1ab5d2b9cf1b9c1c7ccb58243992fb163c64a14d Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@immortalwrt.org>
+Date: Wed, 5 Apr 2023 21:06:19 +0800
+Subject: [PATCH 1/3] Revert "rockchip: rk3399: Drop altbootcmd"
+
+This reverts commit d00fb6421c8fad639f608f55f9291305061ffb17.
+
+Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
+---
+ include/configs/rk3399_common.h | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/include/configs/rk3399_common.h
++++ b/include/configs/rk3399_common.h
+@@ -52,7 +52,10 @@
+ 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ 	"partitions=" PARTS_DEFAULT \
+ 	ROCKCHIP_DEVICE_SETTINGS \
+-	"boot_targets=" BOOT_TARGETS "\0"
++	"boot_targets=" BOOT_TARGETS "\0" \
++	"altbootcmd=" \
++		"setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
++		"run distro_bootcmd\0"
+ 
+ #endif
+ 

5.4/package/boot/uboot-rockchip/patches/002-Revert-rockchip-Disable-DISTRO_DEFAULTS-for-rk3399-b.patch

@@ -0,0 +1,24 @@
+From 535b09f84be0660ef5e85431328746e74cc8e6b7 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@immortalwrt.org>
+Date: Wed, 5 Apr 2023 21:08:21 +0800
+Subject: [PATCH 2/3] Revert "rockchip: Disable DISTRO_DEFAULTS for rk3399
+ boards"
+
+This reverts commit 2b9cc7845cf96955db363519faab9a78e166c453.
+
+Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
+---
+ arch/arm/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -1955,7 +1955,7 @@ config ARCH_ROCKCHIP
+ 	imply ADC
+ 	imply CMD_DM
+ 	imply DEBUG_UART_BOARD_INIT
+-	imply DISTRO_DEFAULTS if !ROCKCHIP_RK3399
++	imply DISTRO_DEFAULTS
+ 	imply BOOTSTD_DEFAULTS if !DISTRO_DEFAULTS
+ 	imply FAT_WRITE
+ 	imply SARADC_ROCKCHIP

5.4/package/boot/uboot-rockchip/patches/003-Revert-rockchip-Convert-rockpro64-rk3399-to-use-stan.patch

@@ -0,0 +1,50 @@
+From 93ac12531f7c672ef1fe7689cf8b67ec2372efef Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@immortalwrt.org>
+Date: Wed, 5 Apr 2023 21:08:27 +0800
+Subject: [PATCH 3/3] Revert "rockchip: Convert rockpro64-rk3399 to use
+ standard boot"
+
+This reverts commit 3891c68ef50eda38d78c95ecd03aed030aa6bb53.
+
+Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
+---
+ include/configs/rk3399_common.h   | 5 ++++-
+ include/configs/rockchip-common.h | 2 --
+ 2 files changed, 4 insertions(+), 3 deletions(-)
+
+--- a/include/configs/rk3399_common.h
++++ b/include/configs/rk3399_common.h
+@@ -47,12 +47,15 @@
+ #define ROCKCHIP_DEVICE_SETTINGS
+ #endif
+ 
++#include <config_distro_bootcmd.h>
++#include <environment/distro/sf.h>
+ #define CFG_EXTRA_ENV_SETTINGS \
+ 	ENV_MEM_LAYOUT_SETTINGS \
+ 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ 	"partitions=" PARTS_DEFAULT \
+ 	ROCKCHIP_DEVICE_SETTINGS \
+-	"boot_targets=" BOOT_TARGETS "\0" \
++	BOOTENV \
++	BOOTENV_SF \
+ 	"altbootcmd=" \
+ 		"setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
+ 		"run distro_bootcmd\0"
+--- a/include/configs/rockchip-common.h
++++ b/include/configs/rockchip-common.h
+@@ -67,14 +67,12 @@
+ 	BOOT_TARGET_PXE(func) \
+ 	BOOT_TARGET_DHCP(func) \
+ 	BOOT_TARGET_SF(func)
+-#define BOOT_TARGETS	"mmc1 mmc0 nvme scsi usb pxe dhcp spi"
+ #else
+ #define BOOT_TARGET_DEVICES(func) \
+ 	BOOT_TARGET_MMC(func) \
+ 	BOOT_TARGET_USB(func) \
+ 	BOOT_TARGET_PXE(func) \
+ 	BOOT_TARGET_DHCP(func)
+-#define BOOT_TARGETS	"mmc1 mmc0 usb pxe dhcp"
+ #endif
+ 
+ #ifdef CONFIG_ARM64

5.4/package/boot/uboot-rockchip/patches/015-uboot-add-NanoPi-R5S-board.patch

@@ -0,0 +1,169 @@
+From 872197ee382688701f85fc486a14dc02d2113811 Mon Sep 17 00:00:00 2001
+From: Marty Jones <mj8263788@gmail.com>
+Date: Tue, 31 May 2022 00:51:23 -0400
+Subject: [PATCH] uboot: add NanoPi R5S board
+
+Signed-off-by: Marty Jones <mj8263788@gmail.com>
+---
+ arch/arm/dts/Makefile                         |  1 +
+ arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi    | 25 +++++
+ arch/arm/dts/rk3568-nanopi-r5s.dts            |  9 ++
+ arch/arm/mach-rockchip/rk3568/Kconfig         |  6 ++
+ board/friendlyelec/nanopi-r5s-rk3568/Kconfig   | 15 +++
+ board/friendlyelec/nanopi-r5s-rk3568/Makefile  |  4 +
+ .../nanopi-r5s-rk3568/nanopi-r5s-rk3568.c     |  4 +
+ configs/nanopi-r5s-rk3568_defconfig           | 97 +++++++++++++++++++
+ include/configs/nanopi-r5s-rk3568.h           | 17 ++++
+ 9 files changed, 178 insertions(+)
+ create mode 100644 arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
+ create mode 100644 arch/arm/dts/rk3568-nanopi-r5s.dts
+ create mode 100644 board/friendlyelec/nanopi-r5s-rk3568/Kconfig
+ create mode 100644 board/friendlyelec/nanopi-r5s-rk3568/Makefile
+ create mode 100644 board/friendlyelec/nanopi-r5s-rk3568/nanopi-r5s-rk3568.c
+ create mode 100644 configs/nanopi-r5s-rk3568_defconfig
+ create mode 100644 include/configs/nanopi-r5s-rk3568.h
+
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -166,6 +166,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ 
+ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
+ 	rk3568-evb.dtb \
++	rk3568-nanopi-r5s.dtb \
+ 	rk3566-radxa-cm3-io.dtb \
+ 	rk3568-rock-3a.dtb
+ 
+--- /dev/null
++++ b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
+@@ -0,0 +1,25 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
++ */
++
++#include "rk356x-u-boot.dtsi"
++
++/ {
++	chosen {
++		stdout-path = &uart2;
++		u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
++	};
++};
++
++&sdmmc0 {
++	bus-width = <4>;
++	u-boot,dm-spl;
++	u-boot,spl-fifo-mode;
++};
++
++&uart2 {
++	clock-frequency = <24000000>;
++	u-boot,dm-spl;
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3568-nanopi-r5s.dts
+@@ -0,0 +1,9 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++#include "rk3568-evb.dts"
++
++/ {
++	model = "FriendlyElec NanoPi R5S";
++	compatible = "friendlyelec,nanopi-r5s", "rockchip,rk3568";
++};
+--- /dev/null
++++ b/configs/nanopi-r5s-rk3568_defconfig
+@@ -0,0 +1,91 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00a00000
++CONFIG_SPL_LIBCOMMON_SUPPORT=y
++CONFIG_SPL_LIBGENERIC_SUPPORT=y
++CONFIG_NR_DRAM_BANKS=2
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
++CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5s"
++CONFIG_ROCKCHIP_RK3568=y
++CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
++CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
++CONFIG_SPL_BOARD_INIT=y
++CONFIG_SPL_MMC=y
++CONFIG_SPL_SERIAL=y
++CONFIG_SPL_STACK_R_ADDR=0x600000
++CONFIG_TARGET_EVB_RK3568=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFE660000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-nanopi-r5s.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x4000000
++CONFIG_SPL_BSS_MAX_SIZE=0x4000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_ADC=y
++CONFIG_SPL_ATF=y
++CONFIG_CMD_ADC=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_CMD_SETEXPR is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SPL_CLK=y
++CONFIG_CLK_SCMI=y
++CONFIG_RESET_SCMI=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_SPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/018-driver-Makefile-support-adc-in-SPL.patch

@@ -0,0 +1,35 @@
+From 2d7c904f271ffd19086cafe7cd6548ec5b1a5a83 Mon Sep 17 00:00:00 2001
+From: Jason Zhu <jason.zhu@rock-chips.com>
+Date: Thu, 12 Mar 2020 15:04:51 +0800
+Subject: [PATCH] driver: Makefile: support adc in SPL
+
+Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
+Change-Id: I915becbf9597aa070001d3368d8daf9079565fc9
+---
+ common/spl/Kconfig | 6 ++++++
+ drivers/Makefile   | 2 +-
+ 2 files changed, 7 insertions(+), 1 deletion(-)
+
+--- a/common/spl/Kconfig
++++ b/common/spl/Kconfig
+@@ -587,6 +587,11 @@ config SPL_FIT_IMAGE_TINY
+ 	  ensure this information is available to the next image
+ 	  invoked).
+ 
++config SPL_ADC
++	bool "Support ADC drivers in SPL"
++	help
++	  Enable ADC drivers in SPL.
++
+ config SPL_CACHE
+ 	bool "Support CACHE drivers"
+ 	help
+--- a/drivers/Makefile
++++ b/drivers/Makefile
+@@ -1,5 +1,6 @@
+ # SPDX-License-Identifier: GPL-2.0+
+ 
++obj-$(CONFIG_$(SPL_)ADC) += adc/
+ obj-$(CONFIG_$(SPL_TPL_)BLK) += block/
+ obj-$(CONFIG_$(SPL_TPL_)BOOTCOUNT_LIMIT) += bootcount/
+ obj-$(CONFIG_$(SPL_TPL_)BUTTON) += button/

5.4/package/boot/uboot-rockchip/patches/019-rockchip-handle-bootrom-mode-in-spl.patch

@@ -0,0 +1,144 @@
+From 79cb33b9da0c9475486ca0759341057854b25e38 Mon Sep 17 00:00:00 2001
+From: Peter Geis <pgwipeout@gmail.com>
+Date: Sun, 20 Feb 2022 07:57:50 -0500
+Subject: [PATCH] rockchip: handle bootrom mode in spl
+
+Signed-off-by: Peter Geis <pgwipeout@gmail.com>
+---
+ arch/arm/mach-rockchip/Makefile        |  6 +--
+ arch/arm/mach-rockchip/boot_mode.c     |  4 +-
+ arch/arm/mach-rockchip/rk3568/rk3568.c | 54 +++++++++++++++++++++++++-
+ 3 files changed, 59 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/mach-rockchip/Makefile
++++ b/arch/arm/mach-rockchip/Makefile
+@@ -15,13 +15,13 @@ obj-tpl-$(CONFIG_ROCKCHIP_PX30) += px30-board-tpl.o
+ 
+ obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
+ 
+-ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+-
+ # Always include boot_mode.o, as we bypass it (i.e. turn it off)
+ # inside of boot_mode.c when CONFIG_ROCKCHIP_BOOT_MODE_REG is 0.  This way,
+ # we can have the preprocessor correctly recognise both 0x0 and 0
+ # meaning "turn it off".
+-obj-y += boot_mode.o
++obj-$(CONFIG_ARCH_ROCKCHIP) += boot_mode.o
++
++ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+ obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o
+ obj-$(CONFIG_MISC_INIT_R) += misc.o
+ endif
+--- a/arch/arm/mach-rockchip/boot_mode.c
++++ b/arch/arm/mach-rockchip/boot_mode.c
+@@ -51,7 +51,7 @@ __weak int rockchip_dnl_key_pressed(void)
+ 	ret = -ENODEV;
+ 	uclass_foreach_dev(dev, uc) {
+ 		if (!strncmp(dev->name, "saradc", 6)) {
+-			ret = adc_channel_single_shot(dev->name, 1, &val);
++			ret = adc_channel_single_shot(dev->name, 0, &val);
+ 			break;
+ 		}
+ 	}
+@@ -89,6 +89,7 @@ int setup_boot_mode(void)
+ 	boot_mode = readl(reg);
+ 	debug("%s: boot mode 0x%08x\n", __func__, boot_mode);
+ 
++#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+ 	/* Clear boot mode */
+ 	writel(BOOT_NORMAL, reg);
+ 
+@@ -102,6 +103,7 @@ int setup_boot_mode(void)
+ 		env_set("preboot", "setenv preboot; ums mmc 0");
+ 		break;
+ 	}
++#endif
+ 
+ 	return 0;
+ }
+--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
++++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
+@@ -9,19 +9,30 @@
+ #include <asm/armv8/mmu.h>
+ #include <asm/io.h>
+ #include <asm/arch-rockchip/bootrom.h>
++#include <asm/arch-rockchip/boot_mode.h>
+ #include <asm/arch-rockchip/grf_rk3568.h>
+ #include <asm/arch-rockchip/hardware.h>
+ #include <dt-bindings/clock/rk3568-cru.h>
+ 
+ #define PMUGRF_BASE			0xfdc20000
+ #define GRF_BASE			0xfdc60000
++#define GRF_GPIO1B_IOMUX_H		0x0c
++#define GRF_GPIO1C_IOMUX_L		0x10
++#define GRF_GPIO1C_IOMUX_H		0x14
++#define GRF_GPIO1D_IOMUX_L		0x18
++#define GRF_GPIO1D_IOMUX_H		0x1c
++#define GRF_GPIO2A_IOMUX_L		0x20
+ #define GRF_GPIO1B_DS_2			0x218
+ #define GRF_GPIO1B_DS_3			0x21c
+ #define GRF_GPIO1C_DS_0			0x220
+ #define GRF_GPIO1C_DS_1			0x224
+ #define GRF_GPIO1C_DS_2			0x228
+ #define GRF_GPIO1C_DS_3			0x22c
+-#define SGRF_BASE			0xFDD18000
++#define GRF_GPIO1D_DS_0			0x230
++#define GRF_GPIO1D_DS_1			0x234
++#define GRF_GPIO1D_DS_2			0x238
++#define SGRF_BASE			0xfdd18000
++#define SGRF_SOC_CON3			0x0c
+ #define SGRF_SOC_CON4			0x10
+ #define EMMC_HPROT_SECURE_CTRL		0x03
+ #define SDMMC0_HPROT_SECURE_CTRL	0x01
+@@ -133,6 +144,24 @@ int arch_cpu_init(void)
+ 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1);
+ 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
+ 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
++
++	/* emmc, sfc, and sdmmc iomux */
++	writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1B_IOMUX_H);
++	writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1C_IOMUX_L);
++	writel((0x7777UL << 16) | (0x2111), GRF_BASE + GRF_GPIO1C_IOMUX_H);
++	writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1D_IOMUX_L);
++	writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1D_IOMUX_H);
++	writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO2A_IOMUX_L);
++
++	/* set the fspi d0~3 cs0 to level 2 */
++	writel(0x3f000700, GRF_BASE + GRF_GPIO1C_DS_3);
++	writel(0x3f000700, GRF_BASE + GRF_GPIO1D_DS_0);
++	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1D_DS_1);
++	writel(0x003f0007, GRF_BASE + GRF_GPIO1D_DS_2);
++
++	/* Set the fspi to secure */
++	writel(((0x1 << 14) << 16) | (0x0 << 14), SGRF_BASE + SGRF_SOC_CON3);
++
+ #endif
+ 	return 0;
+ }
+@@ -164,3 +193,26 @@ int ft_system_setup(void *blob, struct bd_info *bd)
+ #endif
+ 	return 0;
+ }
++
++#ifdef CONFIG_SPL_BUILD
++
++void __weak led_setup(void)
++{
++}
++
++void spl_board_init(void)
++{
++	led_setup();
++
++#if defined(SPL_DM_REGULATOR)
++	/*
++	 * Turning the eMMC and SPI back on (if disabled via the Qseven
++	 * BIOS_ENABLE) signal is done through a always-on regulator).
++	 */
++	if (regulators_enable_boot_on(false))
++		debug("%s: Cannot enable boot on regulator\n", __func__);
++#endif
++
++	setup_boot_mode();
++}
++#endif

5.4/package/boot/uboot-rockchip/patches/020-update-rock-3a-defconfig.patch

@@ -0,0 +1,45 @@
+--- a/configs/rock-3a-rk3568_defconfig
++++ b/configs/rock-3a-rk3568_defconfig
+@@ -39,6 +39,8 @@
+ CONFIG_CMD_GPT=y
+ CONFIG_CMD_I2C=y
+ CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_REGULATOR=y
+ # CONFIG_CMD_SETEXPR is not set
+ # CONFIG_SPL_DOS_PARTITION is not set
+ CONFIG_SPL_OF_CONTROL=y
+@@ -47,6 +49,8 @@
+ CONFIG_SPL_REGMAP=y
+ CONFIG_SPL_SYSCON=y
+ CONFIG_SPL_CLK=y
++CONFIG_CLK_SCMI=y
++CONFIG_RESET_SCMI=y
+ CONFIG_ROCKCHIP_GPIO=y
+ CONFIG_SYS_I2C_ROCKCHIP=y
+ CONFIG_MISC=y
+@@ -61,7 +65,11 @@
+ CONFIG_DM_PMIC=y
+ CONFIG_PMIC_RK8XX=y
+ CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+ CONFIG_REGULATOR_PWM=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
+ CONFIG_REGULATOR_RK8XX=y
+ CONFIG_PWM_ROCKCHIP=y
+ CONFIG_SPL_RAM=y
+@@ -69,5 +77,11 @@
+ CONFIG_DEBUG_UART_SHIFT=2
+ CONFIG_SYS_NS16550_MEM32=y
+ CONFIG_SYSRESET=y
+-# CONFIG_BINMAN_FDT is not set
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
+ CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/106-no-kwbimage.patch

@@ -0,0 +1,10 @@
+--- a/tools/Makefile
++++ b/tools/Makefile
+@@ -113,7 +113,6 @@ dumpimage-mkimage-objs := aisimage.o \
+ 			imximage.o \
+ 			imx8image.o \
+ 			imx8mimage.o \
+-			kwbimage.o \
+ 			lib/md5.o \
+ 			lpc32xximage.o \
+ 			mxsimage.o \

5.4/package/boot/uboot-rockchip/patches/110-force-pylibfdt-build.patch

@@ -0,0 +1,30 @@
+--- a/Makefile
++++ b/Makefile
+@@ -2000,26 +2000,7 @@ endif
+ # Check dtc and pylibfdt, if DTC is provided, else build them
+ PHONY += scripts_dtc
+ scripts_dtc: scripts_basic
+-	$(Q)if test "$(DTC)" = "$(DTC_INTREE)"; then \
+-		$(MAKE) $(build)=scripts/dtc; \
+-	else \
+-		if ! $(DTC) -v >/dev/null; then \
+-			echo '*** Failed to check dtc version: $(DTC)'; \
+-			false; \
+-		else \
+-			if test "$(call dtc-version)" -lt $(DTC_MIN_VERSION); then \
+-				echo '*** Your dtc is too old, please upgrade to dtc $(DTC_MIN_VERSION) or newer'; \
+-				false; \
+-			else \
+-				if [ -n "$(CONFIG_PYLIBFDT)" ]; then \
+-					if ! echo "import libfdt" | $(PYTHON3) 2>/dev/null; then \
+-						echo '*** pylibfdt does not seem to be available with $(PYTHON3)'; \
+-						false; \
+-					fi; \
+-				fi; \
+-			fi; \
+-		fi; \
+-	fi
++	$(MAKE) $(build)=scripts/dtc
+ 
+ # ---------------------------------------------------------------------------
+ quiet_cmd_cpp_lds = LDS     $@

5.4/package/boot/uboot-rockchip/patches/111-fix-mkimage-host-build.patch

@@ -0,0 +1,24 @@
+--- a/tools/image-host.c
++++ b/tools/image-host.c
+@@ -1125,6 +1125,7 @@ static int fit_config_add_verification_d
+  * 2) get public key (X509_get_pubkey)
+  * 3) provide der format (d2i_RSAPublicKey)
+  */
++#ifdef CONFIG_TOOLS_LIBCRYPTO
+ static int read_pub_key(const char *keydir, const void *name,
+ 			unsigned char **pubkey, int *pubkey_len)
+ {
+@@ -1178,6 +1179,13 @@ err_cert:
+ 	fclose(f);
+ 	return ret;
+ }
++#else
++static int read_pub_key(const char *keydir, const void *name,
++			unsigned char **pubkey, int *pubkey_len)
++{
++	return -ENOSYS;
++}
++#endif
+ 
+ int fit_pre_load_data(const char *keydir, void *keydest, void *fit)
+ {

5.4/package/boot/uboot-rockchip/patches/120-clk-scmi-Add-Kconfig-option-for-SPL.patch

@@ -0,0 +1,72 @@
+From 734b9d9e33919efbec63b1bfe48f25ce16dbd59a Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Fri, 17 Mar 2023 19:16:45 +0000
+Subject: [PATCH] clk: scmi: Add Kconfig option for SPL
+
+Building U-Boot SPL with CLK_SCMI and SCMI_FIRMWARE Kconfig options
+enabled and SPL_FIRMWARE disabled result in the following error.
+
+  drivers/clk/clk_scmi.o: in function `scmi_clk_gate':
+  drivers/clk/clk_scmi.c:84: undefined reference to `devm_scmi_process_msg'
+  drivers/clk/clk_scmi.c:88: undefined reference to `scmi_to_linux_errno'
+  drivers/clk/clk_scmi.o: in function `scmi_clk_get_rate':
+  drivers/clk/clk_scmi.c:113: undefined reference to `devm_scmi_process_msg'
+  drivers/clk/clk_scmi.c:117: undefined reference to `scmi_to_linux_errno'
+  drivers/clk/clk_scmi.o: in function `scmi_clk_set_rate':
+  drivers/clk/clk_scmi.c:139: undefined reference to `devm_scmi_process_msg'
+  drivers/clk/clk_scmi.c:143: undefined reference to `scmi_to_linux_errno'
+  drivers/clk/clk_scmi.o: in function `scmi_clk_probe':
+  drivers/clk/clk_scmi.c:157: undefined reference to `devm_scmi_of_get_channel'
+  make[1]: *** [scripts/Makefile.spl:527: spl/u-boot-spl] Error 1
+  make: *** [Makefile:2043: spl/u-boot-spl] Error 2
+
+Add Kconfig option so that CLK_SCMI can be disabled in SPL to fix this.
+
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
+Link: https://patchwork.ozlabs.org/project/uboot/patch/20230317191638.2558279-2-jonas@kwiboo.se/
+---
+ drivers/clk/Kconfig                       | 8 ++++++++
+ drivers/clk/Makefile                      | 2 +-
+ drivers/firmware/scmi/scmi_agent-uclass.c | 2 +-
+ 3 files changed, 10 insertions(+), 2 deletions(-)
+
+--- a/drivers/clk/Kconfig
++++ b/drivers/clk/Kconfig
+@@ -166,6 +166,14 @@ config CLK_SCMI
+ 	  by a SCMI agent based on SCMI clock protocol communication
+ 	  with a SCMI server.
+ 
++config SPL_CLK_SCMI
++	bool "Enable SCMI clock driver in SPL"
++	depends on SCMI_FIRMWARE && SPL_FIRMWARE
++	help
++	  Enable this option if you want to support clock devices exposed
++	  by a SCMI agent based on SCMI clock protocol communication
++	  with a SCMI server in SPL.
++
+ config CLK_HSDK
+ 	bool "Enable cgu clock driver for HSDK boards"
+ 	depends on CLK && TARGET_HSDK
+--- a/drivers/clk/Makefile
++++ b/drivers/clk/Makefile
+@@ -39,7 +39,7 @@ obj-$(CONFIG_CLK_MVEBU) += mvebu/
+ obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o
+ obj-$(CONFIG_CLK_OWL) += owl/
+ obj-$(CONFIG_CLK_RENESAS) += renesas/
+-obj-$(CONFIG_CLK_SCMI) += clk_scmi.o
++obj-$(CONFIG_$(SPL_TPL_)CLK_SCMI) += clk_scmi.o
+ obj-$(CONFIG_CLK_SIFIVE) += sifive/
+ obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
+ obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o
+--- a/drivers/firmware/scmi/scmi_agent-uclass.c
++++ b/drivers/firmware/scmi/scmi_agent-uclass.c
+@@ -75,7 +75,7 @@ static int scmi_bind_protocols(struct udevice *dev)
+ 		name = ofnode_get_name(node);
+ 		switch (protocol_id) {
+ 		case SCMI_PROTOCOL_ID_CLOCK:
+-			if (IS_ENABLED(CONFIG_CLK_SCMI))
++			if (CONFIG_IS_ENABLED(CLK_SCMI))
+ 				drv = DM_DRIVER_GET(scmi_clock);
+ 			break;
+ 		case SCMI_PROTOCOL_ID_RESET_DOMAIN:

5.4/package/boot/uboot-rockchip/patches/121-pinctrl-rockchip-Fix-IO-mux-selection-on.patch

@@ -0,0 +1,126 @@
+From 7db635cf638dfad08a50e26a6d02e1b6e7a9d7c5 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Sat, 18 Mar 2023 23:30:42 +0000
+Subject: [PATCH] pinctrl: rockchip: Fix IO mux selection on RK3568
+
+IO mux selection is not working correctly for all pins. Sync mux route
+data from linux to add any missing and update wrong trigger pins to fix
+this. Also apply the pull-up fix needed for GPIO0 D3-D6.
+
+Fixes: 1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver")
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Link: https://patchwork.ozlabs.org/project/uboot/patch/20230318233039.799975-1-jonas@kwiboo.se/
+---
+ drivers/pinctrl/rockchip/pinctrl-rk3568.c | 66 +++++++++++++----------
+ 1 file changed, 38 insertions(+), 28 deletions(-)
+
+--- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c
++++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
+@@ -13,6 +13,12 @@
+ #include "pinctrl-rockchip.h"
+ 
+ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
++	MR_PMUGRF(RK_GPIO0, RK_PB7, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(1, 0, 0)), /* PWM0 IO mux selection M0 */
++	MR_PMUGRF(RK_GPIO0, RK_PC7, RK_FUNC_2, 0x0110, RK_GENMASK_VAL(1, 0, 1)), /* PWM0 IO mux selection M1 */
++	MR_PMUGRF(RK_GPIO0, RK_PC0, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(3, 2, 0)), /* PWM1 IO mux selection M0 */
++	MR_PMUGRF(RK_GPIO0, RK_PB5, RK_FUNC_4, 0x0110, RK_GENMASK_VAL(3, 2, 1)), /* PWM1 IO mux selection M1 */
++	MR_PMUGRF(RK_GPIO0, RK_PC1, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(5, 4, 0)), /* PWM2 IO mux selection M0 */
++	MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_4, 0x0110, RK_GENMASK_VAL(5, 4, 1)), /* PWM2 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO0, RK_PB3, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(0, 0, 0)), /* CAN0 IO mux selection M0 */
+ 	MR_TOPGRF(RK_GPIO2, RK_PA1, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(0, 0, 1)), /* CAN0 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO1, RK_PA1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(2, 2, 0)), /* CAN1 IO mux selection M0 */
+@@ -33,30 +39,22 @@ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
+ 	MR_TOPGRF(RK_GPIO2, RK_PB1, RK_FUNC_2, 0x0304, RK_GENMASK_VAL(2, 2, 1)), /* I2C4 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO3, RK_PB4, RK_FUNC_4, 0x0304, RK_GENMASK_VAL(4, 4, 0)), /* I2C5 IO mux selection M0 */
+ 	MR_TOPGRF(RK_GPIO4, RK_PD0, RK_FUNC_2, 0x0304, RK_GENMASK_VAL(4, 4, 1)), /* I2C5 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(6, 6, 0)), /* PWM4 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(6, 6, 1)), /* PWM4 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(8, 8, 0)), /* PWM5 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(8, 8, 1)), /* PWM5 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(10, 10, 0)), /* PWM6 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(10, 10, 1)), /* PWM6 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(12, 12, 0)), /* PWM7 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(12, 12, 1)), /* PWM7 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(14, 14, 0)), /* PWM8 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(14, 14, 1)), /* PWM8 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(0, 0, 0)), /* PWM9 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(0, 0, 1)), /* PWM9 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(2, 2, 0)), /* PWM10 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(2, 2, 1)), /* PWM10 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(4, 4, 0)), /* PWM11 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(4, 4, 1)), /* PWM11 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(6, 6, 0)), /* PWM12 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(6, 6, 1)), /* PWM12 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(8, 8, 0)), /* PWM13 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(8, 8, 1)), /* PWM13 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 0)), /* PWM14 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 1)), /* PWM14 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 0)), /* PWM15 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 1)), /* PWM15 IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO3, RK_PB1, RK_FUNC_5, 0x0304, RK_GENMASK_VAL(14, 14, 0)), /* PWM8 IO mux selection M0 */
++	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_4, 0x0304, RK_GENMASK_VAL(14, 14, 1)), /* PWM8 IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO3, RK_PB2, RK_FUNC_5, 0x0308, RK_GENMASK_VAL(0, 0, 0)), /* PWM9 IO mux selection M0 */
++	MR_TOPGRF(RK_GPIO1, RK_PD6, RK_FUNC_4, 0x0308, RK_GENMASK_VAL(0, 0, 1)), /* PWM9 IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO3, RK_PB5, RK_FUNC_5, 0x0308, RK_GENMASK_VAL(2, 2, 0)), /* PWM10 IO mux selection M0 */
++	MR_TOPGRF(RK_GPIO2, RK_PA1, RK_FUNC_2, 0x0308, RK_GENMASK_VAL(2, 2, 1)), /* PWM10 IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO3, RK_PB6, RK_FUNC_5, 0x0308, RK_GENMASK_VAL(4, 4, 0)), /* PWM11 IO mux selection M0 */
++	MR_TOPGRF(RK_GPIO4, RK_PC0, RK_FUNC_3, 0x0308, RK_GENMASK_VAL(4, 4, 1)), /* PWM11 IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO3, RK_PB7, RK_FUNC_2, 0x0308, RK_GENMASK_VAL(6, 6, 0)), /* PWM12 IO mux selection M0 */
++	MR_TOPGRF(RK_GPIO4, RK_PC5, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(6, 6, 1)), /* PWM12 IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_2, 0x0308, RK_GENMASK_VAL(8, 8, 0)), /* PWM13 IO mux selection M0 */
++	MR_TOPGRF(RK_GPIO4, RK_PC6, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(8, 8, 1)), /* PWM13 IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO3, RK_PC4, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 0)), /* PWM14 IO mux selection M0 */
++	MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 1)), /* PWM14 IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO3, RK_PC5, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 0)), /* PWM15 IO mux selection M0 */
++	MR_TOPGRF(RK_GPIO4, RK_PC3, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 1)), /* PWM15 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_3, 0x0308, RK_GENMASK_VAL(14, 14, 0)), /* SDMMC2 IO mux selection M0 */
+ 	MR_TOPGRF(RK_GPIO3, RK_PA5, RK_FUNC_5, 0x0308, RK_GENMASK_VAL(14, 14, 1)), /* SDMMC2 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO0, RK_PB5, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(0, 0, 0)), /* SPI0 IO mux selection M0 */
+@@ -68,7 +66,7 @@ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
+ 	MR_TOPGRF(RK_GPIO4, RK_PB3, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(6, 6, 0)), /* SPI3 IO mux selection M0 */
+ 	MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(6, 6, 1)), /* SPI3 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO2, RK_PB4, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(8, 8, 0)), /* UART1 IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO0, RK_PD1, RK_FUNC_1, 0x030c, RK_GENMASK_VAL(8, 8, 1)), /* UART1 IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO3, RK_PD6, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(8, 8, 1)), /* UART1 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO0, RK_PD1, RK_FUNC_1, 0x030c, RK_GENMASK_VAL(10, 10, 0)), /* UART2 IO mux selection M0 */
+ 	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(10, 10, 1)), /* UART2 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO1, RK_PA1, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(12, 12, 0)), /* UART3 IO mux selection M0 */
+@@ -81,7 +79,7 @@ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
+ 	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(2, 2, 1)), /* UART6 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO2, RK_PA6, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(5, 4, 0)), /* UART7 IO mux selection M0 */
+ 	MR_TOPGRF(RK_GPIO3, RK_PC4, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(5, 4, 1)), /* UART7 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0310, RK_GENMASK_VAL(5, 4, 2)), /* UART7 IO mux selection M2 */
++	MR_TOPGRF(RK_GPIO4, RK_PA2, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(5, 4, 2)), /* UART7 IO mux selection M2 */
+ 	MR_TOPGRF(RK_GPIO2, RK_PC5, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(6, 6, 0)), /* UART8 IO mux selection M0 */
+ 	MR_TOPGRF(RK_GPIO2, RK_PD7, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(6, 6, 1)), /* UART8 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO2, RK_PB0, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(9, 8, 0)), /* UART9 IO mux selection M0 */
+@@ -94,8 +92,11 @@ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
+ 	MR_TOPGRF(RK_GPIO4, RK_PB6, RK_FUNC_5, 0x0310, RK_GENMASK_VAL(12, 12, 1)), /* I2S2 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO3, RK_PA2, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(14, 14, 0)), /* I2S3 IO mux selection M0 */
+ 	MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_5, 0x0310, RK_GENMASK_VAL(14, 14, 1)), /* I2S3 IO mux selection M1 */
+-	MR_TOPGRF(RK_GPIO1, RK_PA6, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(0, 0, 0)), /* PDM IO mux selection M0 */
+-	MR_TOPGRF(RK_GPIO3, RK_PD6, RK_FUNC_5, 0x0314, RK_GENMASK_VAL(0, 0, 1)), /* PDM IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO1, RK_PA4, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(1, 0, 0)), /* PDM IO mux selection M0 */
++	MR_TOPGRF(RK_GPIO1, RK_PA6, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(1, 0, 0)), /* PDM IO mux selection M0 */
++	MR_TOPGRF(RK_GPIO3, RK_PD6, RK_FUNC_5, 0x0314, RK_GENMASK_VAL(1, 0, 1)), /* PDM IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO4, RK_PA0, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(1, 0, 1)), /* PDM IO mux selection M1 */
++	MR_TOPGRF(RK_GPIO3, RK_PC4, RK_FUNC_5, 0x0314, RK_GENMASK_VAL(1, 0, 2)), /* PDM IO mux selection M2 */
+ 	MR_TOPGRF(RK_GPIO0, RK_PA5, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(3, 2, 0)), /* PCIE20 IO mux selection M0 */
+ 	MR_TOPGRF(RK_GPIO2, RK_PD0, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(3, 2, 1)), /* PCIE20 IO mux selection M1 */
+ 	MR_TOPGRF(RK_GPIO1, RK_PB0, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(3, 2, 2)), /* PCIE20 IO mux selection M2 */
+@@ -237,6 +238,15 @@ static int rk3568_set_pull(struct rockchip_pin_bank *bank,
+ 		return ret;
+ 	}
+ 
++	/*
++	 * In the TRM, pull-up being 1 for everything except the GPIO0_D3-D6,
++	 * where that pull up value becomes 3.
++	 */
++	if (bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) {
++		if (ret == 1)
++			ret = 3;
++	}
++
+ 	/* enable the write to the equivalent lower bits */
+ 	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+ 

5.4/package/boot/uboot-rockchip/patches/203-rock64pro-disable-CONFIG_USE_PREBOOT.patch

@@ -0,0 +1,27 @@
+From 2114d68b3c755ec8043ae9e43ac8e9753e0cec84 Mon Sep 17 00:00:00 2001
+From: Marty Jones <mj8263788@gmail.com>
+Date: Sun, 17 Jan 2021 15:26:09 -0500
+Subject: [PATCH] rockpro64: disable CONFIG_USE_PREBOOT
+
+On commit https://github.com/u-boot/u-boot/commit/f81f9f0ebac596bae7f27db095f4f0272b606cc3
+CONFIG_USE_PREBOOT was enabled on the RockPro64.
+
+When the board is booting, U-Boot hangs as soon as it disables the USB
+controller. This is a workaround until a final solution is deployed
+upstream.
+
+Signed-off-by: Marty Jones <mj8263788@gmail.com>
+---
+ configs/rockpro64-rk3399_defconfig | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/configs/rockpro64-rk3399_defconfig
++++ b/configs/rockpro64-rk3399_defconfig
+@@ -21,7 +21,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
+ CONFIG_DEBUG_UART=y
+ CONFIG_BOOTSTAGE=y
+ CONFIG_BOOTSTAGE_REPORT=y
+-CONFIG_USE_PREBOOT=y
+ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
+ CONFIG_DISPLAY_BOARDINFO_LATE=y
+ CONFIG_MISC_INIT_R=y

5.4/package/boot/uboot-rockchip/patches/210-rockchip-rk35xx-Fix-boot-with-a-large-fdt-blob.patch

@@ -0,0 +1,43 @@
+From c13b8e588bd2da6381a6d337df51acb2a61f03b8 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Tue, 21 Mar 2023 21:43:07 +0000
+Subject: [PATCH] rockchip: rk35xx: Fix boot with a large fdt blob
+
+The TF-A blobs used to boot RK3568 and RK3588 boards is based on atf
+v2.3. Mainline atf v2.3 contains an issue that could lead to a crash
+when it fails to parse the fdt blob being passed as the platform param.
+An issue that was fixed in atf v2.4.
+
+The vendor TF-A seem to suffer from a similar issue, and this prevents
+booting when fdt blob is large enough to trigger this condition.
+
+Fix this by implying SPL_ATF_NO_PLATFORM_PARAM to let u-boot pass a
+NULL pointer instead of the fdt blob as the platform param.
+
+This fixes booting Radxa ROCK 3A after recent sync of device tree.
+
+Fixes: 073d911ae64a ("rockchip: rk3568-rock-3a: Sync device tree from linux")
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Link: https://patchwork.ozlabs.org/project/uboot/patch/20230321214301.2590326-4-jonas@kwiboo.se/
+---
+ arch/arm/mach-rockchip/Kconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm/mach-rockchip/Kconfig
++++ b/arch/arm/mach-rockchip/Kconfig
+@@ -288,6 +288,7 @@ config ROCKCHIP_RK3568
+ 	select BOARD_LATE_INIT
+ 	select DM_REGULATOR_FIXED
+ 	select DM_RESET
++	imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
+ 	imply ROCKCHIP_COMMON_BOARD
+ 	imply ROCKCHIP_OTP
+ 	imply MISC_INIT_R
+@@ -309,6 +310,7 @@ config ROCKCHIP_RK3588
+ 	select REGMAP
+ 	select SYSCON
+ 	select BOARD_LATE_INIT
++	imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
+ 	imply ROCKCHIP_COMMON_BOARD
+ 	imply ROCKCHIP_OTP
+ 	imply MISC_INIT_R

5.4/package/boot/uboot-rockchip/patches/301-arm64-dts-rockchip-Add-GuangMiao-G4C-support.patch

@@ -0,0 +1,740 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -124,6 +124,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ 	rk3399-ficus.dtb \
+ 	rk3399-firefly.dtb \
+ 	rk3399-gru-bob.dtb \
++	rk3399-guangmiao-g4c.dtb \
+ 	rk3399-gru-kevin.dtb \
+ 	rk3399-khadas-edge.dtb \
+ 	rk3399-khadas-edge-captain.dtb \
+--- /dev/null
++++ b/configs/guangmiao-g4c-rk3399_defconfig
+@@ -0,0 +1,57 @@
++CONFIG_ARM=y
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00200000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_ROCKCHIP_RK3399=y
++CONFIG_TARGET_EVB_RK3399=y
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART_BASE=0xFF1A0000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_DEBUG_UART=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-guangmiao-g4c.dtb"
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
++CONFIG_TPL=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_DEFAULT_DEVICE_TREE="rk3399-guangmiao-g4c"
++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_DM_ETH=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_RAM_RK3399_LPDDR4=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_HOST_ETHER=y
++CONFIG_USB_ETHER_ASIX=y
++CONFIG_USB_ETHER_ASIX88179=y
++CONFIG_USB_ETHER_MCS7830=y
++CONFIG_USB_ETHER_RTL8152=y
++CONFIG_USB_ETHER_SMSC95XX=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y
+--- /dev/null
++++ b/arch/arm/dts/rk3399-guangmiao-g4c-u-boot.dtsi
+@@ -0,0 +1,18 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include "rk3399-u-boot.dtsi"
++#include "rk3399-sdram-lpddr4-100.dtsi"
++
++/ {
++	chosen {
++		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
++	};
++};
++
++&sdmmc {
++	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
++};
++
++&vdd_log {
++	regulator-init-microvolt = <950000>;
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3399-guangmiao-g4c.dts
+@@ -0,0 +1,646 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++#include <dt-bindings/input/linux-event-codes.h>
++#include "rk3399.dtsi"
++#include "rk3399-opp.dtsi"
++
++/ {
++	model = "SHAREVDI GuangMiao G4C";
++	compatible = "sharevdi,guangmiao-g4c", "rockchip,rk3399";
++
++	/delete-node/ display-subsystem;
++
++	chosen {
++		stdout-path = "serial2:1500000n8";
++	};
++
++	clkin_gmac: external-gmac-clock {
++		compatible = "fixed-clock";
++		clock-frequency = <125000000>;
++		clock-output-names = "clkin_gmac";
++		#clock-cells = <0>;
++	};
++
++	vcc_sys: vcc-sys {
++		compatible = "regulator-fixed";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		regulator-name = "vcc_sys";
++	};
++
++	vcc3v3_sys: vcc3v3-sys {
++		compatible = "regulator-fixed";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-name = "vcc3v3_sys";
++		vin-supply = <&vcc_sys>;
++	};
++
++	vcc_0v9: vcc-0v9 {
++		compatible = "regulator-fixed";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <900000>;
++		regulator-max-microvolt = <900000>;
++		regulator-name = "vcc_0v9";
++		vin-supply = <&vcc3v3_sys>;
++	};
++
++	vcc5v0_host0: vcc5v0-host0 {
++		compatible = "regulator-fixed";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-name = "vcc5v0_host0";
++		vin-supply = <&vcc_sys>;
++	};
++
++	vdd_log: vdd-log {
++		compatible = "pwm-regulator";
++		pwms = <&pwm2 0 25000 1>;
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <800000>;
++		regulator-max-microvolt = <1400000>;
++		regulator-name = "vdd_log";
++		vin-supply = <&vcc_sys>;
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++		autorepeat;
++		pinctrl-names = "default";
++		pinctrl-0 = <&reset_button_pin>;
++
++		reset {
++			debounce-interval = <100>;
++			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
++			label = "reset";
++			linux,code = <KEY_RESTART>;
++			wakeup-source;
++		};
++	};
++
++	gpio-leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&lan_led_pin>, <&status_led_pin>, <&wan_led_pin>;
++
++		lan_led: led-lan {
++			gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
++			label = "green:lan";
++		};
++
++		status_led: led-status {
++			gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
++			label = "green:status";
++		};
++
++		wan_led: led-wan {
++			gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
++			label = "green:wan";
++		};
++	};
++};
++
++&cpu_b0 {
++	cpu-supply = <&vdd_cpu_b>;
++};
++
++&cpu_b1 {
++	cpu-supply = <&vdd_cpu_b>;
++};
++
++&cpu_l0 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l1 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l2 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l3 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&emmc_phy {
++	status = "okay";
++};
++
++&gmac {
++	assigned-clock-parents = <&clkin_gmac>;
++	assigned-clocks = <&cru SCLK_RMII_SRC>;
++	clock_in_out = "input";
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_pmeb>, <&phy_rstb>;
++	phy-handle = <&rtl8211e>;
++	phy-mode = "rgmii";
++	phy-supply = <&vcc3v3_s3>;
++	tx_delay = <0x28>;
++	rx_delay = <0x11>;
++	status = "okay";
++
++	mdio {
++		compatible = "snps,dwmac-mdio";
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		rtl8211e: ethernet-phy@1 {
++			reg = <1>;
++			interrupt-parent = <&gpio3>;
++			interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
++			reset-assert-us = <10000>;
++			reset-deassert-us = <30000>;
++			reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
++		};
++	};
++};
++
++&gpu {
++	mali-supply = <&vdd_gpu>;
++	status = "okay";
++};
++
++&i2c0 {
++	clock-frequency = <400000>;
++	i2c-scl-rising-time-ns = <160>;
++	i2c-scl-falling-time-ns = <30>;
++	status = "okay";
++
++	vdd_cpu_b: regulator@40 {
++		compatible = "silergy,syr827";
++		reg = <0x40>;
++		fcs,suspend-voltage-selector = <1>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&cpu_b_sleep>;
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
++		regulator-name = "vdd_cpu_b";
++		regulator-ramp-delay = <1000>;
++		vin-supply = <&vcc_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	vdd_gpu: regulator@41 {
++		compatible = "silergy,syr828";
++		reg = <0x41>;
++		fcs,suspend-voltage-selector = <1>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&gpu_sleep>;
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
++		regulator-name = "vdd_gpu";
++		regulator-ramp-delay = <1000>;
++		vin-supply = <&vcc_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	rk808: pmic@1b {
++		compatible = "rockchip,rk808";
++		reg = <0x1b>;
++		clock-output-names = "rtc_clko_soc", "rtc_clko_wifi";
++		#clock-cells = <1>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_int_l>;
++		rockchip,system-power-controller;
++		wakeup-source;
++
++		vcc1-supply = <&vcc_sys>;
++		vcc2-supply = <&vcc_sys>;
++		vcc3-supply = <&vcc_sys>;
++		vcc4-supply = <&vcc_sys>;
++		vcc6-supply = <&vcc_sys>;
++		vcc7-supply = <&vcc_sys>;
++		vcc8-supply = <&vcc_3v0>;
++		vcc9-supply = <&vcc_sys>;
++		vcc10-supply = <&vcc_sys>;
++		vcc11-supply = <&vcc_sys>;
++		vcc12-supply = <&vcc_sys>;
++		vddio-supply = <&vcc_3v0>;
++
++		regulators {
++			vdd_center: DCDC_REG1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-name = "vdd_center";
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_cpu_l: DCDC_REG2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-name = "vdd_cpu_l";
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_ddr: DCDC_REG3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc_ddr";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++				};
++			};
++
++			vcc_1v8: DCDC_REG4 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc_1v8";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcc_vldo1: LDO_REG1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc_vldo1";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_vldo2: LDO_REG2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc_vldo2";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcca_1v8: LDO_REG3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcca_1v8";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcc_sdio: LDO_REG4 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc_sdio";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3300000>;
++				};
++			};
++
++			vcc3v0_sd: LDO_REG5 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-name = "vcc3v0_sd";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3000000>;
++				};
++			};
++
++			vcc_1v5: LDO_REG6 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1500000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-name = "vcc_1v5";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1500000>;
++				};
++			};
++
++			vcca1v8_codec: LDO_REG7 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcca1v8_codec";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_3v0: LDO_REG8 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-name = "vcc_3v0";
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3000000>;
++				};
++			};
++
++			vcc3v3_s3: SWITCH_REG1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc3v3_s3";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v3_s0: SWITCH_REG2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc3v3_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++		};
++	};
++};
++
++&i2c3 {
++	i2c-scl-rising-time-ns = <450>;
++	i2c-scl-falling-time-ns = <15>;
++	status = "okay";
++};
++
++&io_domains {
++	bt656-supply = <&vcc_1v8>;
++	audio-supply = <&vcca1v8_codec>;
++	sdmmc-supply = <&vcc_sdio>;
++	gpio1830-supply = <&vcc_3v0>;
++	status = "okay";
++};
++
++&pcie_phy {
++	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
++	assigned-clock-rates = <100000000>;
++	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
++	status = "okay";
++};
++
++&pcie0 {
++	ep-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
++	max-link-speed = <1>;
++	num-lanes = <1>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pcie_clkreqnb_cpm>;
++	vpcie0v9-supply = <&vcc_0v9>;
++	vpcie1v8-supply = <&vcca_1v8>;
++	vpcie3v3-supply = <&vcc3v3_sys>;
++	status = "okay";
++};
++
++&pinctrl {
++	gpio-leds {
++		lan_led_pin: lan-led-pin {
++			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		status_led_pin: status-led-pin {
++			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		wan_led_pin: wan-led-pin {
++			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	gmac {
++		phy_intb: phy-intb {
++			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++
++		phy_pmeb: phy-pmeb {
++			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++
++		phy_rstb: phy-rstb {
++			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	pmic {
++		cpu_b_sleep: cpu-b-sleep {
++			rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++
++		gpu_sleep: gpu-sleep {
++			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++
++		pmic_int_l: pmic-int-l {
++			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	rockchip-key {
++		reset_button_pin: reset-button-pin {
++			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	sdio {
++		bt_reg_on_h: bt-reg-on-h {
++			/* external pullup to VCC1V8_PMUPLL */
++			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	sdmmc {
++		sdmmc0_det_l: sdmmc0-det-l {
++			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++};
++
++&pmu_io_domains {
++	pmu1830-supply = <&vcc_3v0>;
++	status = "okay";
++};
++
++&pwm0 {
++	status = "okay";
++};
++
++&pwm1 {
++	status = "okay";
++};
++
++&pwm2 {
++	pinctrl-names = "active";
++	pinctrl-0 = <&pwm2_pin_pull_down>;
++	status = "okay";
++};
++
++&saradc {
++	vref-supply = <&vcc_1v8>;
++	status = "okay";
++};
++
++&sdhci {
++	bus-width = <8>;
++	mmc-hs200-1_8v;
++	non-removable;
++	status = "okay";
++};
++
++&sdmmc {
++	bus-width = <4>;
++	cap-mmc-highspeed;
++	cap-sd-highspeed;
++	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
++	disable-wp;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
++	vqmmc-supply = <&vcc_sdio>;
++	status = "okay";
++};
++
++&tcphy0 {
++	status = "okay";
++};
++
++&tcphy1 {
++	status = "okay";
++};
++
++&tsadc {
++	rockchip,hw-tshut-mode = <1>;
++	rockchip,hw-tshut-polarity = <1>;
++	status = "okay";
++};
++
++&u2phy0 {
++	status = "okay";
++};
++
++&u2phy0_host {
++	phy-supply = <&vcc5v0_host0>;
++	status = "okay";
++};
++
++&u2phy0_otg {
++	status = "okay";
++};
++
++&u2phy1 {
++	status = "okay";
++};
++
++&u2phy1_host {
++	phy-supply = <&vcc5v0_host0>;
++	status = "okay";
++};
++
++&u2phy1_otg {
++	status = "okay";
++};
++
++&uart2 {
++	status = "okay";
++};
++
++&usbdrd3_0 {
++	status = "okay";
++};
++
++&usbdrd3_1 {
++	status = "okay";
++};
++
++&usbdrd_dwc3_0 {
++	dr_mode = "host";
++	status = "okay";
++};
++
++&usbdrd_dwc3_1 {
++	dr_mode = "host";
++	status = "okay";
++};
++
++&usb_host0_ehci {
++	status = "okay";
++};
++
++&usb_host0_ohci {
++	status = "okay";
++};
++
++&usb_host1_ehci {
++	status = "okay";
++};
++
++&usb_host1_ohci {
++	status = "okay";
++};
++
++&vopb {
++	status = "okay";
++};
++
++&vopb_mmu {
++	status = "okay";
++};
++
++&vopl {
++	status = "okay";
++};
++
++&vopl_mmu {
++	status = "okay";
++};

5.4/package/boot/uboot-rockchip/patches/302-rockchip-rk3328-Add-support-for-Orangepi-R1-Plus.patch

@@ -0,0 +1,157 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -109,6 +109,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
+ dtb-$(CONFIG_ROCKCHIP_RK3328) += \
+ 	rk3328-evb.dtb \
+ 	rk3328-nanopi-r2s.dtb \
++	rk3328-orangepi-r1-plus.dtb \
+ 	rk3328-roc-cc.dtb \
+ 	rk3328-rock64.dtb \
+ 	rk3328-rock-pi-e.dtb
+--- /dev/null
++++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+@@ -0,0 +1,1 @@
++#include "rk3328-nanopi-r2s-u-boot.dtsi"
+--- /dev/null
++++ b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
+@@ -0,0 +1,25 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++#include "rk3328-nanopi-r2s.dts"
++
++/ {
++	model = "Xunlong Orange Pi R1 Plus";
++	compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
++};
++
++&spi0 {
++	status = "okay";
++
++	flash@0 {
++		compatible = "jedec,spi-nor";
++		reg = <0>;
++		spi-max-frequency = <50000000>;
++	};
++};
++
++&sys_led {
++	gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
++};
++
++&sys_led_pin {
++	rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
++};
+--- /dev/null
++++ b/configs/orangepi-r1-plus-rk3328_defconfig
+@@ -0,0 +1,112 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00200000
++CONFIG_SPL_GPIO=y
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus"
++CONFIG_DM_RESET=y
++CONFIG_ROCKCHIP_RK3328=y
++CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
++CONFIG_TPL_LIBCOMMON_SUPPORT=y
++CONFIG_TPL_LIBGENERIC_SUPPORT=y
++CONFIG_SPL_DRIVERS_MISC=y
++CONFIG_SPL_STACK_R_ADDR=0x600000
++CONFIG_SPL_STACK=0x400000
++CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
++CONFIG_DEBUG_UART_BASE=0xFF130000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART=y
++# CONFIG_ANDROID_BOOT_IMAGE is not set
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_MISC_INIT_R=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x2000000
++CONFIG_SPL_BSS_MAX_SIZE=0x2000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_I2C=y
++CONFIG_SPL_POWER=y
++CONFIG_SPL_ATF=y
++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
++CONFIG_TPL_SYS_MALLOC_SIMPLE=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_TPL_OF_CONTROL=y
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_TPL_OF_PLATDATA=y
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_SYS_MMC_ENV_DEV=1
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_TPL_DM=y
++CONFIG_REGMAP=y
++CONFIG_SPL_REGMAP=y
++CONFIG_TPL_REGMAP=y
++CONFIG_SYSCON=y
++CONFIG_SPL_SYSCON=y
++CONFIG_TPL_SYSCON=y
++CONFIG_CLK=y
++CONFIG_SPL_CLK=y
++CONFIG_FASTBOOT_BUF_ADDR=0x800800
++CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_SF_DEFAULT_SPEED=20000000
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PINCTRL=y
++CONFIG_SPL_PINCTRL=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_SPL_DM_REGULATOR=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_RAM=y
++CONFIG_SPL_RAM=y
++CONFIG_TPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSINFO=y
++CONFIG_SYSRESET=y
++# CONFIG_TPL_SYSRESET is not set
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_OHCI_GENERIC=y
++CONFIG_USB_DWC2=y
++CONFIG_USB_DWC3=y
++# CONFIG_USB_DWC3_GADGET is not set
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DWC2_OTG=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_TPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/303-rockchip-rk3328-Add-support-for-Orangepi-R1-Plus-LTS.patch

@@ -0,0 +1,152 @@
+From 68836b81f7d6328a1a5a6cce5a00bf4010f742e5 Mon Sep 17 00:00:00 2001
+From: baiywt <baiywt_gj@163.com>
+Date: Wed, 24 Nov 2021 19:59:38 +0800
+Subject: [PATCH] Add support for Orangepi R1 Plus LTS
+
+---
+ arch/arm/dts/Makefile                         |  1 +
+ arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts  |  7 ++
+ configs/orangepi-r1-plus-lts-rk3328_defconfig | 98 +++++++++++++++++++
+ 3 files changed, 106 insertions(+)
+ create mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
+ create mode 100644 configs/orangepi-r1-plus-lts-rk3328_defconfig
+
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -110,6 +110,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3328) += \
+ 	rk3328-evb.dtb \
+ 	rk3328-nanopi-r2s.dtb \
+ 	rk3328-orangepi-r1-plus.dtb \
++	rk3328-orangepi-r1-plus-lts.dtb \
+ 	rk3328-roc-cc.dtb \
+ 	rk3328-rock64.dtb \
+ 	rk3328-rock-pi-e.dtb
+--- /dev/null
++++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+@@ -0,0 +1,1 @@
++#include "rk3328-nanopi-r2s-u-boot.dtsi"
+--- /dev/null
++++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
+@@ -0,0 +1,7 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++#include "rk3328-orangepi-r1-plus.dts"
++
++/ {
++	model = "Xunlong Orange Pi R1 Plus LTS";
++	compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";
++};
+--- /dev/null
++++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
+@@ -0,0 +1,112 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00200000
++CONFIG_SPL_GPIO=y
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts"
++CONFIG_DM_RESET=y
++CONFIG_ROCKCHIP_RK3328=y
++CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
++CONFIG_TPL_LIBCOMMON_SUPPORT=y
++CONFIG_TPL_LIBGENERIC_SUPPORT=y
++CONFIG_SPL_DRIVERS_MISC=y
++CONFIG_SPL_STACK_R_ADDR=0x600000
++CONFIG_SPL_STACK=0x400000
++CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
++CONFIG_DEBUG_UART_BASE=0xFF130000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART=y
++# CONFIG_ANDROID_BOOT_IMAGE is not set
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_MISC_INIT_R=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x2000000
++CONFIG_SPL_BSS_MAX_SIZE=0x2000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_I2C=y
++CONFIG_SPL_POWER=y
++CONFIG_SPL_ATF=y
++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
++CONFIG_TPL_SYS_MALLOC_SIMPLE=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_TPL_OF_CONTROL=y
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_TPL_OF_PLATDATA=y
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_SYS_MMC_ENV_DEV=1
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_TPL_DM=y
++CONFIG_REGMAP=y
++CONFIG_SPL_REGMAP=y
++CONFIG_TPL_REGMAP=y
++CONFIG_SYSCON=y
++CONFIG_SPL_SYSCON=y
++CONFIG_TPL_SYSCON=y
++CONFIG_CLK=y
++CONFIG_SPL_CLK=y
++CONFIG_FASTBOOT_BUF_ADDR=0x800800
++CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_SF_DEFAULT_SPEED=20000000
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PINCTRL=y
++CONFIG_SPL_PINCTRL=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_SPL_DM_REGULATOR=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_RAM=y
++CONFIG_SPL_RAM=y
++CONFIG_TPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSINFO=y
++CONFIG_SYSRESET=y
++# CONFIG_TPL_SYSRESET is not set
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_OHCI_GENERIC=y
++CONFIG_USB_DWC2=y
++CONFIG_USB_DWC3=y
++# CONFIG_USB_DWC3_GADGET is not set
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DWC2_OTG=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_TPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/304-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch

@@ -0,0 +1,196 @@
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index d3e89ca3ba..d5f64ac432 100644
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -108,6 +108,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
+ 
+ dtb-$(CONFIG_ROCKCHIP_RK3328) += \
+ 	rk3328-evb.dtb \
++	rk3328-nanopi-r2c.dtb \
+ 	rk3328-nanopi-r2s.dtb \
+ 	rk3328-orangepi-r1-plus.dtb \
+ 	rk3328-roc-cc.dtb \
+diff --git a/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
+new file mode 100644
+index 0000000000..c2e86d0f0e
+--- /dev/null
++++ b/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
+@@ -0,0 +1,7 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
++ * (C) Copyright 2021 Tianling Shen
++ */
++
++#include "rk3328-nanopi-r2s-u-boot.dtsi"
+diff --git a/arch/arm/dts/rk3328-nanopi-r2c.dts b/arch/arm/dts/rk3328-nanopi-r2c.dts
+new file mode 100644
+index 0000000000..adf91a0306
+--- /dev/null
++++ b/arch/arm/dts/rk3328-nanopi-r2c.dts
+@@ -0,0 +1,47 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
++ * (http://www.friendlyarm.com)
++ *
++ * Copyright (c) 2021 Tianling Shen <cnsztl@immortalwrt.org>
++ */
++
++/dts-v1/;
++
++#include "rk3328-nanopi-r2s.dts"
++
++/ {
++	model = "FriendlyElec NanoPi R2C";
++	compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328";
++};
++
++&gmac2io {
++	phy-handle = <&yt8521s>;
++
++	mdio {
++		/delete-node/ ethernet-phy@1;
++
++		yt8521s: ethernet-phy@3 {
++			compatible = "ethernet-phy-id0000.011a",
++				     "ethernet-phy-ieee802.3-c22";
++			reg = <3>;
++			pinctrl-0 = <&eth_phy_reset_pin>;
++			pinctrl-names = "default";
++			reset-assert-us = <10000>;
++			reset-deassert-us = <50000>;
++			reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
++		};
++	};
++};
++
++&lan_led {
++	label = "nanopi-r2c:green:lan";
++};
++
++&sys_led {
++	label = "nanopi-r2c:red:sys";
++};
++
++&wan_led {
++	label = "nanopi-r2c:green:wan";
++};
+diff --git a/configs/nanopi-r2c-rk3328_defconfig b/configs/nanopi-r2c-rk3328_defconfig
+new file mode 100644
+index 0000000000..7bc7a3274f
+--- /dev/null
++++ b/configs/nanopi-r2c-rk3328_defconfig
+@@ -0,0 +1,112 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00200000
++CONFIG_SPL_GPIO=y
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c"
++CONFIG_DM_RESET=y
++CONFIG_ROCKCHIP_RK3328=y
++CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
++CONFIG_TPL_LIBCOMMON_SUPPORT=y
++CONFIG_TPL_LIBGENERIC_SUPPORT=y
++CONFIG_SPL_DRIVERS_MISC=y
++CONFIG_SPL_STACK_R_ADDR=0x600000
++CONFIG_SPL_STACK=0x400000
++CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
++CONFIG_DEBUG_UART_BASE=0xFF130000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART=y
++# CONFIG_ANDROID_BOOT_IMAGE is not set
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_MISC_INIT_R=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x2000000
++CONFIG_SPL_BSS_MAX_SIZE=0x2000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_I2C=y
++CONFIG_SPL_POWER=y
++CONFIG_SPL_ATF=y
++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
++CONFIG_TPL_SYS_MALLOC_SIMPLE=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_TPL_OF_CONTROL=y
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_TPL_OF_PLATDATA=y
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_SYS_MMC_ENV_DEV=1
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_TPL_DM=y
++CONFIG_REGMAP=y
++CONFIG_SPL_REGMAP=y
++CONFIG_TPL_REGMAP=y
++CONFIG_SYSCON=y
++CONFIG_SPL_SYSCON=y
++CONFIG_TPL_SYSCON=y
++CONFIG_CLK=y
++CONFIG_SPL_CLK=y
++CONFIG_FASTBOOT_BUF_ADDR=0x800800
++CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_SF_DEFAULT_SPEED=20000000
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PINCTRL=y
++CONFIG_SPL_PINCTRL=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_SPL_DM_REGULATOR=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_RAM=y
++CONFIG_SPL_RAM=y
++CONFIG_TPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSINFO=y
++CONFIG_SYSRESET=y
++# CONFIG_TPL_SYSRESET is not set
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_OHCI_GENERIC=y
++CONFIG_USB_DWC2=y
++CONFIG_USB_DWC3=y
++# CONFIG_USB_DWC3_GADGET is not set
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DWC2_OTG=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_TPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/305-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch

@@ -0,0 +1,121 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -157,6 +157,7 @@
+ 	rk3399-nanopi-m4b.dtb \
+ 	rk3399-nanopi-neo4.dtb \
+ 	rk3399-nanopi-r4s.dtb \
++	rk3399-nanopi-r4se.dtb \
+ 	rk3399-orangepi.dtb \
+ 	rk3399-pinebook-pro.dtb \
+ 	rk3399-puma-haikou.dtb \
+--- /dev/null
++++ b/arch/arm/dts/rk3399-nanopi-r4se.dts
+@@ -0,0 +1,32 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * FriendlyElec NanoPC-T4 board device tree source
++ *
++ * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd.
++ * (http://www.friendlyarm.com)
++ *
++ * Copyright (c) 2018 Collabora Ltd.
++ *
++ * Copyright (c) 2020 Jensen Huang <jensenhuang@friendlyarm.com>
++ */
++
++/dts-v1/;
++#include "rk3399-nanopi-r4s.dts"
++
++/ {
++	model = "FriendlyElec NanoPi R4SE";
++	compatible = "friendlyarm,nanopi-r4se", "rockchip,rk3399";
++};
++
++&emmc_phy {
++	status = "okay";
++};
++
++&sdhci {
++	bus-width = <8>;
++	non-removable;
++	status = "okay";
++};
++&sdmmc {
++ pinctrl-0 = <&sdmmc_cd>;
++};
+--- /dev/null
++++ b/configs/nanopi-r4se-rk3399_defconfig
+@@ -0,0 +1,73 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00200000
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se"
++CONFIG_ROCKCHIP_RK3399=y
++CONFIG_TARGET_EVB_RK3399=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFF1A0000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb"
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x2e000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x400000
++CONFIG_SPL_BSS_MAX_SIZE=0x2000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
++CONFIG_TPL=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_RAM_ROCKCHIP_LPDDR4=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_HOST_ETHER=y
++CONFIG_USB_ETHER_ASIX=y
++CONFIG_USB_ETHER_ASIX88179=y
++CONFIG_USB_ETHER_MCS7830=y
++CONFIG_USB_ETHER_RTL8152=y
++CONFIG_USB_ETHER_SMSC95XX=y
++CONFIG_VIDEO=y
++CONFIG_DISPLAY=y
++CONFIG_VIDEO_ROCKCHIP=y
++CONFIG_DISPLAY_ROCKCHIP_HDMI=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/306-rockchip-rk3399-Add-support-for-Rongpin-king3399.patch

@@ -0,0 +1,76 @@
+--- /dev/null
++++ b/configs/rongpin-king3399-rk3399_defconfig
+@@ -0,0 +1,73 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00200000
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se"
++CONFIG_ROCKCHIP_RK3399=y
++CONFIG_TARGET_EVB_RK3399=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFF1A0000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb"
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x2e000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x400000
++CONFIG_SPL_BSS_MAX_SIZE=0x2000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
++CONFIG_TPL=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_RAM_ROCKCHIP_LPDDR4=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_HOST_ETHER=y
++CONFIG_USB_ETHER_ASIX=y
++CONFIG_USB_ETHER_ASIX88179=y
++CONFIG_USB_ETHER_MCS7830=y
++CONFIG_USB_ETHER_RTL8152=y
++CONFIG_USB_ETHER_SMSC95XX=y
++CONFIG_VIDEO=y
++CONFIG_DISPLAY=y
++CONFIG_VIDEO_ROCKCHIP=y
++CONFIG_DISPLAY_ROCKCHIP_HDMI=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/307-rockchip-rk3399-Add-support-for-Rocktech-MPC1903.patch

@@ -0,0 +1,793 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -165,6 +165,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ 	rk3399-rock-pi-4b.dtb \
+ 	rk3399-rock-pi-4c.dtb \
+ 	rk3399-rock960.dtb \
++	rk3399-mpc1903.dtb \
+ 	rk3399-rockpro64.dtb \
+ 	rk3399pro-rock-pi-n10.dtb
+ 
+--- /dev/null
++++ b/arch/arm/dts/rk3399-mpc1903.dts
+@@ -0,0 +1,688 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++#include <dt-bindings/input/linux-event-codes.h>
++#include "rk3399.dtsi"
++#include "rk3399-opp.dtsi"
++
++/ {
++	model = "Rocktech MPC1903";
++	compatible = "rocktech,mpc1903", "rockchip,rk3399";
++
++	aliases {
++		mmc0 = &sdmmc;
++		mmc1 = &sdhci;
++	};
++
++	chosen {
++		stdout-path = "serial2:1500000n8";
++	};
++
++	clkin_gmac: external-gmac-clock {
++		compatible = "fixed-clock";
++		clock-frequency = <125000000>;
++		clock-output-names = "clkin_gmac";
++		#clock-cells = <0>;
++	};
++
++	vcc12v_dcin: dc-12v {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc12v_dcin";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <12000000>;
++		regulator-max-microvolt = <12000000>;
++	};
++
++	sdio_pwrseq: sdio-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rk808 1>;
++		clock-names = "ext_clock";
++		pinctrl-names = "default";
++		pinctrl-0 = <&wifi_enable_h>;
++		reset-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_LOW>;
++	};
++
++	vcc5v0_sys: vcc-sys {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc5v0_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc12v_dcin>;
++	};
++
++	vcc3v3_sys: vcc3v3-sys {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc3v3_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		vin-supply = <&vcc5v0_sys>;
++	};
++
++	vcc5v0_host: vcc5v0-host-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vcc5v0_host_en>;
++		regulator-name = "vcc5v0_host";
++		regulator-always-on;
++		vin-supply = <&vcc5v0_sys>;
++	};
++
++	vcc_lan: vcc-phy-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_lan";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++
++	vdd_log: vdd-log {
++		compatible = "pwm-regulator";
++		pwms = <&pwm2 0 25000 1>;
++		regulator-name = "vdd_log";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <800000>;
++		regulator-max-microvolt = <1400000>;
++		vin-supply = <&vcc5v0_sys>;
++	};
++
++	leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&status_led_pin>;
++
++		status_led: led-status-led {
++			label = "status_led";
++			linux,default-trigger = "heartbeat";
++			gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	hub_control {
++		compatible = "rocktech,hub-control";
++		pinctrl-names = "default";
++		pinctrl-0 = <&hub_pwr>;
++		hub-pwr-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
++		status = "okay";
++	};
++};
++
++&cpu_l0 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l1 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l2 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l3 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_b0 {
++	cpu-supply = <&vdd_cpu_b>;
++};
++
++&cpu_b1 {
++	cpu-supply = <&vdd_cpu_b>;
++};
++
++&emmc_phy {
++	status = "okay";
++};
++
++&gmac {
++	assigned-clocks = <&cru SCLK_RMII_SRC>;
++	assigned-clock-parents = <&clkin_gmac>;
++	clock_in_out = "input";
++	phy-supply = <&vcc_lan>;
++	phy-mode = "rmgii";
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
++	snps,reset-active-low;
++	snps,reset-delays-us = <0 10000 50000>;
++	tx_delay = <0x28>;
++	rx_delay = <0x11>;
++	status = "okay";
++};
++
++&gpu {
++	mali-supply = <&vdd_gpu>;
++	status = "okay";
++};
++
++&hdmi {
++	ddc-i2c-bus = <&i2c3>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&hdmi_i2c_xfer>;
++	status = "okay";
++};
++
++&hdmi_sound {
++	status = "okay";
++};
++
++&i2c0 {
++	clock-frequency = <400000>;
++	i2c-scl-rising-time-ns = <168>;
++	i2c-scl-falling-time-ns = <4>;
++	status = "okay";
++
++	rk808: pmic@1b {
++		compatible = "rockchip,rk808";
++		reg = <0x1b>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
++		#clock-cells = <1>;
++		clock-output-names = "xin32k", "rk808-clkout2";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_int_l>;
++		rockchip,system-power-controller;
++		wakeup-source;
++
++		vcc1-supply = <&vcc5v0_sys>;
++		vcc2-supply = <&vcc5v0_sys>;
++		vcc3-supply = <&vcc5v0_sys>;
++		vcc4-supply = <&vcc5v0_sys>;
++		vcc6-supply = <&vcc5v0_sys>;
++		vcc7-supply = <&vcc5v0_sys>;
++		vcc8-supply = <&vcc3v3_sys>;
++		vcc9-supply = <&vcc5v0_sys>;
++		vcc10-supply = <&vcc5v0_sys>;
++		vcc11-supply = <&vcc5v0_sys>;
++		vcc12-supply = <&vcc3v3_sys>;
++		vddio-supply = <&vcc_3v0>;
++
++		regulators {
++			vdd_center: DCDC_REG1 {
++				regulator-name = "vdd_center";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_cpu_l: DCDC_REG2 {
++				regulator-name = "vdd_cpu_l";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_ddr: DCDC_REG3 {
++				regulator-name = "vcc_ddr";
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++				};
++			};
++
++			vcc_1v8: DCDC_REG4 {
++				regulator-name = "vcc_1v8";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			gen_1v8: LDO_REG1 {
++				regulator-name = "gen_1v8";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			gen_3v0: LDO_REG2 {
++				regulator-name = "gen_3v0";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3000000>;
++				};
++			};
++
++			vcc1v8_pmu: LDO_REG3 {
++				regulator-name = "vcc1v8_pmu";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcc_sdio: LDO_REG4 {
++				regulator-name = "vcc_sdio";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3000000>;
++				};
++			};
++
++			vcca3v0_codec: LDO_REG5 {
++				regulator-name = "vcca3v0_codec";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_1v5: LDO_REG6 {
++				regulator-name = "vcc_1v5";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1500000>;
++				regulator-max-microvolt = <1500000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc1v8_codec: LDO_REG7 {
++				regulator-name = "vcc1v8_codec";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcc_3v0: LDO_REG8 {
++				regulator-name = "vcc_3v0";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3000000>;
++				};
++			};
++
++			vcc3v3_s3: SWITCH_REG1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc3v3_s3";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v3_s0: SWITCH_REG2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc3v3_s0";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++		};
++	};
++
++	vdd_cpu_b: regulator@40 {
++		compatible = "silergy,syr827";
++		reg = <0x40>;
++		fcs,suspend-voltage-selector = <1>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vsel1_pin>;
++		regulator-name = "vdd_cpu_b";
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
++		regulator-ramp-delay = <1000>;
++		regulator-always-on;
++		regulator-boot-on;
++		vin-supply = <&vcc5v0_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	vdd_gpu: regulator@41 {
++		compatible = "silergy,syr828";
++		reg = <0x41>;
++		fcs,suspend-voltage-selector = <1>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vsel2_pin>;
++		regulator-name = "vdd_gpu";
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
++		regulator-ramp-delay = <1000>;
++		regulator-always-on;
++		regulator-boot-on;
++		vin-supply = <&vcc5v0_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	rtc: pcf85263@51 {
++		compatible = "nxp,pcf85263";
++		reg = <0x51>;
++		pinctrl-0 = <&rtc_int>;
++		rtc_int_gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
++	};
++};
++
++&i2c1 {
++	i2c-scl-rising-time-ns = <300>;
++	i2c-scl-falling-time-ns = <15>;
++	status = "okay";
++};
++
++&i2s2 {
++	status = "okay";
++};
++
++&i2c4 {
++	i2c-scl-rising-time-ns = <600>;
++	i2c-scl-falling-time-ns = <20>;
++	status = "okay";
++};
++
++&i2c6 {
++	status = "okay";
++};
++
++&i2s0 {
++	rockchip,i2s-broken-burst-len;
++	rockchip,playback-channels = <8>;
++	rockchip,capture-channels = <8>;
++	status = "okay";
++};
++
++&i2s2 {
++	rockchip,bclk-fs = <128>;
++	status = "okay";
++};
++
++&io_domains {
++	status = "okay";
++
++	bt656-supply = <&vcc_3v0>;
++	audio-supply = <&vcc1v8_codec>;
++	sdmmc-supply = <&vcc_sdio>;
++	gpio1830-supply = <&vcc_3v0>;
++};
++
++&pmu_io_domains {
++	status = "okay";
++
++	pmu1830-supply = <&vcc_3v0>;
++};
++
++&pinctrl {
++	bt {
++		uart0_gpios: uart0-gpios {
++			rockchip,pins = <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	pmic {
++		pmic_int_l: pmic-int-l {
++			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++
++		vsel1_pin: vsel1-pin {
++			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++
++		vsel2_pin: vsel2-pin {
++			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++	};
++
++	usb2 {
++		vcc5v0_host_en: vcc5v0-host-en {
++			rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		hub_pwr: hub-pwr {
++			rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	wifi {
++		wifi_enable_h: wifi-enable-h {
++			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	rtc {
++		rtc_int: rtc-int {
++			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	led {
++		status_led_pin: status-led-pin {
++			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	rockchip-key {
++		power_key: power-key {
++			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++};
++
++&pwm0 {
++	status = "okay";
++};
++
++&pwm1 {
++	status = "okay";
++};
++
++&pwm2 {
++	status = "okay";
++};
++
++&saradc {
++	status = "okay";
++	vref-supply = <&vcc_1v8>;
++};
++
++&sdio0 {
++	#address-cells = <1>;
++	#size-cells = <0>;
++	bus-width = <4>;
++	clock-frequency = <50000000>;
++	cap-sdio-irq;
++	cap-sd-highspeed;
++	keep-power-in-suspend;
++	mmc-pwrseq = <&sdio_pwrseq>;
++	non-removable;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
++	sd-uhs-sdr104;
++	status = "okay";
++};
++
++&sdmmc {
++	clock-freq-min-max = <400000 150000000>;
++	bus-width = <4>;
++	cap-mmc-highspeed;
++	cap-sd-highspeed;
++	supports-sd;
++	disable-wp;
++	num-slots = <1>;
++	vqmmc-supply = <&vcc_sdio>;
++	max-frequency = <150000000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
++	status = "okay";
++};
++
++&sdhci {
++	bus-width = <8>;
++	keep-power-in-suspend;
++	mmc-hs400-1_8v;
++	mmc-hs400-enhanced-strobe;
++	non-removable;
++	supports-emmc;
++	status = "okay";
++};
++
++&tcphy0 {
++	status = "okay";
++};
++
++&tcphy1 {
++	status = "okay";
++};
++
++&tsadc {
++	status = "okay";
++	rockchip,hw-tshut-temp = <120000>;
++	/* tshut mode 0:CRU 1:GPIO */
++	rockchip,hw-tshut-mode = <1>;
++	/* tshut polarity 0:LOW 1:HIGH */
++	rockchip,hw-tshut-polarity = <1>;
++};
++
++&u2phy0 {
++	status = "okay";
++};
++
++
++&u2phy0_otg {
++	status = "okay";
++};
++
++&u2phy0_host {
++	status = "okay";
++};
++
++&u2phy1 {
++	status = "okay";
++};
++
++&u2phy1_otg {
++	status = "okay";
++};
++
++&u2phy1_host {
++	status = "okay";
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
++};
++
++&uart2 {
++	status = "okay";
++};
++
++&usb_host0_ehci {
++	status = "okay";
++};
++
++&usb_host0_ohci {
++	status = "okay";
++};
++
++&usb_host1_ehci {
++	status = "okay";
++};
++
++&usb_host1_ohci {
++	status = "okay";
++};
++
++&usbdrd3_0 {
++	status = "okay";
++};
++
++&usbdrd_dwc3_0 {
++	status = "okay";
++	dr_mode = "host";
++};
++
++&usbdrd3_1 {
++	status = "okay";
++};
++
++&usbdrd_dwc3_1 {
++	status = "okay";
++	dr_mode = "host";
++};
++
++&vopb {
++	status = "okay";
++};
++
++&vopb_mmu {
++	status = "okay";
++};
++
++&vopl {
++	status = "okay";
++};
++
++&vopl_mmu {
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3399-mpc1903-u-boot.dtsi
+@@ -0,0 +1,14 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include "rk3399-u-boot.dtsi"
++#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
++
++/ {
++	chosen {
++		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
++	};
++};
++
++&sdmmc {
++	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
++};
+--- /dev/null
++++ b/configs/rocktech-mpc1903-rk3399_defconfig
+@@ -0,0 +1,72 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00200000
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_DEFAULT_DEVICE_TREE="rk3399-mpc1903"
++CONFIG_ROCKCHIP_RK3399=y
++CONFIG_TARGET_EVB_RK3399=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFF1A0000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-mpc1903.dtb"
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x2e000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x400000
++CONFIG_SPL_BSS_MAX_SIZE=0x2000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
++CONFIG_TPL=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_HOST_ETHER=y
++CONFIG_USB_ETHER_ASIX=y
++CONFIG_USB_ETHER_ASIX88179=y
++CONFIG_USB_ETHER_MCS7830=y
++CONFIG_USB_ETHER_RTL8152=y
++CONFIG_USB_ETHER_SMSC95XX=y
++CONFIG_VIDEO=y
++CONFIG_DISPLAY=y
++CONFIG_VIDEO_ROCKCHIP=y
++CONFIG_DISPLAY_ROCKCHIP_HDMI=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/308-rockchip-rk3399-Add-support-for-sharevdi-h3399pc.patch

@@ -0,0 +1,933 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -145,6 +145,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ 	rk3399-gru-bob.dtb \
+ 	rk3399-guangmiao-g4c.dtb \
+ 	rk3399-gru-kevin.dtb \
++	rk3399-h3399pc.dtb \
+ 	rk3399-khadas-edge.dtb \
+ 	rk3399-khadas-edge-captain.dtb \
+ 	rk3399-khadas-edge-v.dtb \
+--- /dev/null
++++ b/arch/arm/dts/rk3399-h3399pc.dts
+@@ -0,0 +1,828 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
++ */
++
++/dts-v1/;
++#include <dt-bindings/input/linux-event-codes.h>
++#include "rk3399.dtsi"
++#include "rk3399-opp.dtsi"
++
++/ {
++	model = "SHAREVDI H3399PC";
++	compatible = "sharevdi,h3399pc", "rockchip,rk3399";
++
++	aliases {
++		mmc0 = &sdio0;
++		mmc1 = &sdmmc;
++		mmc2 = &sdhci;
++	};
++
++	chosen {
++		stdout-path = "serial2:1500000n8";
++	};
++
++	clkin_gmac: external-gmac-clock {
++		compatible = "fixed-clock";
++		clock-frequency = <125000000>;
++		clock-output-names = "clkin_gmac";
++		#clock-cells = <0>;
++	};
++
++	dc_12v: dc-12v {
++		compatible = "regulator-fixed";
++		regulator-name = "dc_12v";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <12000000>;
++		regulator-max-microvolt = <12000000>;
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++		autorepeat;
++
++		power {
++			debounce-interval = <100>;
++			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
++			label = "GPIO Key Power";
++			linux,code = <KEY_POWER>;
++			wakeup-source;
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
++
++		work_led: led-0 {
++			label = "work";
++			default-state = "on";
++			gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
++		};
++
++		diy_led: led-1 {
++			label = "diy";
++			default-state = "off";
++			gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
++		};
++	};
++
++	sound: sound {
++		compatible = "audio-graph-card";
++		label = "Analog";
++		dais = <&i2s0_p0>;
++	};
++
++	sound-dit {
++		compatible = "audio-graph-card";
++		label = "SPDIF";
++		dais = <&spdif_p0>;
++	};
++
++	spdif-dit {
++		compatible = "linux,spdif-dit";
++		#sound-dai-cells = <0>;
++
++		port {
++			dit_p0_0: endpoint {
++				remote-endpoint = <&spdif_p0_0>;
++			};
++		};
++	};
++
++	sdio_pwrseq: sdio-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rk808 1>;
++		clock-names = "ext_clock";
++		pinctrl-names = "default";
++		pinctrl-0 = <&wifi_enable_h>;
++
++		/*
++		 * On the module itself this is one of these (depending
++		 * on the actual card populated):
++		 * - SDIO_RESET_L_WL_REG_ON
++		 * - PDN (power down when low)
++		 */
++		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
++	};
++
++	sound-dit {
++		compatible = "audio-graph-card";
++		label = "SPDIF";
++		dais = <&spdif_p0>;
++	};
++
++	spdif-dit {
++		compatible = "linux,spdif-dit";
++		#sound-dai-cells = <0>;
++
++		port {
++			dit_p0_0: endpoint {
++				remote-endpoint = <&spdif_p0_0>;
++			};
++		};
++	};
++
++	/* switched by pmic_sleep */
++	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc1v8_s3";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		vin-supply = <&vcc_1v8>;
++	};
++
++	vcc1v8_sys: vcc1v8-sys {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc1v8_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++	};
++
++	vcc3v3_pcie: vcc3v3-pcie-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpio = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pcie_pwr_en>;
++		regulator-name = "vcc3v3_pcie";
++		regulator-always-on;
++		regulator-boot-on;
++		vin-supply = <&dc_12v>;
++	};
++
++	vcc3v3_3g: vcc3v3-3g-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		regulator-always-on;
++		regulator-boot-on;
++		gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pcie_3g_drv>;
++		regulator-name = "vcc3v3_3g";
++	};
++
++	vcc3v3_sys: vcc3v3-sys {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc3v3_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		vin-supply = <&vcc_sys>;
++	};
++
++	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
++	vcc5v0_host: vcc5v0-host-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vcc5v0_host_en>;
++		regulator-name = "vcc5v0_host";
++		regulator-always-on;
++		vin-supply = <&vcc_sys>;
++	};
++
++    	vcc5v0_hub: vcc5v0-hub-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vcc5v0_hub_en>;
++		regulator-name = "vcc5v0_hub";
++		regulator-always-on;
++		vin-supply = <&vcc_sys>;
++	};
++
++	vcc_sys: vcc-sys {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&dc_12v>;
++	};
++
++	vdd_log: vdd-log {
++		compatible = "pwm-regulator";
++		pwms = <&pwm2 0 25000 1>;
++		regulator-name = "vdd_log";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <800000>;
++		regulator-max-microvolt = <1100000>;
++		vin-supply = <&vcc_sys>;
++	};
++
++	vcc_phy: vcc-phy-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_phy";
++		regulator-always-on;
++		regulator-boot-on;
++	};
++};
++
++&cpu_l0 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l1 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l2 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l3 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_b0 {
++	cpu-supply = <&vdd_cpu_b>;
++};
++
++&cpu_b1 {
++	cpu-supply = <&vdd_cpu_b>;
++};
++
++&emmc_phy {
++	status = "okay";
++};
++
++&gmac {
++	assigned-clocks = <&cru SCLK_RMII_SRC>;
++	assigned-clock-parents = <&clkin_gmac>;
++	clock_in_out = "input";
++	phy-supply = <&vcc_lan>;
++	phy-mode = "rgmii";
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
++	snps,reset-active-low;
++	snps,reset-delays-us = <0 10000 50000>;
++	tx_delay = <0x28>;
++	rx_delay = <0x11>;
++	status = "okay";
++};
++
++&hdmi {
++	ddc-i2c-bus = <&i2c3>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&hdmi_cec>;
++	status = "okay";
++};
++
++&i2c0 {
++	clock-frequency = <400000>;
++	i2c-scl-rising-time-ns = <168>;
++	i2c-scl-falling-time-ns = <4>;
++	status = "okay";
++
++	rk808: pmic@1b {
++		compatible = "rockchip,rk808";
++		reg = <0x1b>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
++		#clock-cells = <1>;
++		clock-output-names = "xin32k", "rk808-clkout2";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_int_l>;
++		rockchip,system-power-controller;
++		wakeup-source;
++
++		vcc1-supply = <&vcc3v3_sys>;
++		vcc2-supply = <&vcc3v3_sys>;
++		vcc3-supply = <&vcc3v3_sys>;
++		vcc4-supply = <&vcc3v3_sys>;
++		vcc6-supply = <&vcc3v3_sys>;
++		vcc7-supply = <&vcc3v3_sys>;
++		vcc8-supply = <&vcc3v3_sys>;
++		vcc9-supply = <&vcc3v3_sys>;
++		vcc10-supply = <&vcc3v3_sys>;
++		vcc11-supply = <&vcc3v3_sys>;
++		vcc12-supply = <&vcc3v3_sys>;
++		vddio-supply = <&vcc1v8_pmu>;
++
++		regulators {
++			vdd_center: DCDC_REG1 {
++				regulator-name = "vdd_center";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_cpu_l: DCDC_REG2 {
++				regulator-name = "vdd_cpu_l";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_ddr: DCDC_REG3 {
++				regulator-name = "vcc_ddr";
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++				};
++			};
++
++			vcc_1v8: DCDC_REG4 {
++				regulator-name = "vcc_1v8";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcc2v8_dvp: LDO_REG1 {
++				regulator-name = "vcc2v8_dvp";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <2800000>;
++				regulator-max-microvolt = <2800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++
++			vcc1v8_dvp: LDO_REG2 {
++				regulator-name = "vcc1v8_dvp";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc1v8_pmu: LDO_REG3 {
++				regulator-name = "vcc1v8_pmu";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcc_sdio: LDO_REG4 {
++				regulator-name = "vcc_sdio";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3000000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3000000>;
++				};
++			};
++
++			vcca3v0_codec: LDO_REG5 {
++				regulator-name = "vcca3v0_codec";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_1v5: LDO_REG6 {
++				regulator-name = "vcc_1v5";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1500000>;
++				regulator-max-microvolt = <1500000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1500000>;
++				};
++			};
++
++			vcca1v8_codec: LDO_REG7 {
++				regulator-name = "vcca1v8_codec";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_3v0: LDO_REG8 {
++				regulator-name = "vcc_3v0";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3000000>;
++				};
++			};
++
++			vcc3v3_s3: vcc_lan: SWITCH_REG1 {
++				regulator-name = "vcc3v3_s3";
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v3_s0: SWITCH_REG2 {
++				regulator-name = "vcc3v3_s0";
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++		};
++	};
++
++	vdd_cpu_b: regulator@40 {
++		compatible = "silergy,syr827";
++		reg = <0x40>;
++		fcs,suspend-voltage-selector = <0>;
++		regulator-name = "vdd_cpu_b";
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
++		regulator-ramp-delay = <1000>;
++		regulator-always-on;
++		regulator-boot-on;
++		vin-supply = <&vcc_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	vdd_gpu: regulator@41 {
++		compatible = "silergy,syr828";
++		reg = <0x41>;
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_gpu";
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
++		regulator-ramp-delay = <1000>;
++		regulator-always-on;
++		regulator-boot-on;
++		vin-supply = <&vcc_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++};
++
++&i2c1 {
++	i2c-scl-rising-time-ns = <300>;
++	i2c-scl-falling-time-ns = <15>;
++	status = "okay";
++
++	es8316: codec@11 {
++		compatible = "everest,es8316";
++		reg = <0x11>;
++		clocks = <&cru SCLK_I2S_8CH_OUT>;
++		clock-names = "mclk";
++		#sound-dai-cells = <0>;
++		pinctrl-0 = <&i2s_8ch_mclk>;
++		spk-con-gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
++		hp-det-gpio = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;
++
++		port {
++			es8316_p0_0: endpoint {
++				remote-endpoint = <&i2s0_p0_0>;
++			};
++		};
++	};
++};
++
++&i2c2 {
++	status = "okay";
++};
++
++&i2s0 {
++	rockchip,playback-channels = <8>;
++	rockchip,capture-channels = <8>;
++	status = "okay";
++
++	i2s0_p0: port {
++		i2s0_p0_0: endpoint {
++			dai-format = "i2s";
++			mclk-fs = <256>;
++			remote-endpoint = <&es8316_p0_0>;
++		};
++	};
++};
++
++&i2s1 {
++	rockchip,playback-channels = <2>;
++	rockchip,capture-channels = <2>;
++	status = "okay";
++};
++
++&i2s2 {
++	status = "okay";
++};
++
++&io_domains {
++	status = "okay";
++
++	bt656-supply = <&vcc1v8_dvp>;
++	audio-supply = <&vcca1v8_codec>;
++	sdmmc-supply = <&vcc_sdio>;
++	gpio1830-supply = <&vcc_3v0>;
++};
++
++&pcie_phy {
++	status = "okay";
++};
++
++&pcie0 {
++	ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
++	num-lanes = <4>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pcie_clkreqn_cpm>;
++	status = "okay";
++	vpcie3v3-supply = <&vcc3v3_pcie>;
++};
++
++&pmu_io_domains {
++	pmu1830-supply = <&vcc_3v0>;
++	status = "okay";
++};
++
++&pinctrl {
++	i2s0 {
++		i2s_8ch_mclk: i2s-8ch-mclk {
++			rockchip,pins = <4 RK_PB4 1 &pcfg_pull_none>;
++		};
++	};
++
++	leds {
++		work_led_pin: work-led-pin {
++			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		diy_led_pin: diy-led-pin {
++			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	pcie {
++		pcie_pwr_en: pcie-pwr-en {
++			rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++
++		pcie_3g_drv: pcie-3g-drv {
++			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	pmic {
++		pmic_int_l: pmic-int-l {
++			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++
++		vsel1_pin: vsel1-pin {
++			rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++
++		vsel2_pin: vsel2-pin {
++			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++	};
++
++	sdio-pwrseq {
++		wifi_enable_h: wifi-enable-h {
++			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	usb2 {
++		vcc5v0_host_en: vcc5v0-host-en {
++			rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++
++		vcc5v0_host3_en: vcc5v0-host3-en {
++			rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++
++		vcc5v0_hub_en: vcc5v0-hub-en {
++			rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++};
++
++&pwm0 {
++	status = "okay";
++};
++
++&pwm2 {
++	status = "okay";
++};
++
++&saradc {
++	vref-supply = <&vcca1v8_s3>;
++	status = "okay";
++};
++
++&sdio0 {
++	/* WiFi & BT combo module Ampak AP6356S */
++	bus-width = <4>;
++	cap-sdio-irq;
++	cap-sd-highspeed;
++	keep-power-in-suspend;
++	mmc-pwrseq = <&sdio_pwrseq>;
++	non-removable;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
++	sd-uhs-sdr104;
++
++	/* Power supply */
++	vqmmc-supply = <&vcc1v8_s3>;	/* IO line */
++	vmmc-supply = <&vcc_sdio>;	/* card's power */
++
++	#address-cells = <1>;
++	#size-cells = <0>;
++	status = "okay";
++};
++
++&sdmmc {
++	bus-width = <4>;
++	cap-mmc-highspeed;
++	cap-sd-highspeed;
++	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
++	disable-wp;
++	max-frequency = <150000000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
++	status = "okay";
++};
++
++&sdhci {
++	bus-width = <8>;
++	mmc-hs400-1_8v;
++	mmc-hs400-enhanced-strobe;
++	non-removable;
++	status = "okay";
++};
++
++&spdif {
++	pinctrl-0 = <&spdif_bus_1>;
++	status = "okay";
++
++	spdif_p0: port {
++		spdif_p0_0: endpoint {
++			remote-endpoint = <&dit_p0_0>;
++		};
++	};
++};
++
++&tcphy0 {
++	status = "okay";
++};
++
++&tcphy1 {
++	status = "okay";
++};
++
++&tsadc {
++	/* tshut mode 0:CRU 1:GPIO */
++	rockchip,hw-tshut-mode = <1>;
++	/* tshut polarity 0:LOW 1:HIGH */
++	rockchip,hw-tshut-polarity = <1>;
++	status = "okay";
++};
++
++&u2phy0 {
++	status = "okay";
++};
++
++&u2phy0_otg {
++	status = "okay";
++};
++
++&u2phy0_host {
++	phy-supply = <&vcc5v0_host>;
++	status = "okay";
++};
++
++&u2phy1 {
++	status = "okay";
++};
++
++&u2phy1_otg {
++	status = "okay";
++};
++
++&u2phy1_host {
++	phy-supply = <&vcc5v0_host>;
++	status = "okay";
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_xfer &uart0_cts>;
++	status = "okay";
++};
++
++&uart2 {
++	status = "okay";
++};
++
++&usb_host0_ehci {
++	status = "okay";
++};
++
++&usb_host0_ohci {
++	status = "okay";
++};
++
++&usb_host1_ehci {
++	status = "okay";
++};
++
++&usb_host1_ohci {
++	status = "okay";
++};
++
++&usbdrd3_0 {
++	status = "okay";
++};
++
++&usbdrd_dwc3_0 {
++	status = "okay";
++	dr_mode = "otg";
++};
++
++&usbdrd3_1 {
++	status = "okay";
++};
++
++&usbdrd_dwc3_1 {
++	status = "okay";
++	dr_mode = "host";
++};
++
++&vopb {
++	status = "okay";
++};
++
++&vopb_mmu {
++	status = "okay";
++};
++
++&vopl {
++	status = "okay";
++};
++
++&vopl_mmu {
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3399-h3399pc-u-boot.dtsi
+@@ -0,0 +1,14 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include "rk3399-u-boot.dtsi"
++#include "rk3399-sdram-ddr3-1600.dtsi"
++
++/ {
++	chosen {
++		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
++	};
++};
++
++&sdmmc {
++	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
++};
+--- /dev/null
++++ b/configs/sharevdi-h3399pc-rk3399_defconfig
+@@ -0,0 +1,72 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00200000
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_DEFAULT_DEVICE_TREE="rk3399-h3399pc"
++CONFIG_ROCKCHIP_RK3399=y
++CONFIG_TARGET_EVB_RK3399=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFF1A0000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-h3399pc.dtb"
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x2e000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x400000
++CONFIG_SPL_BSS_MAX_SIZE=0x2000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
++CONFIG_TPL=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_HOST_ETHER=y
++CONFIG_USB_ETHER_ASIX=y
++CONFIG_USB_ETHER_ASIX88179=y
++CONFIG_USB_ETHER_MCS7830=y
++CONFIG_USB_ETHER_RTL8152=y
++CONFIG_USB_ETHER_SMSC95XX=y
++CONFIG_VIDEO=y
++CONFIG_DISPLAY=y
++CONFIG_VIDEO_ROCKCHIP=y
++CONFIG_DISPLAY_ROCKCHIP_HDMI=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/309-rockchip-rk3399-Add-support-for-dilusense-dlfr100.patch

@@ -0,0 +1,782 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -139,6 +139,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \
+ 	rk3368-px5-evb.dtb \
+ 
+ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
++	rk3399-dlfr100.dtb \
+ 	rk3399-evb.dtb \
+ 	rk3399-ficus.dtb \
+ 	rk3399-firefly.dtb \
+--- /dev/null
++++ b/arch/arm/dts/rk3399-dlfr100.dts
+@@ -0,0 +1,668 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
++ */
++
++/dts-v1/;
++#include <dt-bindings/pwm/pwm.h>
++#include <dt-bindings/input/input.h>
++#include "rk3399.dtsi"
++#include "rk3399-opp.dtsi"
++
++/ {
++	model = "Dilusense DLFR100";
++	compatible = "dilusense,dlfr100", "rockchip,rk3399";
++
++	chosen {
++		stdout-path = "serial2:1500000n8";
++	};
++
++	sdio_pwrseq: sdio-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rk808 1>;
++		clock-names = "ext_clock";
++		pinctrl-names = "default";
++		pinctrl-0 = <&wifi_enable_h>;
++		reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
++	};
++
++	clkin_gmac: external-gmac-clock {
++		compatible = "fixed-clock";
++		clock-frequency = <125000000>;
++		clock-output-names = "clkin_gmac";
++		#clock-cells = <0>;
++	};
++
++	vcc3v3_sys: vcc3v3-sys {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc3v3_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++
++	vcc5v0_sys: vcc5v0-sys {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc5v0_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++	};
++
++	vcc5v0_host: vcc5v0-host-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vcc5v0_host_en>;
++		regulator-name = "vcc5v0_host";
++	};
++
++	vcc_phy: vcc-phy-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_phy";
++		regulator-always-on;
++		regulator-boot-on;
++	};
++
++	vcc_sd: vcc-sd {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vcc_sd_h>;
++		regulator-name = "vcc_sd";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++
++	adc-keys {
++		compatible = "adc-keys";
++		io-channels = <&saradc 1>;
++		io-channel-names = "buttons";
++		keyup-threshold-microvolt = <1800000>;
++		poll-interval = <100>;
++
++		button-up {
++			label = "Volume Up";
++			linux,code = <KEY_VOLUMEUP>;
++			press-threshold-microvolt = <100000>;
++		};
++
++		button-down {
++			label = "Volume Down";
++			linux,code = <KEY_VOLUMEDOWN>;
++			press-threshold-microvolt = <300000>;
++		};
++
++		back {
++			label = "Back";
++			linux,code = <KEY_BACK>;
++			press-threshold-microvolt = <985000>;
++		};
++
++		menu {
++			label = "Menu";
++			linux,code = <KEY_MENU>;
++			press-threshold-microvolt = <0x1314000>;
++		};
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++		autorepeat;
++		pinctrl-0 = <&pwr_btn>;
++
++		power {
++			debounce-interval = <100>;
++			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
++			label = "GPIO Key Power";
++			linux,code = <KEY_POWER>;
++			wakeup-source;
++		};
++	};
++};
++
++&cpu_l0 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l1 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l2 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l3 {
++	cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_b0 {
++	cpu-supply = <&vdd_cpu_b>;
++};
++
++&cpu_b1 {
++	cpu-supply = <&vdd_cpu_b>;
++};
++
++&emmc_phy {
++	status = "okay";
++};
++
++&gmac {
++	assigned-clocks = <&cru SCLK_RMII_SRC>;
++	assigned-clock-parents = <&clkin_gmac>;
++	clock_in_out = "input";
++	phy-supply = <&vcc_phy>;
++	phy-mode = "rgmii";
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
++	snps,reset-active-low;
++	snps,reset-delays-us = <0 10000 50000>;
++	tx_delay = <0x28>;
++	rx_delay = <0x11>;
++	status = "okay";
++};
++
++&i2c0 {
++	status = "okay";
++
++	rk808: pmic@1b {
++		compatible = "rockchip,rk808";
++		reg = <0x1b>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
++		rockchip,system-power-controller;
++		wakeup-source;
++		#clock-cells = <1>;
++		clock-output-names = "rk808-clkout1", "rk808-clkout2";
++
++		vcc1-supply = <&vcc3v3_sys>;
++		vcc2-supply = <&vcc3v3_sys>;
++		vcc3-supply = <&vcc3v3_sys>;
++		vcc4-supply = <&vcc3v3_sys>;
++		vcc6-supply = <&vcc3v3_sys>;
++		vcc7-supply = <&vcc3v3_sys>;
++		vcc8-supply = <&vcc3v3_sys>;
++		vcc9-supply = <&vcc3v3_sys>;
++		vcc10-supply = <&vcc3v3_sys>;
++		vcc11-supply = <&vcc3v3_sys>;
++		vcc12-supply = <&vcc3v3_sys>;
++		vddio-supply = <&vcc1v8_pmu>;
++
++		regulators {
++			vdd_center: DCDC_REG1 {
++				regulator-name = "vdd_center";
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_cpu_l: DCDC_REG2 {
++				regulator-name = "vdd_cpu_l";
++				regulator-min-microvolt = <750000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_ddr: DCDC_REG3 {
++				regulator-name = "vcc_ddr";
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++				};
++			};
++
++			vcc_1v8: DCDC_REG4 {
++				regulator-name = "vcc_1v8";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcc1v8_dvp: LDO_REG1 {
++				regulator-name = "vcc1v8_dvp";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v0_tp: LDO_REG2 {
++				regulator-name = "vcc3v0_tp";
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc1v8_pmu: LDO_REG3 {
++				regulator-name = "vcc1v8_pmu";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcc_sdio: LDO_REG4 {
++				regulator-name = "vcc_sdio";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3000000>;
++				};
++			};
++
++			vcca3v0_codec: LDO_REG5 {
++				regulator-name = "vcca3v0_codec";
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_1v5: LDO_REG6 {
++				regulator-name = "vcc_1v5";
++				regulator-min-microvolt = <1500000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1500000>;
++				};
++			};
++
++			vcca1v8_codec: LDO_REG7 {
++				regulator-name = "vcca1v8_codec";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_3v0: LDO_REG8 {
++				regulator-name = "vcc_3v0";
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3000000>;
++				};
++			};
++
++			vcc3v3_s3: SWITCH_REG1 {
++				regulator-name = "vcc3v3_s3";
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v3_s0: SWITCH_REG2 {
++				regulator-name = "vcc3v3_s0";
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++		};
++	};
++
++	vdd_cpu_b: regulator@40 {
++		compatible = "silergy,syr827";
++		reg = <0x40>;
++		pinctrl-0 = <&vsel1_pin>;
++		pinctrl-names = "default";
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_cpu_b";
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
++		regulator-ramp-delay = <1000>;
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-initial-state = <3>;
++		vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
++		vin-supply = <&vcc3v3_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	vdd_gpu: regulator@41 {
++		compatible = "silergy,syr828";
++		reg = <0x41>;
++		pinctrl-0 = <&vsel2_pin>;
++		pinctrl-names = "default";
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_gpu";
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
++		regulator-ramp-delay = <1000>;
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-initial-state = <3>;
++		vsel-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
++		vin-supply = <&vcc3v3_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	isl1208@6f {
++		compatible = "isil,isl1208";
++		reg = <0x6f>;
++	};
++};
++
++&i2c1 {
++	i2c-scl-rising-time-ns = <300>;
++	i2c-scl-falling-time-ns = <15>;
++	status = "okay";
++};
++
++&i2c2 {
++	status = "okay";
++};
++
++&i2c3 {
++	status = "okay";
++};
++
++&i2s0 {
++	rockchip,playback-channels = <8>;
++	rockchip,capture-channels = <8>;
++	status = "okay";
++};
++
++&i2s2 {
++	status = "okay";
++};
++
++&io_domains {
++	status = "okay";
++
++	bt656-supply = <&vcc_3v0>;
++	audio-supply = <&vcca1v8_codec>;
++	sdmmc-supply = <&vcc_sdio>;
++	gpio1830-supply = <&vcc_3v0>;
++};
++
++&pwm0 {
++	status = "okay";
++};
++
++&pwm1 {
++	status = "okay";
++};
++
++&pwm2 {
++	status = "okay";
++};
++
++&pwm3 {
++	status = "okay";
++};
++
++&sdio0 {
++	bus-width = <4>;
++	disable-wp;
++	cap-sd-highspeed;
++	cap-sdio-irq;
++	keep-power-in-suspend;
++	clock-frequency = <50000000>;
++	mmc-pwrseq = <&sdio_pwrseq>;
++	non-removable;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
++	status = "okay";
++};
++
++&sdmmc {
++	bus-width = <4>;
++	cap-sd-highspeed;
++	cap-mmc-highspeed;
++	clock-frequency = <150000000>;
++	disable-wp;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
++	sd-uhs-sdr104;
++	vmmc-supply = <&vcc_sd>;
++	vqmmc-supply = <&vcc_sdio>;
++	status = "okay";
++};
++
++&sdhci {
++	bus-width = <8>;
++	mmc-hs400-1_8v;
++	mmc-hs400-enhanced-strobe;
++	non-removable;
++	status = "okay";
++};
++
++&pcie_phy {
++	status = "okay";
++};
++
++&pcie0 {
++	ep-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
++	max-link-speed = <1>;
++	num-lanes = <1>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pcie_clkreqn_cpm>;
++	status = "okay";
++};
++
++&pinctrl {
++	buttons {
++		pwr_btn: pwr-btn {
++			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	i2s0 {
++		i2s_8ch_mclk: i2s-8ch-mclk {
++			rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>;
++		};
++	};
++
++	pmic {
++		pmic_int_l: pmic-int-l {
++			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++
++		vsel1_pin: vsel1-pin {
++			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++
++		vsel2_pin: vsel2-pin {
++			rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++
++		pmic_dvs2:pmic-dvs2 {
++			rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++	};
++
++	sdio-pwrseq {
++		wifi_enable_h: wifi-enable-h {
++			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	usb2 {
++		vcc5v0_host_en: vcc5v0-host-en {
++			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	vcc_sd {
++		vcc_sd_h: vcc-sd-h {
++			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++};
++
++&tcphy0 {
++	status = "okay";
++};
++
++&tcphy1 {
++	status = "okay";
++};
++
++&tsadc {
++	/* tshut mode 0:CRU 1:GPIO */
++	rockchip,hw-tshut-mode = <1>;
++	/* tshut polarity 0:LOW 1:HIGH */
++	rockchip,hw-tshut-polarity = <1>;
++	status = "okay";
++};
++
++&u2phy0 {
++	status = "okay";
++};
++
++&u2phy0_otg {
++	status = "okay";
++};
++
++&u2phy0_host {
++	phy-supply = <&vcc5v0_host>;
++	status = "okay";
++};
++
++&u2phy1 {
++	status = "okay";
++};
++
++&u2phy1_otg {
++	status = "okay";
++};
++
++&u2phy1_host {
++	phy-supply = <&vcc5v0_host>;
++	status = "okay";
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_xfer &uart0_cts>;
++	status = "okay";
++};
++
++&uart2 {
++	status = "okay";
++};
++
++&usb_host0_ehci {
++	status = "okay";
++};
++
++&usb_host0_ohci {
++	status = "okay";
++};
++
++&usb_host1_ehci {
++	status = "okay";
++};
++
++&usb_host1_ohci {
++	status = "okay";
++};
++
++&usbdrd3_0 {
++	status = "okay";
++};
++
++&usbdrd_dwc3_0 {
++	status = "okay";
++	dr_mode = "host";
++};
++
++&usbdrd3_1 {
++	status = "okay";
++};
++
++&usbdrd_dwc3_1 {
++	status = "okay";
++	dr_mode = "host";
++};
++
++&vopb {
++	status = "okay";
++};
++
++&vopb_mmu {
++	status = "okay";
++};
++
++&vopl {
++	status = "okay";
++};
++
++&vopl_mmu {
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3399-dlfr100-u-boot.dtsi
+@@ -0,0 +1,23 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include "rk3399-u-boot.dtsi"
++#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
++
++/ {
++	chosen {
++		stdout-path = "serial2:1500000n8";
++		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
++	};
++};
++
++&sdmmc {
++	u-boot,dm-pre-reloc;
++	bus-width = <4>;
++	cap-mmc-highspeed;
++	cap-sd-highspeed;
++	disable-wp;
++	max-frequency = <150000000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
++	status = "okay";
++};
+--- /dev/null
++++ b/configs/dilusense-dlfr100-rk3399_defconfig
+@@ -0,0 +1,72 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00200000
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
++CONFIG_ENV_OFFSET=0x3F8000
++CONFIG_DEFAULT_DEVICE_TREE="rk3399-dlfr100"
++CONFIG_ROCKCHIP_RK3399=y
++CONFIG_TARGET_EVB_RK3399=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFF1A0000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_DEBUG_UART=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-dlfr100.dtb"
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x2e000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x400000
++CONFIG_SPL_BSS_MAX_SIZE=0x2000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
++CONFIG_TPL=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_ENV_IS_IN_MMC=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_HOST_ETHER=y
++CONFIG_USB_ETHER_ASIX=y
++CONFIG_USB_ETHER_ASIX88179=y
++CONFIG_USB_ETHER_MCS7830=y
++CONFIG_USB_ETHER_RTL8152=y
++CONFIG_USB_ETHER_SMSC95XX=y
++CONFIG_VIDEO=y
++CONFIG_DISPLAY=y
++CONFIG_VIDEO_ROCKCHIP=y
++CONFIG_DISPLAY_ROCKCHIP_HDMI=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/311-rockchip-rk3568-Add-support-for-ezpro_mrkaio-m68s.patch

@@ -0,0 +1,399 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -171,6 +171,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ 
+ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
+ 	rk3568-evb.dtb \
++	rk3568-mrkaio-m68s.dtb \
+ 	rk3568-nanopi-r5s.dtb \
+ 	rk3566-radxa-cm3-io.dtb \
+ 	rk3568-rock-3a.dtb
+--- /dev/null
++++ b/arch/arm/dts/rk3568-mrkaio-m68s-u-boot.dtsi
+@@ -0,0 +1,21 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk356x-u-boot.dtsi"
++
++/ {
++	chosen {
++		stdout-path = &uart2;
++		u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
++	};
++};
++
++&sdmmc0 {
++	bus-width = <4>;
++	u-boot,spl-fifo-mode;
++};
++
++&uart2 {
++	u-boot,dm-spl;
++	clock-frequency = <24000000>;
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3568-mrkaio-m68s.dts
+@@ -0,0 +1,268 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk3568-evb.dts"
++
++/ {
++	model = "EZPRO Mrkaio M68S";
++	compatible = "ezpro,mrkaio-m68s", "rockchip,rk3568";
++
++	aliases {
++		mmc0 = &sdmmc0;
++		mmc1 = &sdhci;
++	};
++};
++
++&cpu0 {
++	cpu-supply = <&vdd_cpu>;
++};
++
++&cpu1 {
++	cpu-supply = <&vdd_cpu>;
++};
++
++&cpu2 {
++	cpu-supply = <&vdd_cpu>;
++};
++
++&cpu3 {
++	cpu-supply = <&vdd_cpu>;
++};
++
++&i2c0 {
++	status = "okay";
++
++	vdd_cpu: regulator@1c {
++		compatible = "tcs,tcs4525";
++		reg = <0x1c>;
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_cpu";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1150000>;
++		regulator-ramp-delay = <2300>;
++		vin-supply = <&vcc5v0_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	rk809: pmic@20 {
++		compatible = "rockchip,rk809";
++		reg = <0x20>;
++		interrupt-parent = <&gpio0>;
++		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
++		#clock-cells = <1>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_int>;
++		rockchip,system-power-controller;
++
++		vcc1-supply = <&vcc3v3_sys>;
++		vcc2-supply = <&vcc3v3_sys>;
++		vcc3-supply = <&vcc3v3_sys>;
++		vcc4-supply = <&vcc3v3_sys>;
++		vcc5-supply = <&vcc3v3_sys>;
++		vcc6-supply = <&vcc3v3_sys>;
++		vcc7-supply = <&vcc3v3_sys>;
++		vcc8-supply = <&vcc3v3_sys>;
++		vcc9-supply = <&vcc3v3_sys>;
++		wakeup-source;
++
++		regulators {
++			vdd_logic: DCDC_REG1 {
++				regulator-name = "vdd_logic";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-init-microvolt = <900000>;
++				regulator-initial-mode = <0x2>;
++				regulator-min-microvolt = <500000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_gpu: DCDC_REG2 {
++				regulator-name = "vdd_gpu";
++				regulator-always-on;
++				regulator-init-microvolt = <900000>;
++				regulator-initial-mode = <0x2>;
++				regulator-min-microvolt = <500000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_ddr: DCDC_REG3 {
++				regulator-name = "vcc_ddr";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-initial-mode = <0x2>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++				};
++			};
++
++			vdd_npu: DCDC_REG4 {
++				regulator-name = "vdd_npu";
++				regulator-init-microvolt = <900000>;
++				regulator-initial-mode = <0x2>;
++				regulator-min-microvolt = <500000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_1v8: DCDC_REG5 {
++				regulator-name = "vcc_1v8";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdda0v9_image: LDO_REG1 {
++				regulator-name = "vdda0v9_image";
++				regulator-min-microvolt = <900000>;
++				regulator-max-microvolt = <900000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdda_0v9: LDO_REG2 {
++				regulator-name = "vdda_0v9";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <900000>;
++				regulator-max-microvolt = <900000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdda0v9_pmu: LDO_REG3 {
++				regulator-name = "vdda0v9_pmu";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <900000>;
++				regulator-max-microvolt = <900000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <900000>;
++				};
++			};
++
++			vccio_acodec: LDO_REG4 {
++				regulator-name = "vccio_acodec";
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vccio_sd: LDO_REG5 {
++				regulator-name = "vccio_sd";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v3_pmu: LDO_REG6 {
++				regulator-name = "vcc3v3_pmu";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3300000>;
++				};
++			};
++
++			vcca_1v8: LDO_REG7 {
++				regulator-name = "vcca_1v8";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcca1v8_pmu: LDO_REG8 {
++				regulator-name = "vcca1v8_pmu";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcca1v8_image: LDO_REG9 {
++				regulator-name = "vcca1v8_image";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_3v3: SWITCH_REG1 {
++				regulator-name = "vcc_3v3";
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v3_sd: SWITCH_REG2 {
++				regulator-name = "vcc3v3_sd";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++		};
++	};
++};
++
++&pinctrl {
++	pmic {
++		pmic_int: pmic_int {
++			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++};
+--- /dev/null
++++ b/configs/mrkaio-m68s-rk3568_defconfig
+@@ -0,0 +1,91 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00a00000
++CONFIG_SPL_LIBCOMMON_SUPPORT=y
++CONFIG_SPL_LIBGENERIC_SUPPORT=y
++CONFIG_NR_DRAM_BANKS=2
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
++CONFIG_DEFAULT_DEVICE_TREE="rk3568-mrkaio-m68s"
++CONFIG_ROCKCHIP_RK3568=y
++CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
++CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
++CONFIG_SPL_BOARD_INIT=y
++CONFIG_SPL_MMC=y
++CONFIG_SPL_SERIAL=y
++CONFIG_SPL_STACK_R_ADDR=0x600000
++CONFIG_TARGET_EVB_RK3568=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFE660000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-mrkaio-m68s.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x4000000
++CONFIG_SPL_BSS_MAX_SIZE=0x4000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_ADC=y
++CONFIG_SPL_ATF=y
++CONFIG_CMD_ADC=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_CMD_SETEXPR is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SPL_CLK=y
++CONFIG_CLK_SCMI=y
++CONFIG_RESET_SCMI=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_SPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/312-rockchip-rk3568-Add-support-for-hinlink-opc-h68k.patch

@@ -0,0 +1,408 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -171,6 +171,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ 
+ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
+ 	rk3568-evb.dtb \
++	rk3568-opc-h68k.dtb \
+ 	rk3568-mrkaio-m68s.dtb \
+ 	rk3568-nanopi-r5s.dtb \
+ 	rk3566-radxa-cm3-io.dtb \
+--- /dev/null
++++ b/arch/arm/dts/rk3568-opc-h68k-u-boot.dtsi
+@@ -0,0 +1,21 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk356x-u-boot.dtsi"
++
++/ {
++	chosen {
++		stdout-path = &uart2;
++		u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
++	};
++};
++
++&sdmmc0 {
++	bus-width = <4>;
++	u-boot,spl-fifo-mode;
++};
++
++&uart2 {
++	u-boot,dm-spl;
++	clock-frequency = <24000000>;
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3568-opc-h68k.dts
+@@ -0,0 +1,277 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk3568-evb.dts"
++
++/ {
++	model = "HINLINK OPC-H68K Board";
++	compatible = "hinlink,opc-h68k", "rockchip,rk3568";
++
++	aliases {
++		mmc0 = &sdmmc0;
++		mmc1 = &sdhci;
++	};
++};
++
++&cpu0 {
++	cpu-supply = <&vdd_cpu>;
++};
++
++&cpu1 {
++	cpu-supply = <&vdd_cpu>;
++};
++
++&cpu2 {
++	cpu-supply = <&vdd_cpu>;
++};
++
++&cpu3 {
++	cpu-supply = <&vdd_cpu>;
++};
++
++&i2c0 {
++	status = "okay";
++
++	vdd_cpu: regulator@1c {
++		compatible = "tcs,tcs4525";
++		reg = <0x1c>;
++		fcs,suspend-voltage-selector = <1>;
++		regulator-name = "vdd_cpu";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <800000>;
++		regulator-max-microvolt = <1150000>;
++		regulator-ramp-delay = <2300>;
++		vin-supply = <&vcc5v0_sys>;
++
++		regulator-state-mem {
++			regulator-off-in-suspend;
++		};
++	};
++
++	rk809: pmic@20 {
++		compatible = "rockchip,rk809";
++		reg = <0x20>;
++		interrupt-parent = <&gpio0>;
++		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
++		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
++		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
++		#clock-cells = <1>;
++		clock-names = "mclk";
++		clocks = <&cru I2S1_MCLKOUT_TX>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
++		rockchip,system-power-controller;
++		#sound-dai-cells = <0>;
++		vcc1-supply = <&vcc3v3_sys>;
++		vcc2-supply = <&vcc3v3_sys>;
++		vcc3-supply = <&vcc3v3_sys>;
++		vcc4-supply = <&vcc3v3_sys>;
++		vcc5-supply = <&vcc3v3_sys>;
++		vcc6-supply = <&vcc3v3_sys>;
++		vcc7-supply = <&vcc3v3_sys>;
++		vcc8-supply = <&vcc3v3_sys>;
++		vcc9-supply = <&vcc3v3_sys>;
++		wakeup-source;
++
++		regulators {
++			vdd_logic: DCDC_REG1 {
++				regulator-name = "vdd_logic";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-init-microvolt = <900000>;
++				regulator-initial-mode = <0x2>;
++				regulator-min-microvolt = <500000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdd_gpu: DCDC_REG2 {
++				regulator-name = "vdd_gpu";
++				regulator-always-on;
++				regulator-init-microvolt = <900000>;
++				regulator-initial-mode = <0x2>;
++				regulator-min-microvolt = <500000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_ddr: DCDC_REG3 {
++				regulator-name = "vcc_ddr";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-initial-mode = <0x2>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++				};
++			};
++
++			vdd_npu: DCDC_REG4 {
++				regulator-name = "vdd_npu";
++				regulator-init-microvolt = <900000>;
++				regulator-initial-mode = <0x2>;
++				regulator-min-microvolt = <500000>;
++				regulator-max-microvolt = <1350000>;
++				regulator-ramp-delay = <6001>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_1v8: DCDC_REG5 {
++				regulator-name = "vcc_1v8";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdda0v9_image: LDO_REG1 {
++				regulator-name = "vdda0v9_image";
++				regulator-min-microvolt = <900000>;
++				regulator-max-microvolt = <900000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdda_0v9: LDO_REG2 {
++				regulator-name = "vdda_0v9";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <900000>;
++				regulator-max-microvolt = <900000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vdda0v9_pmu: LDO_REG3 {
++				regulator-name = "vdda0v9_pmu";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <900000>;
++				regulator-max-microvolt = <900000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <900000>;
++				};
++			};
++
++			vccio_acodec: LDO_REG4 {
++				regulator-name = "vccio_acodec";
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vccio_sd: LDO_REG5 {
++				regulator-name = "vccio_sd";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v3_pmu: LDO_REG6 {
++				regulator-name = "vcc3v3_pmu";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <3300000>;
++				};
++			};
++
++			vcca_1v8: LDO_REG7 {
++				regulator-name = "vcca_1v8";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcca1v8_pmu: LDO_REG8 {
++				regulator-name = "vcca1v8_pmu";
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++				};
++			};
++
++			vcca1v8_image: LDO_REG9 {
++				regulator-name = "vcca1v8_image";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc_3v3: SWITCH_REG1 {
++				regulator-name = "vcc_3v3";
++				regulator-always-on;
++				regulator-boot-on;
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			vcc3v3_sd: SWITCH_REG2 {
++				regulator-name = "vcc3v3_sd";
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++		};
++
++		codec {
++			mic-in-differential;
++		};
++	};
++};
++
++&pinctrl {
++	pmic {
++		pmic_int: pmic_int {
++			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++};
+--- /dev/null
++++ b/configs/opc-h68k-rk3568_defconfig
+@@ -0,0 +1,91 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00a00000
++CONFIG_SPL_LIBCOMMON_SUPPORT=y
++CONFIG_SPL_LIBGENERIC_SUPPORT=y
++CONFIG_NR_DRAM_BANKS=2
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
++CONFIG_DEFAULT_DEVICE_TREE="rk3568-opc-h68k"
++CONFIG_ROCKCHIP_RK3568=y
++CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
++CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
++CONFIG_SPL_BOARD_INIT=y
++CONFIG_SPL_MMC=y
++CONFIG_SPL_SERIAL=y
++CONFIG_SPL_STACK_R_ADDR=0x600000
++CONFIG_TARGET_EVB_RK3568=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFE660000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-opc-h68k.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x4000000
++CONFIG_SPL_BSS_MAX_SIZE=0x4000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_ADC=y
++CONFIG_SPL_ATF=y
++CONFIG_CMD_ADC=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_CMD_SETEXPR is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SPL_CLK=y
++CONFIG_CLK_SCMI=y
++CONFIG_RESET_SCMI=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_SPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/313-rockchip-rk3568-Add-support-for-fastrhino-r66s.patch

@@ -0,0 +1,133 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -171,6 +171,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ 
+ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
+ 	rk3568-evb.dtb \
++	rk3568-r66s.dtb \
+ 	rk3568-opc-h68k.dtb \
+ 	rk3568-mrkaio-m68s.dtb \
+ 	rk3568-nanopi-r5s.dtb \
+--- /dev/null
++++ b/arch/arm/dts/rk3568-r66s-u-boot.dtsi
+@@ -0,0 +1,21 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk356x-u-boot.dtsi"
++
++/ {
++	chosen {
++		stdout-path = &uart2;
++		u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
++	};
++};
++
++&sdmmc0 {
++	bus-width = <4>;
++	u-boot,spl-fifo-mode;
++};
++
++&uart2 {
++	u-boot,dm-spl;
++	clock-frequency = <24000000>;
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3568-r66s.dts
+@@ -0,0 +1,2 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++#include "rk3568-evb.dts"
+--- /dev/null
++++ b/configs/r66s-rk3568_defconfig
+@@ -0,0 +1,91 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00a00000
++CONFIG_SPL_LIBCOMMON_SUPPORT=y
++CONFIG_SPL_LIBGENERIC_SUPPORT=y
++CONFIG_NR_DRAM_BANKS=2
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
++CONFIG_DEFAULT_DEVICE_TREE="rk3568-r66s"
++CONFIG_ROCKCHIP_RK3568=y
++CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
++CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
++CONFIG_SPL_BOARD_INIT=y
++CONFIG_SPL_MMC=y
++CONFIG_SPL_SERIAL=y
++CONFIG_SPL_STACK_R_ADDR=0x600000
++CONFIG_TARGET_EVB_RK3568=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFE660000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-r66s.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x4000000
++CONFIG_SPL_BSS_MAX_SIZE=0x4000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_ADC=y
++CONFIG_SPL_ATF=y
++CONFIG_CMD_ADC=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_CMD_SETEXPR is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SPL_CLK=y
++CONFIG_CLK_SCMI=y
++CONFIG_RESET_SCMI=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_SPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/314-rockchip-rk3568-Add-support-for-Station-P2.patch

@@ -0,0 +1,100 @@
+From 18e3719c5d5b1573c29d137c1244ca23277750b2 Mon Sep 17 00:00:00 2001
+From: huangjf <hjf@t-chip.com.cn>
+Date: Thu, 7 Apr 2022 16:22:56 +0800
+Subject: [PATCH] rockchip: rk3568: Add support for Station P2
+
+---
+ configs/station-p2-rk3568_defconfig | 59 +++++++++++++++++++++++++++++
+ 1 file changed, 59 insertions(+)
+ create mode 100644 configs/station-p2-rk3568_defconfig
+
+--- /dev/null
++++ b/configs/station-p2-rk3568_defconfig
+@@ -0,0 +1,87 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00a00000
++CONFIG_SPL_LIBCOMMON_SUPPORT=y
++CONFIG_SPL_LIBGENERIC_SUPPORT=y
++CONFIG_NR_DRAM_BANKS=2
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
++CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
++CONFIG_ROCKCHIP_RK3568=y
++CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
++CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
++CONFIG_SPL_MMC=y
++CONFIG_SPL_SERIAL=y
++CONFIG_SPL_STACK_R_ADDR=0x600000
++CONFIG_TARGET_EVB_RK3568=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFE660000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x4000000
++CONFIG_SPL_BSS_MAX_SIZE=0x4000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_ATF=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_CMD_SETEXPR is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SPL_CLK=y
++CONFIG_CLK_SCMI=y
++CONFIG_RESET_SCMI=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_SPL_RAM=y
++CONFIG_DM_RESET=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/314-rockchip-rk3568-Add-support-for-photonicat.patch

@@ -0,0 +1,200 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -175,6 +175,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ 	rk3568-opc-h68k.dtb \
+ 	rk3568-mrkaio-m68s.dtb \
+ 	rk3568-nanopi-r5s.dtb \
++	rk3568-photonicat.dtb \
+ 	rk3566-radxa-cm3-io.dtb \
+ 	rk3568-rock-3a.dtb
+ 
+--- /dev/null
++++ b/arch/arm/dts/rk3568-photonicat-u-boot.dtsi
+@@ -0,0 +1,33 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk356x-u-boot.dtsi"
++
++/ {
++	chosen {
++		stdout-path = &uart2;
++		u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
++	};
++};
++
++&gpio0 {
++	u-boot,dm-spl;
++};
++
++&pinctrl {
++	u-boot,dm-spl;
++};
++
++&sdmmc0 {
++	bus-width = <4>;
++	u-boot,spl-fifo-mode;
++};
++
++&uart2 {
++	u-boot,dm-spl;
++	clock-frequency = <24000000>;
++	status = "okay";
++};
++
++&vcc3v3_sd {
++	u-boot,dm-spl;
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3568-photonicat.dts
+@@ -0,0 +1,54 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/rockchip.h>
++#include "rk3568.dtsi"
++
++/ {
++	model = "Ariaboard Photonicat";
++	compatible = "ariaboard,photonicat", "rockchip,rk3568";
++
++	chosen: chosen {
++		stdout-path = "serial2:1500000n8";
++	};
++
++	vcc3v3_sd: vcc3v3_sd {
++		compatible = "regulator-fixed";
++		gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&vcc_sd_h>;
++		regulator-boot-on;
++		regulator-name = "vcc3v3_sd";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++};
++
++&pinctrl {
++	vcc_sd {
++		vcc_sd_h: vcc-sd-h {
++			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++};
++
++&sdhci {
++	bus-width = <8>;
++	max-frequency = <200000000>;
++	non-removable;
++	status = "okay";
++};
++
++&sdmmc0 {
++	max-frequency = <52000000>;
++	status = "okay";
++};
++
++&sdmmc1 {
++	status = "okay";
++};
++
++&uart2 {
++	status = "okay";
++};
+--- /dev/null
++++ b/configs/photonicat-rk3568_defconfig
+@@ -0,0 +1,94 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00a00000
++CONFIG_SPL_LIBCOMMON_SUPPORT=y
++CONFIG_SPL_LIBGENERIC_SUPPORT=y
++CONFIG_NR_DRAM_BANKS=2
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
++CONFIG_DEFAULT_DEVICE_TREE="rk3568-photonicat"
++CONFIG_ROCKCHIP_RK3568=y
++CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
++CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
++CONFIG_SPL_GPIO=y
++CONFIG_SPL_MMC=y
++CONFIG_SPL_SERIAL=y
++CONFIG_SPL_STACK_R_ADDR=0x600000
++CONFIG_TARGET_EVB_RK3568=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFE660000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-photonicat.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x4000000
++CONFIG_SPL_BSS_MAX_SIZE=0x4000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_ADC=y
++CONFIG_SPL_ATF=y
++CONFIG_SPL_BOARD_INIT=y
++CONFIG_CMD_ADC=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_CMD_SETEXPR is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SPL_CLK=y
++CONFIG_CLK_SCMI=y
++CONFIG_RESET_SCMI=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MISC=y
++CONFIG_MMC_IO_VOLTAGE=y
++CONFIG_SPL_MMC_IO_VOLTAGE=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_SPL_DM_REGULATOR_FIXED=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_SPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_ERRNO_STR=y

5.4/package/boot/uboot-rockchip/patches/315-rockchip-rk3568-Add-support-for-radxa_e25.patch

@@ -0,0 +1,139 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -177,7 +177,8 @@ rk3568-evb.dtb \
+ 	rk3568-nanopi-r5s.dtb \
+ 	rk3568-photonicat.dtb \
+ 	rk3566-radxa-cm3-io.dtb \
+-	rk3568-rock-3a.dtb
++	rk3568-rock-3a.dtb \
++	rk3568-radxa-e25.dtb
+ 
+ dtb-$(CONFIG_ROCKCHIP_RK3588) += \
+ 	rk3588-edgeble-neu6a-io.dtb \
+--- /dev/null
++++ b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
+@@ -0,0 +1,21 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk356x-u-boot.dtsi"
++
++/ {
++	chosen {
++		stdout-path = &uart2;
++		u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
++	};
++};
++
++&sdmmc0 {
++	bus-width = <4>;
++	u-boot,spl-fifo-mode;
++};
++
++&uart2 {
++	u-boot,dm-spl;
++	clock-frequency = <24000000>;
++	status = "okay";
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3568-radxa-e25.dts
+@@ -0,0 +1,8 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk3568-evb.dts"
++
++/ {
++	model = "Radxa E25";
++	compatible = "radxa,e25", "rockchip,rk3568";
++};
+--- /dev/null
++++ b/configs/radxa-e25-rk3568_defconfig
+@@ -0,0 +1,89 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_TEXT_BASE=0x00a00000
++CONFIG_SPL_LIBCOMMON_SUPPORT=y
++CONFIG_SPL_LIBGENERIC_SUPPORT=y
++CONFIG_NR_DRAM_BANKS=2
++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
++CONFIG_DEFAULT_DEVICE_TREE="rk3568-radxa-e25"
++CONFIG_ROCKCHIP_RK3568=y
++CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
++CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
++CONFIG_SPL_BOARD_INIT=y
++CONFIG_SPL_MMC=y
++CONFIG_SPL_SERIAL=y
++CONFIG_SPL_STACK_R_ADDR=0x600000
++CONFIG_TARGET_EVB_RK3568=y
++CONFIG_SPL_STACK=0x400000
++CONFIG_DEBUG_UART_BASE=0xFE660000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_SPL_LOAD_FIT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-radxa-e25.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_SPL_MAX_SIZE=0x40000
++CONFIG_SPL_PAD_TO=0x7f8000
++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
++CONFIG_SPL_BSS_START_ADDR=0x4000000
++CONFIG_SPL_BSS_MAX_SIZE=0x4000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_ADC=y
++CONFIG_SPL_ATF=y
++CONFIG_CMD_ADC=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_CMD_SETEXPR is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_LIVE=y
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_SPL_REGMAP=y
++CONFIG_SPL_SYSCON=y
++CONFIG_SPL_CLK=y
++CONFIG_CLK_SCMI=y
++CONFIG_RESET_SCMI=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MISC=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_GMAC_ROCKCHIP=y
++CONFIG_DM_PMIC=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_SPL_PMIC_RK8XX=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_SPL_RAM=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_ERRNO_STR=y

5.4/package/firmware/cypress-firmware/Makefile

@@ -0,0 +1,486 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=cypress-firmware
+PKG_VERSION:=5.10.9-2022_0909
+PKG_RELEASE:=1
+
+PKG_SOURCE_PROTO:=git
+PKG_SOURCE_URL:=https://github.com/Infineon/ifx-linux-firmware/
+PKG_MIRROR_HASH:=944faae3a80013f1a963b6692d7f50a38c97edcf91fd163de521df755e6922b5
+PKG_SOURCE_VERSION:=release-v$(PKG_VERSION)
+
+PKG_MAINTAINER:=Álvaro Fernández Rojas <noltari@gmail.com>
+PKG_LICENSE_FILES:=LICENCE
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/cypress-firmware-default
+  SECTION:=firmware
+  CATEGORY:=Firmware
+  URL:=https://community.infineon.com/
+endef
+
+define Build/Compile
+	true
+endef
+
+# Cypress 43012 SDIO Firmware
+define Package/cypress-firmware-43012-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW43012 FullMac SDIO firmware
+endef
+
+define Package/cypress-firmware-43012-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43012-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43012-sdio.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac43012-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac43012-sdio.bin
+	$(LN) \
+		../cypress/cyfmac43012-sdio.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac43012-sdio.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-43012-sdio))
+
+# Cypress 43340 SDIO Firmware
+define Package/cypress-firmware-43340-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW43340 FullMac SDIO firmware
+endef
+
+define Package/cypress-firmware-43340-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43340-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac43340-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac43340-sdio.bin
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-43340-sdio))
+
+# Cypress 43362 SDIO Firmware
+define Package/cypress-firmware-43362-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW43362 FullMac SDIO firmware
+  PROVIDES:=brcmfmac-firmware-43362-sdio
+  CONFLICTS:=brcmfmac-firmware-43362-sdio
+endef
+
+define Package/cypress-firmware-43362-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43362-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac43362-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac43362-sdio.bin
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-43362-sdio))
+
+# Cypress 4339 SDIO Firmware
+define Package/cypress-firmware-4339-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW4339 FullMac SDIO firmware
+  PROVIDES:=brcmfmac-firmware-4339-sdio
+  CONFLICTS:=brcmfmac-firmware-4339-sdio
+endef
+
+define Package/cypress-firmware-4339-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4339-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac4339-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac4339-sdio.bin
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-4339-sdio))
+
+# Cypress 43430 SDIO Firmware
+define Package/cypress-firmware-43430-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW43430 FullMac SDIO firmware
+  PROVIDES:=brcmfmac-firmware-43430-sdio
+  CONFLICTS:=brcmfmac-firmware-43430-sdio
+endef
+
+define Package/cypress-firmware-43430-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43430-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43430-sdio.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac43430-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac43430-sdio.bin
+	$(LN) \
+		../cypress/cyfmac43430-sdio.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac43430-sdio.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-43430-sdio))
+
+# Cypress 43439 SDIO Firmware
+define Package/cypress-firmware-43439-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW43439 FullMac SDIO firmware
+endef
+
+define Package/cypress-firmware-43439-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43439-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43439-sdio.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac43439-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac43439-sdio.bin
+	$(LN) \
+		../cypress/cyfmac43439-sdio.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac43439-sdio.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-43439-sdio))
+
+# Cypress 43455 SDIO Firmware
+define Package/cypress-firmware-43455-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW43455 FullMac SDIO firmware
+  PROVIDES:=brcmfmac-firmware-43455-sdio
+  CONFLICTS:=brcmfmac-firmware-43455-sdio
+endef
+
+define Package/cypress-firmware-43455-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43455-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43455-sdio.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac43455-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac43455-sdio.bin
+	$(LN) \
+		../cypress/cyfmac43455-sdio.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac43455-sdio.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-43455-sdio))
+
+# Cypress 4354 SDIO Firmware
+define Package/cypress-firmware-4354-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW4354 FullMac SDIO firmware
+endef
+
+define Package/cypress-firmware-4354-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4354-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4354-sdio.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac4354-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac4354-sdio.bin
+	$(LN) \
+		../cypress/cyfmac4354-sdio.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac4354-sdio.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-4354-sdio))
+
+# Cypress 4356 PCIe Firmware
+define Package/cypress-firmware-4356-pcie
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW4356 FullMac PCIe firmware
+endef
+
+define Package/cypress-firmware-4356-pcie/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4356-pcie.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4356-pcie.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac4356-pcie.bin \
+		$(1)/lib/firmware/brcm/brcmfmac4356-pcie.bin
+	$(LN) \
+		../cypress/cyfmac4356-pcie.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac4356-pcie.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-4356-pcie))
+
+# Cypress 4356 SDIO Firmware
+define Package/cypress-firmware-4356-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW4356 FullMac SDIO firmware
+endef
+
+define Package/cypress-firmware-4356-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4356-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4356-sdio.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac4356-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac4356-sdio.bin
+	$(LN) \
+		../cypress/cyfmac4356-sdio.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac4356-sdio.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-4356-sdio))
+
+# Cypress 43570 PCIe Firmware
+define Package/cypress-firmware-43570-pcie
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW43570 FullMac PCIe firmware
+endef
+
+define Package/cypress-firmware-43570-pcie/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43570-pcie.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac43570-pcie.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac43570-pcie.bin \
+		$(1)/lib/firmware/brcm/brcmfmac43570-pcie.bin
+	$(LN) \
+		../cypress/cyfmac43570-pcie.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac43570-pcie.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-43570-pcie))
+
+# Cypress 4373 PCIe Firmware
+define Package/cypress-firmware-4373-pcie
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW4373 FullMac PCIe firmware
+endef
+
+define Package/cypress-firmware-4373-pcie/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4373-pcie.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4373-pcie.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac4373-pcie.bin \
+		$(1)/lib/firmware/brcm/brcmfmac4373-pcie.bin
+	$(LN) \
+		../cypress/cyfmac4373-pcie.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac4373-pcie.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-4373-pcie))
+
+# Cypress 4373 SDIO Firmware
+define Package/cypress-firmware-4373-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW4373 FullMac SDIO firmware
+endef
+
+define Package/cypress-firmware-4373-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4373-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4373-sdio.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac4373-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac4373-sdio.bin
+	$(LN) \
+		../cypress/cyfmac4373-sdio.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac4373-sdio.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-4373-sdio))
+
+# Cypress 4373 USB Firmware
+define Package/cypress-firmware-4373-usb
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW4373 FullMac USB firmware
+endef
+
+define Package/cypress-firmware-4373-usb/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4373-usb.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac4373.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac4373-usb.bin \
+		$(1)/lib/firmware/brcm/brcmfmac4373-usb.bin
+	$(LN) \
+		../cypress/cyfmac4373.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac4373.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-4373-usb))
+
+# Cypress 54591 PCIe Firmware
+define Package/cypress-firmware-54591-pcie
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW54591 FullMac PCIe firmware
+endef
+
+define Package/cypress-firmware-54591-pcie/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac54591-pcie.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac54591-pcie.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac54591-pcie.bin \
+		$(1)/lib/firmware/brcm/brcmfmac54591-pcie.bin
+	$(LN) \
+		../cypress/cyfmac54591-pcie.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac54591-pcie.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-54591-pcie))
+
+# Cypress 54591 SDIO Firmware
+define Package/cypress-firmware-54591-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW54591 FullMac SDIO firmware
+endef
+
+define Package/cypress-firmware-54591-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac54591-sdio.bin \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac54591-sdio.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac54591-sdio.bin \
+		$(1)/lib/firmware/brcm/brcmfmac54591-sdio.bin
+	$(LN) \
+		../cypress/cyfmac54591-sdio.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac54591-sdio.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-54591-sdio))
+
+# Cypress 55560 PCIe Firmware
+define Package/cypress-firmware-55560-pcie
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW55560 FullMac PCIe firmware
+endef
+
+define Package/cypress-firmware-55560-pcie/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac55560-pcie.trxse \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac55560-pcie.trxse \
+		$(1)/lib/firmware/brcm/brcmfmac55560-pcie.trxse
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-55560-pcie))
+
+# Cypress 55572 PCIe Firmware
+define Package/cypress-firmware-55572-pcie
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW55572 FullMac PCIe firmware
+endef
+
+define Package/cypress-firmware-55572-pcie/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac55572-pcie.trxse \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac55572-pcie.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac55572-pcie.trxse \
+		$(1)/lib/firmware/brcm/brcmfmac55572-pcie.trxse
+	$(LN) \
+		../cypress/cyfmac55572-pcie.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac55572-pcie.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-55572-pcie))
+
+# Cypress 55572 SDIO Firmware
+define Package/cypress-firmware-55572-sdio
+  $(Package/cypress-firmware-default)
+  TITLE:=CYW55572 FullMac SDIO firmware
+endef
+
+define Package/cypress-firmware-55572-sdio/install
+	$(INSTALL_DIR) $(1)/lib/firmware/cypress
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac55572-sdio.trxse \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DATA) \
+		$(PKG_BUILD_DIR)/firmware/cyfmac55572-sdio.clm_blob \
+		$(1)/lib/firmware/cypress/
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(LN) \
+		../cypress/cyfmac55572-sdio.trxse \
+		$(1)/lib/firmware/brcm/brcmfmac55572-sdio.trxse
+	$(LN) \
+		../cypress/cyfmac55572-sdio.clm_blob \
+		$(1)/lib/firmware/brcm/brcmfmac55572-sdio.clm_blob
+endef
+
+$(eval $(call BuildPackage,cypress-firmware-55572-sdio))

5.4/package/firmware/ipq-wifi/Makefile

@@ -0,0 +1,121 @@
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/version.mk
+
+PKG_NAME:=ipq-wifi
+PKG_RELEASE:=1
+PKG_FLAGS:=nonshared
+
+include $(INCLUDE_DIR)/package.mk
+
+define Build/Prepare
+	mkdir -p $(PKG_BUILD_DIR)
+endef
+
+define Build/Compile
+endef
+
+# Use ath10k-bdencoder from https://github.com/qca/qca-swiss-army-knife.git
+# to generate the board-* files here.
+#
+# This is intended to be used on an interim basis until device-specific
+# board data for new devices is available through the upstream compilation
+#
+# Please send a mail with your device-specific board files upstream.
+# You can find instructions and examples on the linux-wireless wiki:
+# <https://wireless.wiki.kernel.org/en/users/drivers/ath10k/boardfiles>
+
+ALLWIFIBOARDS:= \
+	8dev_habanero-dvk \
+	aruba_ap-303 \
+	avm_fritzrepeater-1200 \
+	buffalo_wtr-m2133hp \
+	cellc_rtl30vw \
+	dlink_dap2610 \
+	engenius_eap2200 \
+	engenius_emd1 \
+	engenius_emr3500 \
+	ezviz_cs-w3-wd1200g-eup \
+	glinet_gl-s1300 \
+	linksys_ea8300 \
+	p2w_r619ac \
+	mobipromo_cm520-79f \
+	qxwlan_e2600ac \
+	teltonika_rutx
+
+ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
+
+define Package/ipq-wifi-default
+  SUBMENU:=ath10k Board-Specific Overrides
+  SECTION:=firmware
+  CATEGORY:=Firmware
+  DEPENDS:=@TARGET_ipq40xx
+  TITLE:=Custom Board
+endef
+
+define ipq-wifi-install-one-to
+  $(INSTALL_DIR)  $(2)/lib/firmware/ath10k/$(3)/
+  $(INSTALL_DATA) $(1) $(2)/lib/firmware/ath10k/$(3)/board-2.bin
+endef
+
+define ipq-wifi-install-one
+  $(if $(filter $(suffix $(1)),.QCA4019 .qca4019),\
+    $(call ipq-wifi-install-one-to,$(1),$(2),QCA4019/hw1.0),\
+  $(if $(filter $(suffix $(1)),.QCA9888 .qca9888),\
+    $(call ipq-wifi-install-one-to,$(1),$(2),QCA9888/hw2.0),\
+  $(if $(filter $(suffix $(1)),.QCA9984 .qca9984),\
+    $(call ipq-wifi-install-one-to,$(1),$(2),QCA9984/hw1.0),\
+    $(error Unrecognized board-file suffix '$(suffix $(1))' for '$(1)')\
+  )))
+
+endef
+# Blank line required at end of above define due to foreach context
+
+define generate-ipq-wifi-package
+  define Package/ipq-wifi-$(1)
+    $(call Package/ipq-wifi-default)
+    TITLE:=board-2.bin Overrides for $(2)
+    CONFLICTS:=$(PREV_BOARD)
+  endef
+
+  define Package/ipq-wifi-$(1)/description
+The $(2) requires board-specific, reference ("cal") data
+that is not yet present in the upstream wireless firmware distribution.
+
+This package supplies board-2.bin file(s) that, in the interim,
+overwrite those supplied by the ath10k-firmware-* packages.
+
+This is package is only necessary for the $(2).
+
+Do not install it for any other device!
+  endef
+
+  define Package/ipq-wifi-$(1)/install-overlay
+    $$$$(foreach IPQ_WIFI_BOARD_FILE,$$$$(wildcard board-$(1).*),\
+      $$$$(call ipq-wifi-install-one,$$$$(IPQ_WIFI_BOARD_FILE),$$(1)))
+  endef
+
+  PREV_BOARD+=ipq-wifi-$(1)
+endef
+
+# Add board name to ALLWIFIBOARDS
+# Place files in this directory as board-<devicename>.<qca4019|qca9888|qca9984>
+# Add $(eval $(call generate-ipq-wifi-package,<devicename>,<display name>))
+
+$(eval $(call generate-ipq-wifi-package,8dev_habanero-dvk,8devices Habanero DVK))
+$(eval $(call generate-ipq-wifi-package,aruba_ap-303,Aruba AP-303))
+$(eval $(call generate-ipq-wifi-package,avm_fritzrepeater-1200,AVM FRITZRepeater 1200))
+$(eval $(call generate-ipq-wifi-package,buffalo_wtr-m2133hp,Buffalo WTR-M2133HP))
+$(eval $(call generate-ipq-wifi-package,cellc_rtl30vw, Cell C RTL30VW))
+$(eval $(call generate-ipq-wifi-package,dlink_dap2610,D-Link DAP-2610))
+$(eval $(call generate-ipq-wifi-package,engenius_eap2200,EnGenius EAP2200))
+$(eval $(call generate-ipq-wifi-package,engenius_emd1,EnGenius EMD1))
+$(eval $(call generate-ipq-wifi-package,engenius_emr3500,EnGenius EMR3500))
+$(eval $(call generate-ipq-wifi-package,ezviz_cs-w3-wd1200g-eup,EZVIZ CS-W3-WD1200G EUP))
+$(eval $(call generate-ipq-wifi-package,glinet_gl-s1300,GL.iNet GL-S1300))
+$(eval $(call generate-ipq-wifi-package,linksys_ea8300,Linksys EA8300))
+$(eval $(call generate-ipq-wifi-package,mobipromo_cm520-79f,MobiPromo CM520-79F))
+$(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac,Qxwlan E2600AC))
+$(eval $(call generate-ipq-wifi-package,p2w_r619ac,P&W R619AC))
+$(eval $(call generate-ipq-wifi-package,teltonika_rutx,Teltonika RUTX))
+
+$(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))

5.4/package/kernel/bcm27xx-gpu-fw/Makefile

@@ -0,0 +1,185 @@
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_NAME:=bcm27xx-gpu-fw
+PKG_VERSION:=2021-08-19
+PKG_RELEASE:=25e2b597ebfb2495eab4816a276758dcc6ea21f1
+
+PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)/rpi-firmware-$(PKG_RELEASE)
+
+PKG_FLAGS:=nonshared
+
+include $(INCLUDE_DIR)/package.mk
+
+RPI_FIRMWARE_URL:=@GITHUB/raspberrypi/firmware/$(PKG_RELEASE)/boot/
+RPI_FIRMWARE_FILE:=rpi-firmware-$(PKG_RELEASE)
+
+define Download/LICENCE_broadcom
+  FILE:=$(RPI_FIRMWARE_FILE)-LICENCE.broadcom
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=LICENCE.broadcom
+  HASH:=c7283ff51f863d93a275c66e3b4cb08021a5dd4d8c1e7acc47d872fbe52d3d6b
+endef
+$(eval $(call Download,LICENCE_broadcom))
+
+define Download/bootcode_bin
+  FILE:=$(RPI_FIRMWARE_FILE)-bootcode.bin
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=bootcode.bin
+  HASH:=36fba28838867f26670a0cd1de340da62e13171cfdec0e7822737e849b3c0681
+endef
+$(eval $(call Download,bootcode_bin))
+
+define Download/fixup_dat
+  FILE:=$(RPI_FIRMWARE_FILE)-fixup.dat
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=fixup.dat
+  HASH:=b06aa43aa668d6982de66044299d1b0dd6b449ec321dd83742aa1eb68774e15b
+endef
+$(eval $(call Download,fixup_dat))
+
+define Download/fixup_cd_dat
+  FILE:=$(RPI_FIRMWARE_FILE)-fixup_cd.dat
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=fixup_cd.dat
+  HASH:=fff4fd9fbb691100be46269f554acd866eac8cfef39082e03ac12f70fbfe9d95
+endef
+$(eval $(call Download,fixup_cd_dat))
+
+define Download/fixup_x_dat
+  FILE:=$(RPI_FIRMWARE_FILE)-fixup_x.dat
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=fixup_x.dat
+  HASH:=d74f97ae37cd476e6d4c8e466c3013be49e891e63b9aabc0c9b7637d85068cd0
+endef
+$(eval $(call Download,fixup_x_dat))
+
+define Download/fixup4_dat
+  FILE:=$(RPI_FIRMWARE_FILE)-fixup4.dat
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=fixup4.dat
+  HASH:=a607f4dc3000c188f8daaa3417c70a9e5ecc039fae36ba46807c00294f89cd24
+endef
+$(eval $(call Download,fixup4_dat))
+
+define Download/fixup4cd_dat
+  FILE:=$(RPI_FIRMWARE_FILE)-fixup4cd.dat
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=fixup4cd.dat
+  HASH:=fff4fd9fbb691100be46269f554acd866eac8cfef39082e03ac12f70fbfe9d95
+endef
+$(eval $(call Download,fixup4cd_dat))
+
+define Download/fixup4x_dat
+  FILE:=$(RPI_FIRMWARE_FILE)-fixup4x.dat
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=fixup4x.dat
+  HASH:=14ba09cba83d82a158481a7267fad06ada73c26c3a27dfd34694955f11ba6e27
+endef
+$(eval $(call Download,fixup4x_dat))
+
+define Download/start_elf
+  FILE:=$(RPI_FIRMWARE_FILE)-start.elf
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=start.elf
+  HASH:=8bee170c56529bf1666ad4afdd18ae18c7123e7a2fd30e2992cd0d9a01fa63ee
+endef
+$(eval $(call Download,start_elf))
+
+define Download/start_cd_elf
+  FILE:=$(RPI_FIRMWARE_FILE)-start_cd.elf
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=start_cd.elf
+  HASH:=27d9354ff1af79a521527a288fe736f7337f91bca12bbc177c80e29dbbef0ffd
+endef
+$(eval $(call Download,start_cd_elf))
+
+define Download/start_x_elf
+  FILE:=$(RPI_FIRMWARE_FILE)-start_x.elf
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=start_x.elf
+  HASH:=499bfdf3deba7bb0a033d2a4487b7f05bce45de2692c7c6dabc4a456237fd438
+endef
+$(eval $(call Download,start_x_elf))
+
+define Download/start4_elf
+  FILE:=$(RPI_FIRMWARE_FILE)-start4.elf
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=start4.elf
+  HASH:=158bf783090223626cf45794bf679a3fadbf64bba55b76e3349b94e01be34202
+endef
+$(eval $(call Download,start4_elf))
+
+define Download/start4cd_elf
+  FILE:=$(RPI_FIRMWARE_FILE)-start4cd.elf
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=start4cd.elf
+  HASH:=c4912701f620cdd9e44bbacbfc4adb4be1b6fb7ccf81f6029ce2115511970cc0
+endef
+$(eval $(call Download,start4cd_elf))
+
+define Download/start4x_elf
+  FILE:=$(RPI_FIRMWARE_FILE)-start4x.elf
+  URL:=$(RPI_FIRMWARE_URL)
+  URL_FILE:=start4x.elf
+  HASH:=3eb1adb5dfef21da0a16679ef65314a64196a67c6fca3422df8bc721d6b6fa94
+endef
+$(eval $(call Download,start4x_elf))
+
+define Package/bcm27xx-gpu-fw
+  SECTION:=boot
+  CATEGORY:=Boot Loaders
+  DEPENDS:=@TARGET_bcm27xx
+  TITLE:=bcm27xx-gpu-fw
+  DEFAULT:=y if TARGET_bcm27xx
+endef
+
+define Package/bcm27xx-gpu-fw/description
+ GPU and kernel boot firmware for bcm27xx.
+endef
+
+define Build/Prepare
+	rm -rf $(PKG_BUILD_DIR)
+	mkdir -p $(PKG_BUILD_DIR)
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-LICENCE.broadcom $(PKG_BUILD_DIR)/LICENCE.broadcom
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-bootcode.bin $(PKG_BUILD_DIR)/bootcode.bin
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup.dat $(PKG_BUILD_DIR)/fixup.dat
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup_cd.dat $(PKG_BUILD_DIR)/fixup_cd.dat
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup_x.dat $(PKG_BUILD_DIR)/fixup_x.dat
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4.dat $(PKG_BUILD_DIR)/fixup4.dat
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4cd.dat $(PKG_BUILD_DIR)/fixup4cd.dat
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4x.dat $(PKG_BUILD_DIR)/fixup4x.dat
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start.elf $(PKG_BUILD_DIR)/start.elf
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start_cd.elf $(PKG_BUILD_DIR)/start_cd.elf
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start_x.elf $(PKG_BUILD_DIR)/start_x.elf
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4.elf $(PKG_BUILD_DIR)/start4.elf
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4cd.elf $(PKG_BUILD_DIR)/start4cd.elf
+	$(CP) $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4x.elf $(PKG_BUILD_DIR)/start4x.elf
+endef
+
+define Build/Compile
+	true
+endef
+
+define Package/bcm27xx-gpu-fw/install
+	true
+endef
+
+define Build/InstallDev
+	$(CP) $(PKG_BUILD_DIR)/bootcode.bin $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/LICENCE.broadcom $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/start.elf $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/start_cd.elf $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/start_x.elf $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/start4.elf $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/start4cd.elf $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/start4x.elf $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/fixup.dat $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/fixup_cd.dat $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/fixup_x.dat $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/fixup4.dat $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/fixup4cd.dat $(KERNEL_BUILD_DIR)
+	$(CP) $(PKG_BUILD_DIR)/fixup4x.dat $(KERNEL_BUILD_DIR)
+endef
+
+$(eval $(call BuildPackage,bcm27xx-gpu-fw))

5.4/package/kernel/ksmbd/patches/010-fixes-build-on-6.1.patch

@@ -0,0 +1,14 @@
+--- a/smb1pdu.c
++++ b/smb1pdu.c
+@@ -5851,7 +5851,11 @@ static int smb_populate_readdir_entry(struct ksmbd_conn *conn, int info_level,
+  *
+  * Return:	0 on success, otherwise -EINVAL
+  */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)
++static bool ksmbd_fill_dirent(struct dir_context *ctx, const char *name, int namlen,
++#else
+ static int ksmbd_fill_dirent(struct dir_context *ctx, const char *name, int namlen,
++#endif
+ 		loff_t offset, u64 ino, unsigned int d_type)
+ {
+ 	struct ksmbd_readdir_data *buf =

5.4/package/kernel/linux/modules/crypto.mk

@@ -446,29 +446,6 @@ endef
 
 $(eval $(call KernelPackage,crypto-kpp))
 
-
-define KernelPackage/crypto-lib-blake2s
-  TITLE:=BLAKE2s hash function library
-  KCONFIG:=CONFIG_CRYPTO_LIB_BLAKE2S
-  HIDDEN:=1
-  FILES:= \
-	$(LINUX_DIR)/lib/crypto/libblake2s.ko@lt5.14 \
-	$(LINUX_DIR)/lib/crypto/libblake2s-generic.ko@lt5.14
-  $(call AddDepends/crypto,+PACKAGE_kmod-crypto-hash:kmod-crypto-hash)
-endef
-
-define KernelPackage/crypto-lib-blake2s/config
-  imply PACKAGE_kmod-crypto-hash
-endef
-
-define KernelPackage/crypto-lib-blake2s/x86/64
-  KCONFIG+=CONFIG_CRYPTO_BLAKE2S_X86
-  FILES+=$(LINUX_DIR)/arch/x86/crypto/blake2s-x86_64.ko
-endef
-
-$(eval $(call KernelPackage,crypto-lib-blake2s))
-
-
 define KernelPackage/crypto-lib-chacha20
   TITLE:=ChaCha library interface
   KCONFIG:=CONFIG_CRYPTO_LIB_CHACHA

5.4/package/kernel/r2ec/Makefile

@@ -0,0 +1,32 @@
+#
+# Copyright (C) 2008-2012 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_NAME:=r2ec
+PKG_RELEASE:=1
+PKG_LICENSE:=GPL-2.0
+
+include $(INCLUDE_DIR)/package.mk
+
+define KernelPackage/r2ec
+	SUBMENU:=Other modules
+	TITLE:=STM32 R2EC (Router to Embedded board Communication) Driver
+	FILES:=$(PKG_BUILD_DIR)/r2ec.ko
+	AUTOLOAD:=$(call AutoLoad,30,r2ec,1)
+	DEPENDS:=@TARGET_ipq40xx @LINUX_5_4
+	KCONFIG:=
+endef
+
+MAKE_OPTS:= $(KERNEL_MAKE_FLAGS) M="$(PKG_BUILD_DIR)"
+
+define Build/Compile
+	$(MAKE) -C "$(LINUX_DIR)" $(MAKE_OPTS) modules
+endef
+
+$(eval $(call KernelPackage,r2ec))

5.4/package/kernel/r2ec/src/Makefile

@@ -0,0 +1 @@
+obj-m += r2ec.o

5.4/package/kernel/r2ec/src/io.h

@@ -0,0 +1,60 @@
+#ifndef R2EC_IO_H
+#define R2EC_IO_H
+
+#define NO_OF_GPIOS 37
+
+enum proto_version {
+	PROTO_VERSION_1 = 0x01,
+	PROTO_VERSION_2 = 0x02
+};
+
+enum cmd_type_id {
+	CMD_GPIO = 0x06,
+	CMD_PROTO = 0xFC,
+	CMD_FW = 0xFD,
+	CMD_BOOT = 0xFE
+};
+
+enum proto_id {
+	PROTO_GET_SUPPORTED = 0x03
+};
+
+enum boot_id {
+	BOOT_START_APP = 0x03,
+	BOOT_STATE = 0xFD,
+	BOOT_VERSION = 0xFE
+};
+
+enum state_id {
+	NO_IMAGE_FOUND = 0x17,
+	BOOT_STARTED = 0x18,
+	WATCHDOG_RESET = 0x1B,
+	APPLICATION_START_FAIL = 0x99,
+	HARD_FAULT_ERROR = 0x9A,
+	APP_STARTED = 0xFC,
+	NO_DATA_AVAILABLE = 0xFF
+};
+
+enum ack_id {
+	STATUS_ACK = 0x7D,
+	STATUS_NACK = 0x7E
+};
+
+enum gpio_state {
+	GPIO_STATE_HIGH = 0x1E,
+	GPIO_STATE_LOW = 0x9F
+};
+
+enum gpio_mode {
+	GPIO_VALUE_SET_LOW = 0x00,
+	GPIO_VALUE_SET_HIGH = 0x01,
+	GPIO_VALUE_GET = 0x02,
+	GPIO_MODE_SET_OUTPUT = 0x04,
+	GPIO_MODE_SET_INPUT = 0x05
+};
+
+enum fw_id {
+	FW_VERSION = 0x01
+};
+
+#endif // R2EC_IO_H

5.4/package/kernel/r2ec/src/r2ec.c

@@ -0,0 +1,749 @@
+#include <linux/module.h>
+#include <linux/gpio/driver.h>
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+
+#include "io.h"
+
+static const struct i2c_device_id r2ec_id[] = {
+	{ "stm32v1", NO_OF_GPIOS },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, r2ec_id);
+
+static const struct of_device_id r2ec_of_table[] = {
+	{ .compatible = "tlt,stm32v1" },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, r2ec_of_table);
+
+static uint8_t g_proto;
+
+struct r2ec {
+	struct gpio_chip chip;
+	struct irq_chip irqchip;
+	struct i2c_client *client;
+	struct mutex i2c_lock;
+	struct mutex irq_lock;
+	int ic_ready;
+};
+
+struct r2ec_platform_data {
+	unsigned gpio_base;
+
+	int (*setup)(struct i2c_client *client, int gpio, unsigned ngpio,
+		     void *context);
+
+	int (*teardown)(struct i2c_client *client, int gpio, unsigned ngpio,
+			void *context);
+
+	void *context;
+};
+
+struct i2c_request {
+	uint8_t version;
+	uint16_t length;
+	uint8_t command;
+	uint8_t data[1];
+	// uint8_t checksum; // invisible
+} __attribute__((packed));
+
+struct i2c_response {
+	uint8_t version;
+	uint8_t length;
+	uint8_t command;
+	uint8_t data[7];
+	uint8_t checksum;
+} __attribute__((packed));
+
+static uint8_t calc_crc8(const uint8_t *data, size_t len)
+{
+	uint8_t crc = 0xFF;
+	int i, j;
+
+	for (j = 0; j < len; j++) {
+		crc ^= data[j];
+
+		for (i = 0; i < 8; i++) {
+			crc = (crc & 0x80) ? (crc ^ 0xD5) << 1 : crc << 1;
+		}
+	}
+
+	return crc;
+}
+
+// generate outcoming mesage checksum and write i2c data
+static int stm32_write(struct i2c_client *client, uint8_t ver, uint8_t cmd,
+		       uint8_t *data, size_t len)
+{
+	struct i2c_request *req;
+	uint8_t tmp[sizeof(struct i2c_request) + len];
+	const int tmp_len = sizeof(tmp);
+	int err;
+
+	if (!client) {
+		printk(KERN_ERR "R2EC I2C client is not ready!\n");
+		return -ENXIO;
+	}
+
+	req = (struct i2c_request *)tmp;
+	req->version = ver;
+	req->length  = 2 + len; // 2 + data_len
+	req->command = cmd;
+
+	memcpy(req->data, data, len);
+
+	req->data[len] = calc_crc8(tmp, tmp_len - 1);
+
+	if ((err = i2c_master_send(client, tmp, tmp_len)) < 0) {
+		return err;
+	}
+
+	return 0;
+}
+
+// attempt to read i2c data
+static int stm32_read(struct i2c_client *client, uint8_t *data, size_t len)
+{
+	char buffer[64] = { 0 };
+	uint8_t checksum;
+	int err;
+	unsigned i, cnt = 0;
+
+	if (!client) {
+		printk(KERN_ERR "R2EC I2C client is not ready!\n");
+		return -ENXIO;
+	}
+
+retry:
+	if ((err = i2c_master_recv(client, data, len)) < 0) {
+		if (err == -ETIMEDOUT && cnt < 10) {
+			cnt++;
+			msleep(10);
+			goto retry;
+		}
+		return err;
+	}
+
+	if (len == 1) {
+		return 0;
+	}
+
+	// ignore checksum on partial i2c response
+	if (len == sizeof(struct i2c_response) - 1) {
+		return 0;
+	}
+
+	// 0xFF - no data available
+	if (*(data + 3) == 0xFF) {
+		return -ENODATA;
+	}
+
+	// generate checksum and verify
+	checksum = calc_crc8(data, len - 1);
+
+	if (checksum != *(data + len - 1)) {
+		for (i = 0; i < len; i++) {
+			snprintf(buffer + strlen(buffer), sizeof(buffer),
+				 "%02X ", *(data + i));
+		}
+
+		dev_err(&client->dev, "Checksum of incoming message "
+				      "does not match!\n"
+				      "Received: %s\n", buffer);
+
+		// for some reason checksum might appear as 1st byte in the
+		//  data buffer, and actual checksum byte is zero
+		// apply quirk - discard first byte, skip checksum checking
+		if (!*(data + len - 1)) {
+			dev_err(&client->dev,
+				"Applying wrong-checksum quirk...\n");
+			memmove(data, data + 1, len - 1);
+			return 0;
+		}
+
+		return -EBADE;
+	}
+
+	return 0;
+}
+
+// attempt to retrieve supported protocol version, then retrieve device state
+//  and boot into application state
+// this is done without interrupt, so there should be delay after writing
+//  request and before reading response for protocol versions up until v2
+static int stm32_prepare(struct r2ec *gpio, struct i2c_client *client)
+{
+	struct i2c_response rsp;
+	uint8_t data[1], recv[1];
+	int ret;
+
+	memset(&rsp, 0, sizeof(rsp));
+
+	data[0] = PROTO_GET_SUPPORTED;
+
+	if ((ret = stm32_write(client, 1, CMD_PROTO, data, 1))) {
+		dev_err(&client->dev,
+			"stm32_prepare: proto version write failed (%d)\n",
+			ret);
+		return ret;
+	}
+
+	// due compatibility reasons delay is needed between write/read
+	//  operations
+	msleep(10);
+
+	if ((ret = stm32_read(client, (uint8_t *)&rsp, sizeof(rsp)))) {
+		dev_err(&client->dev,
+			"stm32_prepare: proto version read failed (%d)\n", ret);
+		return ret;
+	}
+
+	g_proto = rsp.data[1];
+
+	// fallback to version 1
+	if (g_proto != PROTO_VERSION_1 && g_proto != PROTO_VERSION_2) {
+		printk("STM32 fallback protocol: %u\n", g_proto);
+		g_proto = PROTO_VERSION_1;
+	}
+
+	printk("STM32 supported protocol: %u\n", g_proto);
+
+	data[0] = BOOT_STATE;
+
+	if ((ret = stm32_write(client, g_proto, CMD_BOOT, data, 1))) {
+		dev_err(&client->dev,
+			"stm32_prepare: boot state write failed (%d)\n", ret);
+		return ret;
+	}
+
+	if ((ret = stm32_read(client, recv, 1))) {
+		dev_err(&client->dev,
+			"stm32_prepare: boot state read failed (%d)\n", ret);
+		return ret;
+	}
+
+	// device might be not ready aka in bootloader state
+	// we might need to ignore gpio_write status value
+	gpio->ic_ready = 0;
+
+	// handle the following possible states reported either from
+	//  bootloader or system:
+	switch (recv[0]) {
+	case NO_IMAGE_FOUND:
+	case APP_STARTED:
+		// device is ready, no need to ignore gpio_write status value
+		// note: on no_image_found, user-space flasher will reflash
+		//  firmware and device will be rebooted
+		gpio->ic_ready = 1;
+		return 0;
+	case BOOT_STARTED:
+	case WATCHDOG_RESET:
+	case APPLICATION_START_FAIL:
+	case HARD_FAULT_ERROR:
+	case NO_DATA_AVAILABLE:
+		break;
+	default:
+		dev_err(&client->dev, "Device did not responded with correct "
+				      "state! Actual response was 0x%02X. "
+				      "Unable to get device state!\n", recv[0]);
+		break;
+	}
+
+	data[0] = BOOT_START_APP;
+
+	if ((ret = stm32_write(client, g_proto, CMD_BOOT, data, 1))) {
+		dev_err(&client->dev,
+			"stm32_prepare: boot start write failed (%d)\n", ret);
+		return ret;
+	}
+
+	if ((ret = stm32_read(client, recv, 1))) {
+		dev_err(&client->dev,
+			"stm32_prepare: boot start read failed (%d)\n", ret);
+		return ret;
+	}
+
+	if (recv[0] != STATUS_ACK && recv[0] != NO_DATA_AVAILABLE) {
+		dev_err(&client->dev, "Device did not responded with ACK. "
+				      "Actual response was 0x%02X. "
+				      "Unable to set device state!\n", recv[0]);
+		return -EIO;
+	}
+
+	return 0;
+}
+
+static int stm32_gpio_write(struct r2ec *gpio, int pin, int val)
+{
+	struct i2c_request *req;
+	size_t len = 2;
+	uint8_t tmp[sizeof(struct i2c_request) + len];
+	//int err;
+
+	if (!gpio->client) {
+		printk(KERN_ERR "R2EC I2C client is not ready!\n");
+		return -ENXIO;
+	}
+
+	req = (struct i2c_request *)tmp;
+	req->version = PROTO_VERSION_2;
+	req->length  = 2 + len; // command + crc + data
+	req->command = CMD_GPIO;
+	req->data[0] = pin;
+	req->data[1] = val;
+
+	i2c_master_send(gpio->client, tmp, sizeof(tmp));
+//	if ((err = i2c_master_send(gpio->client, tmp, sizeof(tmp))) < 0) {
+//		if (err != -ENXIO) {
+//			return err;
+//		}
+
+		// we need to ignore errors while device is not ready
+		// otherwise none of GPIOs/LEDs will be probed by the kernel
+//		if (!gpio->ic_ready) {
+//			err = 0;
+//		}
+//
+//		return err;
+//	}
+
+	return 0;
+}
+
+static int stm32_gpio_read(struct r2ec *gpio, int pin, int val)
+{
+	struct i2c_request *req;
+	size_t len = 2;
+	uint8_t tmp[sizeof(struct i2c_request) + len];
+	uint8_t recv[1];
+	int err;
+
+	if (!gpio->client) {
+		printk(KERN_ERR "R2EC I2C client is not ready!\n");
+		return -ENXIO;
+	}
+
+	req = (struct i2c_request *)tmp;
+	req->version = PROTO_VERSION_2;
+	req->length  = 2 + len; // command + crc + data
+	req->command = CMD_GPIO;
+	req->data[0] = pin;
+	req->data[1] = val;
+
+	if ((err = i2c_master_send(gpio->client, tmp, sizeof(tmp))) < 0) {
+		return err;
+	}
+
+	if ((err = i2c_master_recv(gpio->client, recv, sizeof(recv))) < 0) {
+		return err;
+	}
+
+	switch (recv[0]) {
+	case GPIO_STATE_HIGH:
+		return 1;
+	case GPIO_STATE_LOW:
+		return 0;
+	}
+
+	return -EIO;
+}
+
+static int r2ec_get(struct gpio_chip *chip, unsigned offset)
+{
+	struct r2ec *gpio = gpiochip_get_data(chip);
+	int value;
+
+	mutex_lock(&gpio->i2c_lock);
+	value = stm32_gpio_read(gpio, offset, GPIO_VALUE_GET);
+	mutex_unlock(&gpio->i2c_lock);
+
+	return value;
+}
+
+static void r2ec_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+	struct r2ec *gpio = gpiochip_get_data(chip);
+	int val = value ? GPIO_VALUE_SET_HIGH : GPIO_VALUE_SET_LOW;
+
+	mutex_lock(&gpio->i2c_lock);
+	stm32_gpio_write(gpio, offset, val);
+	mutex_unlock(&gpio->i2c_lock);
+}
+
+static int r2ec_input(struct gpio_chip *chip, unsigned offset)
+{
+	struct r2ec *gpio = gpiochip_get_data(chip);
+	int status;
+
+	mutex_lock(&gpio->i2c_lock);
+	status = stm32_gpio_write(gpio, offset, GPIO_MODE_SET_INPUT);
+	mutex_unlock(&gpio->i2c_lock);
+
+	return status;
+}
+
+static int r2ec_output(struct gpio_chip *chip, unsigned offset, int value)
+{
+	struct r2ec *gpio = gpiochip_get_data(chip);
+	int status;
+
+	mutex_lock(&gpio->i2c_lock);
+	status = stm32_gpio_write(gpio, offset, GPIO_MODE_SET_OUTPUT);
+	mutex_unlock(&gpio->i2c_lock);
+
+	r2ec_set(chip, offset, value);
+
+	return status;
+}
+
+static void noop(struct irq_data *data) { }
+
+static int noop_wake(struct irq_data *data, unsigned on)
+{
+	return 0;
+}
+
+static irqreturn_t r2ec_irq(int irq, void *data)
+{
+	struct r2ec *gpio = data;
+	unsigned i;
+
+	for (i = 0; i < gpio->chip.ngpio; i++) {
+		handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
+	}
+
+	return IRQ_HANDLED;
+}
+
+static void r2ec_irq_bus_lock(struct irq_data *data)
+{
+	struct r2ec *gpio = irq_data_get_irq_chip_data(data);
+	mutex_lock(&gpio->irq_lock);
+}
+
+static void r2ec_irq_bus_sync_unlock(struct irq_data *data)
+{
+	struct r2ec *gpio = irq_data_get_irq_chip_data(data);
+	mutex_unlock(&gpio->irq_lock);
+}
+
+static int chip_label_match(struct gpio_chip *chip, void *data)
+{
+	return !strcmp(chip->label, data);
+}
+
+static int get_stm32_version(struct device *dev, uint8_t type, char *buffer)
+{
+	struct gpio_chip *chip;
+	struct r2ec *gpio;
+	uint8_t recv[sizeof(struct i2c_response)];
+	uint8_t data[1];
+	int ret;
+
+	struct pt_fw_get_ver {
+		unsigned char command_ex;
+		unsigned char major;
+		unsigned char middle;
+		unsigned char minor;
+		unsigned char rev;
+	} __attribute__((packed)) *res;
+
+	chip = gpiochip_find("stm32v1", chip_label_match);
+	if (!chip) {
+		printk(KERN_ERR "Unable to find R2EC gpio chip!\n");
+		return -ENXIO;
+	}
+
+	gpio = gpiochip_get_data(chip);
+
+	if (!gpio->client) {
+		printk(KERN_ERR "R2EC I2C client is not ready!\n");
+		return -ENXIO;
+	}
+
+	data[0] = (type == CMD_FW) ? FW_VERSION : BOOT_VERSION;
+
+	mutex_lock(&gpio->i2c_lock);
+
+	if ((ret = stm32_write(gpio->client, g_proto, type, data, 1))) {
+		printk("%s: firmware version write failed (%d)\n",
+			__func__, ret);
+		goto done;
+	}
+
+	// prevent possible I2C bus lockup when master requests more than 1 byte
+	//  and slave only sends a couple of bytes, but master is still waiting
+	//  and SCL line is down; there is no recovery except power cycle
+	// first read 1 byte and compare with supported protocol versions
+	// if they match, then full messsage can be read, otherwise drop
+	//  everything to not introduce bus lockup
+	if ((ret = stm32_read(gpio->client, data, 1))) {
+		printk("%s: firmware version read failed (%d)\n",
+			__func__, ret);
+		goto done;
+	}
+
+	if (data[0] != PROTO_VERSION_1 && data[0] != PROTO_VERSION_2) {
+		goto done;
+	}
+
+	recv[0] = data[0];
+
+	if ((ret = stm32_read(gpio->client, &recv[1], sizeof(recv) - 1))) {
+		printk("%s: firmware version read failed (%d)\n",
+			__func__, ret);
+		goto done;
+	}
+
+	// device is ready now, running in application-mode
+	// this is called by autoflasher script first time
+	if (!gpio->ic_ready) {
+		gpio->ic_ready = 1;
+	}
+
+	res = (struct pt_fw_get_ver *)(&recv[3]);
+
+	sprintf(buffer, "%02d.%02d.%02d rev. %02d\n",
+		res->major, res->middle, res->minor, res->rev);
+
+done:
+	mutex_unlock(&gpio->i2c_lock);
+	return strlen(buffer);
+}
+
+static ssize_t app_version_show(struct device *dev,
+				struct device_attribute *attr, char *buffer)
+{
+	return get_stm32_version(dev, CMD_FW, buffer);
+}
+
+static ssize_t boot_version_show(struct device *dev,
+				 struct device_attribute *attr, char *buffer)
+{
+	return get_stm32_version(dev, CMD_BOOT, buffer);
+}
+
+static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
+			   const char *buff, size_t count)
+{
+	struct gpio_chip *chip;
+	struct r2ec *gpio;
+	uint8_t data[1];
+
+	chip = gpiochip_find("stm32v1", chip_label_match);
+	if (!chip) {
+		printk(KERN_ERR "Unable to find R2EC gpio chip!\n");
+		return -ENXIO;
+	}
+
+	gpio = gpiochip_get_data(chip);
+
+	if (!gpio->client) {
+		printk(KERN_ERR "R2EC I2C client is not ready!\n");
+		return -ENXIO;
+	}
+
+	data[0] = BOOT_START_APP;
+
+	mutex_lock(&gpio->i2c_lock);
+	if (stm32_write(gpio->client, g_proto, CMD_BOOT, data, 1)) {
+		printk(KERN_ERR "Unable transmit R2EC data!\n");
+		goto done;
+	}
+
+done:
+	mutex_unlock(&gpio->i2c_lock);
+	return 1;
+}
+
+static struct device_attribute g_r2ec_kobj_attr[] = {
+	__ATTR_RO(app_version),
+	__ATTR_RO(boot_version),
+	__ATTR_WO(reset)
+};
+
+static struct attribute *g_r2ec_attrs[] = {
+	&g_r2ec_kobj_attr[0].attr,
+	&g_r2ec_kobj_attr[1].attr,
+	&g_r2ec_kobj_attr[2].attr,
+	NULL,
+};
+
+static struct attribute_group g_r2ec_attr_group = { .attrs = g_r2ec_attrs };
+static struct kobject *g_r2ec_kobj;
+
+static int r2ec_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	struct r2ec_platform_data *pdata = dev_get_platdata(&client->dev);
+	struct r2ec *gpio;
+	int status, i;
+
+	gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
+	if (!gpio) {
+		return -ENOMEM;
+	}
+
+	for (i = 0; i < 10; i++) {
+		if (!(status = stm32_prepare(gpio, client))) {
+			break;
+		}
+
+		dev_err(&client->dev,
+			"Unable to initialize device, retrying...\n");
+
+		// give some time for next interation...
+		msleep(500);
+	}
+
+	if (status) {
+		dev_err(&client->dev, "Unable to initialize device!\n");
+		devm_kfree(&client->dev, gpio);
+		return status;
+	}
+
+	mutex_init(&gpio->irq_lock);
+	mutex_init(&gpio->i2c_lock);
+
+	lockdep_set_subclass(&gpio->i2c_lock,
+			     i2c_adapter_depth(client->adapter));
+
+	gpio->chip.base = pdata ? pdata->gpio_base : -1;
+	gpio->chip.can_sleep = true;
+	gpio->chip.parent = &client->dev;
+	gpio->chip.owner = THIS_MODULE;
+	gpio->chip.get = r2ec_get;
+	gpio->chip.set = r2ec_set;
+	gpio->chip.direction_input = r2ec_input;
+	gpio->chip.direction_output = r2ec_output;
+	gpio->chip.ngpio = id->driver_data;
+	gpio->chip.label = client->name;
+	gpio->client = client;
+
+	i2c_set_clientdata(client, gpio);
+
+	status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
+	if (status < 0) {
+		goto fail;
+	}
+
+	if (client->irq) {
+		gpio->irqchip.name = "r2ec";
+		gpio->irqchip.irq_enable = noop,
+		gpio->irqchip.irq_disable = noop,
+		gpio->irqchip.irq_ack = noop,
+		gpio->irqchip.irq_mask = noop,
+		gpio->irqchip.irq_unmask = noop,
+		gpio->irqchip.irq_set_wake = noop_wake,
+		gpio->irqchip.irq_bus_lock = r2ec_irq_bus_lock;
+		gpio->irqchip.irq_bus_sync_unlock = r2ec_irq_bus_sync_unlock;
+
+		status = gpiochip_irqchip_add_nested(&gpio->chip,
+						     &gpio->irqchip,
+						     0, handle_level_irq,
+						     IRQ_TYPE_NONE);
+		if (status) {
+			dev_err(&client->dev, "cannot add irqchip\n");
+			goto fail;
+		}
+
+		status = devm_request_threaded_irq(&client->dev, client->irq,
+						   NULL, r2ec_irq,
+						   IRQF_ONESHOT |
+						   IRQF_TRIGGER_FALLING |
+						   IRQF_SHARED,
+						   dev_name(&client->dev),
+						   gpio);
+		if (status) {
+			goto fail;
+		}
+	}
+
+	if (pdata && pdata->setup) {
+		status = pdata->setup(client, gpio->chip.base, gpio->chip.ngpio,
+				      pdata->context);
+
+		if (status < 0) {
+			dev_warn(&client->dev, "setup --> %d\n", status);
+		}
+	}
+
+	dev_info(&client->dev, "probed\n");
+	return 0;
+
+fail:
+	devm_kfree(&client->dev, gpio);
+	dev_dbg(&client->dev, "probe error %d for %s\n", status, client->name);
+	return status;
+}
+
+static int r2ec_remove(struct i2c_client *client)
+{
+	struct r2ec_platform_data *pdata = dev_get_platdata(&client->dev);
+	struct r2ec *gpio = i2c_get_clientdata(client);
+	int status = 0;
+
+	if (!(pdata && pdata->teardown)) {
+		return status;
+	}
+
+	status = pdata->teardown(client, gpio->chip.base, gpio->chip.ngpio,
+				 pdata->context);
+
+	if (status < 0) {
+		dev_err(&client->dev, "%s --> %d\n", "teardown", status);
+	}
+
+	return status;
+}
+
+static struct i2c_driver r2ec_driver = {
+	.driver = {
+		.name	= "r2ec",
+		.of_match_table = of_match_ptr(r2ec_of_table),
+	},
+	.probe	= r2ec_probe,
+	.remove	= r2ec_remove,
+	.id_table = r2ec_id,
+};
+
+static int __init r2ec_init(void)
+{
+	int ret;
+
+	ret = i2c_add_driver(&r2ec_driver);
+	if (ret) {
+		printk(KERN_ERR "Unable to initialize `r2ec` driver!\n");
+		return ret;
+	}
+
+	g_r2ec_kobj = kobject_create_and_add("r2ec", NULL);
+	if (!g_r2ec_kobj) {
+		i2c_del_driver(&r2ec_driver);
+		printk(KERN_ERR "Unable to create `r2ec` kobject!\n");
+		return -ENOMEM;
+	}
+
+	if (sysfs_create_group(g_r2ec_kobj, &g_r2ec_attr_group)) {
+		kobject_put(g_r2ec_kobj);
+		i2c_del_driver(&r2ec_driver);
+		printk(KERN_ERR "Unable to create `r2ec` sysfs group!\n");
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static void __exit r2ec_exit(void)
+{
+	kobject_put(g_r2ec_kobj);
+	i2c_del_driver(&r2ec_driver);
+}
+
+module_init(r2ec_init);
+module_exit(r2ec_exit);
+
+MODULE_AUTHOR("Jokubas Maciulaitis <jokubas.maciulaitis@teltonika.lt>");
+MODULE_DESCRIPTION("STM32F0 (R2EC) I2C GPIO Expander driver");
+MODULE_LICENSE("GPL v2");

5.4/target/linux/generic/backport-5.4/071-bpf-dont-allow-vmlinux-btf-to-be-used-in-map_create-and-prog_load.patch

@@ -0,0 +1,80 @@
+Index: linux-5.4.147/kernel/bpf/syscall.c
+===================================================================
+--- linux-5.4.147.orig/kernel/bpf/syscall.c
++++ linux-5.4.147/kernel/bpf/syscall.c
+@@ -593,6 +593,11 @@ static int map_create(union bpf_attr *at
+ 			err = PTR_ERR(btf);
+ 			goto free_map;
+ 		}
++		if (btf_is_kernel(btf)) {
++			btf_put(btf);
++			err = -EACCES;
++			goto free_map;
++		}
+ 
+ 		err = map_check_btf(map, btf, attr->btf_key_type_id,
+ 				    attr->btf_value_type_id);
+Index: linux-5.4.147/kernel/bpf/verifier.c
+===================================================================
+--- linux-5.4.147.orig/kernel/bpf/verifier.c
++++ linux-5.4.147/kernel/bpf/verifier.c
+@@ -6959,6 +6959,11 @@ static int check_btf_info(struct bpf_ver
+ 	btf = btf_get_by_fd(attr->prog_btf_fd);
+ 	if (IS_ERR(btf))
+ 		return PTR_ERR(btf);
++	if (btf_is_kernel(btf)) {
++		btf_put(btf);
++		return -EACCES;
++	}
++
+ 	env->prog->aux->btf = btf;
+ 
+ 	err = check_btf_func(env, attr, uattr);
+Index: linux-5.4.147/include/linux/btf.h
+===================================================================
+--- linux-5.4.147.orig/include/linux/btf.h
++++ linux-5.4.147/include/linux/btf.h
+@@ -47,6 +47,7 @@ void btf_type_seq_show(const struct btf
+ 		       struct seq_file *m);
+ int btf_get_fd_by_id(u32 id);
+ u32 btf_id(const struct btf *btf);
++bool btf_is_kernel(const struct btf *btf);
+ bool btf_member_is_reg_int(const struct btf *btf, const struct btf_type *s,
+ 			   const struct btf_member *m,
+ 			   u32 expected_offset, u32 expected_size);
+Index: linux-5.4.147/kernel/bpf/btf.c
+===================================================================
+--- linux-5.4.147.orig/kernel/bpf/btf.c
++++ linux-5.4.147/kernel/bpf/btf.c
+@@ -212,6 +212,7 @@ struct btf {
+ 	refcount_t refcnt;
+ 	u32 id;
+ 	struct rcu_head rcu;
++	bool kernel_btf;
+ };
+ 
+ enum verifier_phase {
+@@ -352,6 +353,11 @@ static bool btf_type_nosize(const struct
+ 	       btf_type_is_func(t) || btf_type_is_func_proto(t);
+ }
+ 
++bool btf_is_kernel(const struct btf *btf)
++{
++	return btf->kernel_btf;
++}
++
+ static bool btf_type_nosize_or_null(const struct btf_type *t)
+ {
+ 	return !t || btf_type_nosize(t);
+Index: linux-5.4.147/include/uapi/linux/bpf.h
+===================================================================
+--- linux-5.4.147.orig/include/uapi/linux/bpf.h
++++ linux-5.4.147/include/uapi/linux/bpf.h
+@@ -3275,6 +3275,7 @@ struct bpf_btf_info {
+ 	__aligned_u64 btf;
+ 	__u32 btf_size;
+ 	__u32 id;
++	__u32 kernel_btf;
+ } __attribute__((aligned(8)));
+ 
+ /* User bpf_sock_addr struct to access socket fields and sockaddr struct passed

5.4/target/linux/generic/backport-5.4/500-ovl-check-permission-to-open-real-file.patch

@@ -0,0 +1,48 @@
+From 05acefb4872dae89e772729efb194af754c877e8 Mon Sep 17 00:00:00 2001
+From: Miklos Szeredi <mszeredi@redhat.com>
+Date: Tue, 2 Jun 2020 22:20:26 +0200
+Subject: ovl: check permission to open real file
+
+Call inode_permission() on real inode before opening regular file on one of
+the underlying layers.
+
+In some cases ovl_permission() already checks access to an underlying file,
+but it misses the metacopy case, and possibly other ones as well.
+
+Removing the redundant permission check from ovl_permission() should be
+considered later.
+
+Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
+---
+ fs/overlayfs/file.c | 16 ++++++++++++++--
+ 1 file changed, 14 insertions(+), 2 deletions(-)
+
+Index: linux-5.4.147/fs/overlayfs/file.c
+===================================================================
+--- linux-5.4.147.orig/fs/overlayfs/file.c
++++ linux-5.4.147/fs/overlayfs/file.c
+@@ -34,10 +34,22 @@ static struct file *ovl_open_realfile(co
+ 	struct file *realfile;
+ 	const struct cred *old_cred;
+ 	int flags = file->f_flags | OVL_OPEN_FLAGS;
++	int acc_mode = ACC_MODE(flags);
++	int err;
++
++	if (flags & O_APPEND)
++		acc_mode |= MAY_APPEND;
+ 
+ 	old_cred = ovl_override_creds(inode->i_sb);
+-	realfile = open_with_fake_path(&file->f_path, flags, realinode,
+-				       current_cred());
++	err = inode_permission(realinode, MAY_OPEN | acc_mode);
++	if (err) {
++		realfile = ERR_PTR(err);
++	} else if (!inode_owner_or_capable(realinode)) {
++		realfile = ERR_PTR(-EPERM);
++	} else {
++		realfile = open_with_fake_path(&file->f_path, flags, realinode,
++					       current_cred());
++	}
+ 	revert_creds(old_cred);
+ 
+ 	pr_debug("open(%p[%pD2/%c], 0%o) -> (%p, 0%o)\n",

5.4/target/linux/generic/backport-5.4/501-ovl-switch-to-mounter-creds-in-readdir.patch

@@ -0,0 +1,73 @@
+From 48bd024b8a40d73ad6b086de2615738da0c7004f Mon Sep 17 00:00:00 2001
+From: Miklos Szeredi <mszeredi@redhat.com>
+Date: Tue, 2 Jun 2020 22:20:25 +0200
+Subject: ovl: switch to mounter creds in readdir
+
+In preparation for more permission checking, override credentials for
+directory operations on the underlying filesystems.
+
+Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
+---
+ fs/overlayfs/readdir.c | 27 +++++++++++++++++++++------
+ 1 file changed, 21 insertions(+), 6 deletions(-)
+
+Index: linux-5.4.147/fs/overlayfs/readdir.c
+===================================================================
+--- linux-5.4.147.orig/fs/overlayfs/readdir.c
++++ linux-5.4.147/fs/overlayfs/readdir.c
+@@ -732,8 +732,10 @@ static int ovl_iterate(struct file *file
+ 	struct ovl_dir_file *od = file->private_data;
+ 	struct dentry *dentry = file->f_path.dentry;
+ 	struct ovl_cache_entry *p;
++	const struct cred *old_cred;
+ 	int err;
+ 
++	old_cred = ovl_override_creds(dentry->d_sb);
+ 	if (!ctx->pos)
+ 		ovl_dir_reset(file);
+ 
+@@ -747,17 +749,20 @@ static int ovl_iterate(struct file *file
+ 		    (ovl_same_sb(dentry->d_sb) &&
+ 		     (ovl_is_impure_dir(file) ||
+ 		      OVL_TYPE_MERGE(ovl_path_type(dentry->d_parent))))) {
+-			return ovl_iterate_real(file, ctx);
++			err = ovl_iterate_real(file, ctx);
++		} else {
++			err = iterate_dir(od->realfile, ctx);
+ 		}
+-		return iterate_dir(od->realfile, ctx);
++		goto out;
+ 	}
+ 
+ 	if (!od->cache) {
+ 		struct ovl_dir_cache *cache;
+ 
+ 		cache = ovl_cache_get(dentry);
++		err = PTR_ERR(cache);
+ 		if (IS_ERR(cache))
+-			return PTR_ERR(cache);
++			goto out;
+ 
+ 		od->cache = cache;
+ 		ovl_seek_cursor(od, ctx->pos);
+@@ -769,7 +774,7 @@ static int ovl_iterate(struct file *file
+ 			if (!p->ino) {
+ 				err = ovl_cache_update_ino(&file->f_path, p);
+ 				if (err)
+-					return err;
++					goto out;
+ 			}
+ 			if (!dir_emit(ctx, p->name, p->len, p->ino, p->type))
+ 				break;
+@@ -777,7 +782,10 @@ static int ovl_iterate(struct file *file
+ 		od->cursor = p->l_node.next;
+ 		ctx->pos++;
+ 	}
+-	return 0;
++	err = 0;
++out:
++	revert_creds(old_cred);
++	return err;
+ }
+ 
+ static loff_t ovl_dir_llseek(struct file *file, loff_t offset, int origin)

5.4/target/linux/generic/backport-5.4/502-ovl-verify-permissions-in-ovl_path_open.patch

@@ -0,0 +1,61 @@
+From 56230d956739b9cb1cbde439d76227d77979a04d Mon Sep 17 00:00:00 2001
+From: Miklos Szeredi <mszeredi@redhat.com>
+Date: Tue, 2 Jun 2020 22:20:26 +0200
+Subject: ovl: verify permissions in ovl_path_open()
+
+Check permission before opening a real file.
+
+ovl_path_open() is used by readdir and copy-up routines.
+
+ovl_permission() theoretically already checked copy up permissions, but it
+doesn't hurt to re-do these checks during the actual copy-up.
+
+For directory reading ovl_permission() only checks access to topmost
+underlying layer.  Readdir on a merged directory accesses layers below the
+topmost one as well.  Permission wasn't checked for these layers.
+
+Note: modifying ovl_permission() to perform this check would be far more
+complex and hence more bug prone.  The result is less precise permissions
+returned in access(2).  If this turns out to be an issue, we can revisit
+this bug.
+
+Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
+---
+ fs/overlayfs/util.c | 27 ++++++++++++++++++++++++++-
+ 1 file changed, 26 insertions(+), 1 deletion(-)
+
+Index: linux-5.4.147/fs/overlayfs/util.c
+===================================================================
+--- linux-5.4.147.orig/fs/overlayfs/util.c
++++ linux-5.4.147/fs/overlayfs/util.c
+@@ -475,7 +475,29 @@ bool ovl_is_whiteout(struct dentry *dent
+ 
+ struct file *ovl_path_open(struct path *path, int flags)
+ {
+-	return dentry_open(path, flags | O_NOATIME, current_cred());
++	struct inode *inode = d_inode(path->dentry);
++	int err, acc_mode;
++
++	switch (flags & O_ACCMODE) {
++	case O_RDONLY:
++		acc_mode = MAY_READ;
++		break;
++	case O_WRONLY:
++		acc_mode = MAY_WRITE;
++		break;
++	default:
++		BUG();
++	}
++
++	err = inode_permission(inode, acc_mode | MAY_OPEN);
++	if (err)
++		return ERR_PTR(err);
++
++	/* O_NOATIME is an optimization, don't fail if not permitted */
++	if (inode_owner_or_capable(inode))
++		flags |= O_NOATIME;
++
++	return dentry_open(path, flags, current_cred());
+ }
+ 
+ /* Caller should hold ovl_inode->lock */

5.4/target/linux/generic/backport-5.4/503-ovl-do-not-fail-because-of_O_NOACTIME.patch

@@ -0,0 +1,46 @@
+From b6650dab404c701d7fe08a108b746542a934da84 Mon Sep 17 00:00:00 2001
+From: Miklos Szeredi <mszeredi@redhat.com>
+Date: Mon, 14 Dec 2020 15:26:14 +0100
+Subject: ovl: do not fail because of O_NOATIME
+
+In case the file cannot be opened with O_NOATIME because of lack of
+capabilities, then clear O_NOATIME instead of failing.
+
+Remove WARN_ON(), since it would now trigger if O_NOATIME was cleared.
+Noticed by Amir Goldstein.
+
+Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
+---
+ fs/overlayfs/file.c | 11 +++--------
+ 1 file changed, 3 insertions(+), 8 deletions(-)
+
+Index: linux-5.4.147/fs/overlayfs/file.c
+===================================================================
+--- linux-5.4.147.orig/fs/overlayfs/file.c
++++ linux-5.4.147/fs/overlayfs/file.c
+@@ -44,9 +44,10 @@ static struct file *ovl_open_realfile(co
+ 	err = inode_permission(realinode, MAY_OPEN | acc_mode);
+ 	if (err) {
+ 		realfile = ERR_PTR(err);
+-	} else if (!inode_owner_or_capable(realinode)) {
+-		realfile = ERR_PTR(-EPERM);
+ 	} else {
++		if (!inode_owner_or_capable(realinode))
++			flags &= ~O_NOATIME;
++
+ 		realfile = open_with_fake_path(&file->f_path, flags, realinode,
+ 					       current_cred());
+ 	}
+@@ -66,12 +67,6 @@ static int ovl_change_flags(struct file
+ 	struct inode *inode = file_inode(file);
+ 	int err;
+ 
+-	flags |= OVL_OPEN_FLAGS;
+-
+-	/* If some flag changed that cannot be changed then something's amiss */
+-	if (WARN_ON((file->f_flags ^ flags) & ~OVL_SETFL_MASK))
+-		return -EIO;
+-
+ 	flags &= OVL_SETFL_MASK;
+ 
+ 	if (((flags ^ file->f_flags) & O_APPEND) && IS_APPEND(inode))

5.4/target/linux/generic/backport-5.4/700-ignore-pppoe-when-dst-does-not-match-dev-address.patch

@@ -0,0 +1,17 @@
+Index: linux-5.4.124/drivers/net/ppp/pppoe.c
+===================================================================
+--- linux-5.4.124.orig/drivers/net/ppp/pppoe.c
++++ linux-5.4.124/drivers/net/ppp/pppoe.c
+@@ -502,6 +502,12 @@ static int pppoe_disc_rcv(struct sk_buff
+ 	if (ph->code != PADT_CODE)
+ 		goto abort;
+ 
++	// compare the dst addr to the current net device addr and ignore packet if not matching
++	// otherwise it will terminate the connection
++	if(!ether_addr_equal(eth_hdr(skb)->h_dest, dev->dev_addr)) {
++		goto abort;
++	}
++
+ 	pn = pppoe_pernet(dev_net(dev));
+ 	po = get_item(pn, ph->sid, eth_hdr(skb)->h_source, dev->ifindex);
+ 	if (po)

5.4/target/linux/generic/hack-5.4/693-tcp_bbr2.patch

@@ -3244,14 +3244,14 @@ index be6d22b8190f..4943f96aade8 100644
  
  	/* Link BUFF into the send queue. */
 @@ -1743,13 +1750,12 @@ static u32 tcp_tso_autosize(const struct sock *sk, unsigned int mss_now,
- static u32 tcp_tso_segs(struct sock *sk, unsigned int mss_now)
+ u32 tcp_tso_segs(struct sock *sk, unsigned int mss_now)
  {
  	const struct tcp_congestion_ops *ca_ops = inet_csk(sk)->icsk_ca_ops;
 -	u32 min_tso, tso_segs;
 -
 -	min_tso = ca_ops->min_tso_segs ?
 -			ca_ops->min_tso_segs(sk) :
--			sock_net(sk)->ipv4.sysctl_tcp_min_tso_segs;
+-			READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_min_tso_segs);
 +	u32 tso_segs;
  
 -	tso_segs = tcp_tso_autosize(sk, mss_now, min_tso);
@@ -3310,10 +3310,11 @@ index 0de693565963..796fa6e5310c 100644
  }
  
  /* When an skb is sacked or acked, we fill in the rate sample with the (prior)
-@@ -86,16 +107,20 @@ void tcp_rate_skb_delivered(struct sock *sk, struct sk_buff *skb,
- 
+@@ -86,18 +107,22 @@ void tcp_rate_skb_delivered(struct sock *sk, struct sk_buff *skb,
+ 	tx_tstamp = tcp_skb_timestamp_us(skb);
  	if (!rs->prior_delivered ||
- 	    after(scb->tx.delivered, rs->prior_delivered)) {
+ 	    tcp_skb_sent_after(tx_tstamp, tp->first_tx_mstamp,
+ 			       scb->end_seq, rs->last_end_seq)) {
 +		rs->prior_lost	     = scb->tx.lost;
 +		rs->prior_delivered_ce  = scb->tx.delivered_ce;
  		rs->prior_delivered  = scb->tx.delivered;
@@ -3321,9 +3322,10 @@ index 0de693565963..796fa6e5310c 100644
  		rs->is_app_limited   = scb->tx.is_app_limited;
  		rs->is_retrans	     = scb->sacked & TCPCB_RETRANS;
 +		rs->tx_in_flight     = scb->tx.in_flight;
+ 		rs->last_end_seq     = scb->end_seq;
  
  		/* Record send time of most recently ACKed packet: */
- 		tp->first_tx_mstamp  = tcp_skb_timestamp_us(skb);
+ 		tp->first_tx_mstamp  = tx_tstamp;
  		/* Find the duration of the "send phase" of this window: */
 -		rs->interval_us = tcp_stamp_us_delta(tp->first_tx_mstamp,
 -						     scb->tx.first_tx_mstamp);

5.4/target/linux/generic/hack-5.4/953-net-patch-linux-kernel-to-support-shortcut-fe.patch

@@ -12,12 +12,12 @@
  			       struct list_head *br_ip_list);
 --- a/include/linux/skbuff.h
 +++ b/include/linux/skbuff.h
-@@ -826,6 +826,10 @@ struct sk_buff {
+@@ -827,6 +827,10 @@ struct sk_buff {
  #endif
- 	__u8			gro_skip:1;
+ 	__u8			scm_io_uring:1;
  
 +#ifdef CONFIG_SHORTCUT_FE
-+	__u16			fast_forwarded:1;
++	__u8			fast_forwarded:1;
 +#endif
 +
  #ifdef CONFIG_NET_SCHED
@@ -49,7 +49,7 @@
  	int (*fcn)(unsigned int events, struct nf_ct_event *item);
 --- a/net/bridge/br_if.c
 +++ b/net/bridge/br_if.c
-@@ -746,6 +746,28 @@ void br_port_flags_change(struct net_bri
+@@ -763,6 +763,28 @@ void br_port_flags_change(struct net_bri
  		br_recalculate_neigh_suppress_enabled(br);
  }
  
@@ -78,10 +78,9 @@
  bool br_port_flag_is_set(const struct net_device *dev, unsigned long flag)
  {
  	struct net_bridge_port *p;
- 
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -3189,8 +3189,17 @@ static int xmit_one(struct sk_buff *skb, struct net_device *dev,
+@@ -3197,9 +3197,17 @@ static int xmit_one(struct sk_buff *skb,
  	unsigned int len;
  	int rc;
  
@@ -93,13 +92,14 @@
 +#endif
  	if (dev_nit_active(dev))
  		dev_queue_xmit_nit(skb, dev);
+-
 +#ifdef CONFIG_SHORTCUT_FE
 +	}
 +#endif
- 
  #ifdef CONFIG_ETHERNET_PACKET_MANGLE
  	if (!dev->eth_mangle_tx ||
-@@ -4683,6 +4691,11 @@ void netdev_rx_handler_unregister(struct
+ 	    (skb = dev->eth_mangle_tx(dev, skb)) != NULL)
+@@ -4715,6 +4723,11 @@ void netdev_rx_handler_unregister(struct
  }
  EXPORT_SYMBOL_GPL(netdev_rx_handler_unregister);
  
@@ -111,7 +111,7 @@
  /*
   * Limit the use of PFMEMALLOC reserves to those protocols that implement
   * the special handling of PFMEMALLOC skbs.
-@@ -4733,6 +4746,10 @@ static int __netif_receive_skb_core(stru
+@@ -4765,6 +4778,10 @@ static int __netif_receive_skb_core(stru
  	int ret = NET_RX_DROP;
  	__be16 type;
  
@@ -119,10 +119,10 @@
 +	int (*fast_recv)(struct sk_buff *skb);
 +#endif
 +
- 	net_timestamp_check(!netdev_tstamp_prequeue, skb);
+ 	net_timestamp_check(!READ_ONCE(netdev_tstamp_prequeue), skb);
  
  	trace_netif_receive_skb(skb);
-@@ -4772,6 +4789,16 @@ another_round:
+@@ -4804,6 +4821,16 @@ another_round:
  			goto out;
  	}
  
@@ -172,7 +172,7 @@
  static int nf_ct_tcp_loose __read_mostly = 1;
 --- a/net/netfilter/nf_conntrack_ecache.c
 +++ b/net/netfilter/nf_conntrack_ecache.c
-@@ -162,7 +162,11 @@ int nf_conntrack_eventmask_report(unsigned int eventmask, struct nf_conn *ct,
+@@ -158,7 +158,11 @@ int nf_conntrack_eventmask_report(unsign
  
  	rcu_read_lock();
  	notify = rcu_dereference(net->ct.nf_conntrack_event_cb);
@@ -184,7 +184,7 @@
  		goto out_unlock;
  
  	e = nf_ct_ecache_find(ct);
-@@ -181,7 +185,14 @@ int nf_conntrack_eventmask_report(unsigned int eventmask, struct nf_conn *ct,
+@@ -177,7 +181,14 @@ int nf_conntrack_eventmask_report(unsign
  		if (!((eventmask | missed) & e->ctmask))
  			goto out_unlock;
  
@@ -199,7 +199,7 @@
  		if (unlikely(ret < 0 || missed)) {
  			spin_lock_bh(&ct->lock);
  			if (ret < 0) {
-@@ -263,7 +274,11 @@ void nf_ct_deliver_cached_events(struct nf_conn *ct)
+@@ -259,7 +270,11 @@ void nf_ct_deliver_cached_events(struct
  
  	rcu_read_lock();
  	notify = rcu_dereference(net->ct.nf_conntrack_event_cb);
@@ -211,7 +211,7 @@
  		goto out_unlock;
  
  	e = nf_ct_ecache_find(ct);
-@@ -287,7 +302,15 @@ void nf_ct_deliver_cached_events(struct nf_conn *ct)
+@@ -283,7 +298,15 @@ void nf_ct_deliver_cached_events(struct
  	item.portid = 0;
  	item.report = 0;
  
@@ -227,9 +227,9 @@
  
  	if (likely(ret == 0 && !missed))
  		goto out_unlock;
-@@ -340,6 +363,11 @@ int nf_conntrack_register_notifier(struct net *net, struct notifier_block *nb)
+@@ -337,6 +360,11 @@ int nf_conntrack_register_notifier(struc
  {
- 	return atomic_notifier_chain_register(&net->ct.nf_conntrack_chain, nb);
+         return atomic_notifier_chain_register(&net->ct.nf_conntrack_chain, nb);
  }
 +int nf_conntrack_register_chain_notifier(struct net *net, struct notifier_block *nb)
 +{
@@ -239,7 +239,7 @@
  #else
  int nf_conntrack_register_notifier(struct net *net,
  				   struct nf_ct_event_notifier *new)
-@@ -369,6 +397,11 @@ int nf_conntrack_unregister_notifier(struct net *net, struct notifier_block *nb)
+@@ -366,6 +394,11 @@ int nf_conntrack_unregister_notifier(str
  {
  	return atomic_notifier_chain_unregister(&net->ct.nf_conntrack_chain, nb);
  }

5.4/target/linux/generic/hack-5.4/998-xhci-workaround-set_deq_pending.patch

@@ -0,0 +1,43 @@
+From 582774df32849d6638133a675f7502730b46e217 Mon Sep 17 00:00:00 2001
+From: Jonathan Bell <jonathan@raspberrypi.com>
+Date: Wed, 11 Aug 2021 15:33:57 +0100
+Subject: [PATCH] usb: xhci: workaround for bogus SET_DEQ_PENDING endpoint
+ state
+
+See https://github.com/raspberrypi/linux/issues/3981
+
+An unknown unsafe memory access can result in the ep_state variable
+in xhci_virt_ep being trampled with a stuck SET_DEQ_PENDING state
+despite successful completion of a Set TR Deq Pointer command.
+
+All URB enqueue/dequeue calls for the endpoint will fail in this state
+so no transfers are possible until the device is reconnected.
+
+As a workaround, clear the flag if we see it set and issue a new Set
+TR Deq command anyway - this should be harmless, as a prior Set TR Deq
+command will only have been issued in the Stopped state, and if the
+endpoint is Running then the controller is required to ignore it and
+respond with a Context State Error event TRB.
+
+Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
+---
+ drivers/usb/host/xhci-ring.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
+index 35b246aeb902a..726d8291bd31a 100644
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -4223,9 +4223,9 @@ void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
+ 	}
+ 	ep = &xhci->devs[slot_id]->eps[ep_index];
+ 	if ((ep->ep_state & SET_DEQ_PENDING)) {
+-		xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
+-		xhci_warn(xhci, "A Set TR Deq Ptr command is pending.\n");
+-		return;
++		xhci_warn(xhci, "WARN A Set TR Deq Ptr command is pending for slot %u ep %u\n",
++			  slot_id, ep_index);
++		ep->ep_state &= ~SET_DEQ_PENDING;
+ 	}
+ 
+ 	/* This function gets called from contexts where it cannot sleep */

5.4/target/linux/generic/hack-5.4/999-ndpi.patch

@@ -0,0 +1,131 @@
+From 719f0efb5a355adc04653d12d946901c8a051177 Mon Sep 17 00:00:00 2001
+From: Vitaly Lavrov <vel21ripn@gmail.com>
+Date: Mon, 10 Dec 2018 12:34:10 +0300
+Subject: [PATCH] Add NF_CUSTOM
+
+---
+ include/net/netfilter/nf_conntrack_extend.h |  4 ++-
+ net/netfilter/Kconfig                       | 10 +++++++
+ net/netfilter/nf_conntrack_core.c           |  2 +-
+ net/netfilter/nf_conntrack_extend.c         | 45 +++++++++++++++++++++++++++++
+ 4 files changed, 59 insertions(+), 2 deletions(-)
+
+diff --git a/include/net/netfilter/nf_conntrack_extend.h b/include/net/netfilter/nf_conntrack_extend.h
+index 112a6f4..6146689 100644
+--- a/include/net/netfilter/nf_conntrack_extend.h
++++ b/include/net/netfilter/nf_conntrack_extend.h
+@@ -28,7 +28,8 @@ enum nf_ct_ext_id {
+ #if IS_ENABLED(CONFIG_NETFILTER_SYNPROXY)
+ 	NF_CT_EXT_SYNPROXY,
+ #endif
+-	NF_CT_EXT_NUM,
++	NF_CT_EXT_CUSTOM,
++	NF_CT_EXT_NUM=NF_CT_EXT_CUSTOM+CONFIG_NF_CONNTRACK_CUSTOM,
+ };
+ 
+ #define NF_CT_EXT_HELPER_TYPE struct nf_conn_help
+@@ -96,5 +97,6 @@ struct nf_ct_ext_type {
+ };
+ 
+ int nf_ct_extend_register(const struct nf_ct_ext_type *type);
++int nf_ct_extend_custom_register(struct nf_ct_ext_type *type,unsigned long int cid);
+ void nf_ct_extend_unregister(const struct nf_ct_ext_type *type);
+ #endif /* _NF_CONNTRACK_EXTEND_H */
+diff --git a/net/netfilter/Kconfig b/net/netfilter/Kconfig
+index d374a93..2ca93aa 100644
+--- a/net/netfilter/Kconfig
++++ b/net/netfilter/Kconfig
+@@ -104,6 +104,16 @@ config NF_CONNTRACK_SECMARK
+ 
+ 	  If unsure, say 'N'.
+ 
++config NF_CONNTRACK_CUSTOM
++	int "Number of custom extend"
++	range 0 4
++	depends on NETFILTER_ADVANCED
++	default "2"
++	help
++	  This parameter specifies how many custom extensions can be registered.
++
++	  The default value is 2.
++
+ config NF_CONNTRACK_ZONES
+ 	bool  'Connection tracking zones'
+ 	depends on NETFILTER_ADVANCED
+diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c
+index 9a40312..83e9379 100644
+--- a/net/netfilter/nf_conntrack_core.c
++++ b/net/netfilter/nf_conntrack_core.c
+@@ -2409,7 +2409,7 @@ EXPORT_SYMBOL_GPL(nf_conntrack_set_hashsize);
+ static __always_inline unsigned int total_extension_size(void)
+ {
+ 	/* remember to add new extensions below */
+-	BUILD_BUG_ON(NF_CT_EXT_NUM > 9);
++	BUILD_BUG_ON(NF_CT_EXT_NUM > 12);
+ 
+ 	return sizeof(struct nf_ct_ext) +
+ 	       sizeof(struct nf_conn_help)
+diff --git a/net/netfilter/nf_conntrack_extend.c b/net/netfilter/nf_conntrack_extend.c
+index d4ed1e1..00d7fc6 100644
+--- a/net/netfilter/nf_conntrack_extend.c
++++ b/net/netfilter/nf_conntrack_extend.c
+@@ -106,11 +106,56 @@ int nf_ct_extend_register(const struct nf_ct_ext_type *type)
+ }
+ EXPORT_SYMBOL_GPL(nf_ct_extend_register);
+ 
++static unsigned long int nf_ct_ext_cust_id[CONFIG_NF_CONNTRACK_CUSTOM];
++static enum nf_ct_ext_id 
++nf_ct_extend_get_custom_id(unsigned long int ext_id);
++
++int nf_ct_extend_custom_register(struct nf_ct_ext_type *type,
++				 unsigned long int cid)
++{
++	int ret;
++	enum nf_ct_ext_id new_id = nf_ct_extend_get_custom_id(cid);
++	if(!new_id)
++		return -EBUSY;
++	type->id = new_id;
++	ret = nf_ct_extend_register(type);
++	if(ret < 0) {
++		mutex_lock(&nf_ct_ext_type_mutex);
++		nf_ct_ext_cust_id[new_id - NF_CT_EXT_CUSTOM] = 0;
++		mutex_unlock(&nf_ct_ext_type_mutex);
++	}
++	return ret;
++}
++EXPORT_SYMBOL_GPL(nf_ct_extend_custom_register);
++
++static enum nf_ct_ext_id 
++nf_ct_extend_get_custom_id(unsigned long int ext_id)
++{
++	enum nf_ct_ext_id ret = 0;
++	int i;
++	mutex_lock(&nf_ct_ext_type_mutex);
++	for(i = 0; i < CONFIG_NF_CONNTRACK_CUSTOM; i++) {
++		if(!nf_ct_ext_cust_id[i]) {
++			nf_ct_ext_cust_id[i] = ext_id;
++			ret = i+NF_CT_EXT_CUSTOM;
++			break;
++		}
++		if(nf_ct_ext_cust_id[i] == ext_id) {
++			ret = i+NF_CT_EXT_CUSTOM;
++			break;
++		}
++	}
++	mutex_unlock(&nf_ct_ext_type_mutex);
++	return ret;
++}
++
+ /* This MUST be called in process context. */
+ void nf_ct_extend_unregister(const struct nf_ct_ext_type *type)
+ {
+ 	mutex_lock(&nf_ct_ext_type_mutex);
+ 	RCU_INIT_POINTER(nf_ct_ext_types[type->id], NULL);
++	if(type->id >= NF_CT_EXT_CUSTOM && type->id < NF_CT_EXT_NUM)
++		nf_ct_ext_cust_id[type->id-NF_CT_EXT_CUSTOM] = 0;
+ 	mutex_unlock(&nf_ct_ext_type_mutex);
+ 	synchronize_rcu();
+ }
+-- 
+2.9.0
+

5.4/target/linux/generic/pending-5.4/481-mtd-spi-nor-Add-default-and-support-for-missing-flashes.patch

@@ -0,0 +1,50 @@
+Index: linux-5.4.124/drivers/mtd/spi-nor/spi-nor.c
+===================================================================
+--- linux-5.4.124.orig/drivers/mtd/spi-nor/spi-nor.c
++++ linux-5.4.124/drivers/mtd/spi-nor/spi-nor.c
+@@ -2241,6 +2241,9 @@ static const struct flash_info spi_nor_i
+ 			.fixups = &gd25q256_fixups,
+ 	},
+ 
++	/* Zbit */
++	{ "zb25vq128", INFO(0xC84018, 0, 64 * 1024,  64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
++
+ 	/* Intel/Numonyx -- xxxs33b */
+ 	{ "160s33b",  INFO(0x898911, 0, 64 * 1024,  32, 0) },
+ 	{ "320s33b",  INFO(0x898912, 0, 64 * 1024,  64, 0) },
+@@ -2405,6 +2408,7 @@ static const struct flash_info spi_nor_i
+ 	{ "m25p32",  INFO(0x202016,  0,  64 * 1024,  64, 0) },
+ 	{ "m25p64",  INFO(0x202017,  0,  64 * 1024, 128, 0) },
+ 	{ "m25p128", INFO(0x202018,  0, 256 * 1024,  64, 0) },
++	{ "n25q032", INFO(0x20ba16,  0,  64 * 1024,  64, 0) },
+ 
+ 	{ "m25p05-nonjedec",  INFO(0, 0,  32 * 1024,   2, 0) },
+ 	{ "m25p10-nonjedec",  INFO(0, 0,  32 * 1024,   4, 0) },
+@@ -2508,10 +2512,14 @@ static const struct flash_info spi_nor_i
+ 	{ "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ 
+ 	/* XTX Technology (Shenzhen) Limited */
++	{ "XT25F128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },	
+ 	{ "xt25f128b", INFO(0x0B4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ 	{ },
+ };
+ 
++static const struct flash_info spi_nor_unknown_id = 
++	{ "undefined",  INFO(0x0, 0, 64 * 1024, 256, SECT_4K) };
++
+ static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
+ {
+ 	int			tmp;
+@@ -2542,9 +2550,12 @@ static const struct flash_info *spi_nor_
+ 				return &spi_nor_ids[tmp];
+ 		}
+ 	}
++	return &spi_nor_unknown_id; // for Teltonikia RUT devices
++	/*
+ 	dev_err(nor->dev, "unrecognized JEDEC id bytes: %*ph\n",
+ 		SPI_NOR_MAX_ID_LEN, id);
+ 	return ERR_PTR(-ENODEV);
++	*/
+ }
+ 
+ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,

5.4/target/linux/generic/pending-5.4/483-mtd-spinand-add-support-for-xtx-xt26g0xa.patch

@@ -0,0 +1,198 @@
+From a07e31adf2753cad2fd9790db5bfc047c81e8152 Mon Sep 17 00:00:00 2001
+From: Felix Matouschek <felix@matouschek.org>
+Date: Fri, 2 Jul 2021 20:31:23 +0200
+Subject: [PATCH] mtd: spinand: Add support for XTX XT26G0xA
+
+Add support for XTX Technology XT26G01AXXXXX, XTX26G02AXXXXX and
+XTX26G04AXXXXX SPI NAND.
+
+These are 3V, 1G/2G/4Gbit serial SLC NAND flash devices with on-die ECC
+(8bit strength per 512bytes).
+
+Tested on Teltonika RUTX10 flashed with OpenWrt.
+
+Datasheets available at
+http://www.xtxtech.com/download/?AId=225
+https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT26G01AWSEGA_C558841.pdf
+
+Signed-off-by: Felix Matouschek <felix@matouschek.org>
+---
+ drivers/mtd/nand/spi/Makefile |   2 +-
+ drivers/mtd/nand/spi/core.c   |   1 +
+ drivers/mtd/nand/spi/xtx.c    | 122 ++++++++++++++++++++++++++++++++++
+ include/linux/mtd/spinand.h   |   1 +
+ 4 files changed, 125 insertions(+), 1 deletion(-)
+ create mode 100644 drivers/mtd/nand/spi/xtx.c
+
+Index: linux-5.4.132/drivers/mtd/nand/spi/Makefile
+===================================================================
+--- linux-5.4.132.orig/drivers/mtd/nand/spi/Makefile
++++ linux-5.4.132/drivers/mtd/nand/spi/Makefile
+@@ -1,3 +1,3 @@
+ # SPDX-License-Identifier: GPL-2.0
+-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
++spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
+ obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
+Index: linux-5.4.132/drivers/mtd/nand/spi/core.c
+===================================================================
+--- linux-5.4.132.orig/drivers/mtd/nand/spi/core.c
++++ linux-5.4.132/drivers/mtd/nand/spi/core.c
+@@ -758,6 +758,7 @@ static const struct spinand_manufacturer
+ 	&paragon_spinand_manufacturer,
+ 	&toshiba_spinand_manufacturer,
+ 	&winbond_spinand_manufacturer,
++	&xtx_spinand_manufacturer,
+ };
+ 
+ static int spinand_manufacturer_detect(struct spinand_device *spinand)
+Index: linux-5.4.132/drivers/mtd/nand/spi/xtx.c
+===================================================================
+--- /dev/null
++++ linux-5.4.132/drivers/mtd/nand/spi/xtx.c
+@@ -0,0 +1,134 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * Author:
++ * Felix Matouschek <felix@matouschek.org>
++ */
++
++#include <linux/device.h>
++#include <linux/kernel.h>
++#include <linux/mtd/spinand.h>
++
++#define SPINAND_MFR_XTX	0x0B
++
++#define XT26G0XA_STATUS_ECC_MASK	GENMASK(5, 2)
++#define XT26G0XA_STATUS_ECC_NO_DETECTED	(0 << 2)
++#define XT26G0XA_STATUS_ECC_8_CORRECTED	(3 << 4)
++#define XT26G0XA_STATUS_ECC_UNCOR_ERROR	(2 << 4)
++
++static SPINAND_OP_VARIANTS(read_cache_variants,
++		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
++		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
++		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
++		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
++		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
++		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
++
++static SPINAND_OP_VARIANTS(write_cache_variants,
++		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
++		SPINAND_PROG_LOAD(true, 0, NULL, 0));
++
++static SPINAND_OP_VARIANTS(update_cache_variants,
++		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
++		SPINAND_PROG_LOAD(false, 0, NULL, 0));
++
++static int xt26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section,
++				   struct mtd_oob_region *region)
++{
++	if (section)
++		return -ERANGE;
++
++	region->offset = 8;
++	region->length = 40;
++
++	return 0;
++}
++
++static int xt26g0xa_ooblayout_free(struct mtd_info *mtd, int section,
++				   struct mtd_oob_region *region)
++{
++	if (section)
++		return -ERANGE;
++
++	region->offset = 1;
++	region->length = 7;
++
++	return 0;
++}
++
++static const struct mtd_ooblayout_ops xt26g0xa_ooblayout = {
++	.ecc = xt26g0xa_ooblayout_ecc,
++	.free = xt26g0xa_ooblayout_free,
++};
++
++static int xt26g0xa_ecc_get_status(struct spinand_device *spinand,
++					 u8 status)
++{
++	switch (status & XT26G0XA_STATUS_ECC_MASK) {
++	case XT26G0XA_STATUS_ECC_NO_DETECTED:
++		return 0;
++	case XT26G0XA_STATUS_ECC_8_CORRECTED:
++		return 8;
++	case XT26G0XA_STATUS_ECC_UNCOR_ERROR:
++		return -EBADMSG;
++	default: /* (1 << 2) through (7 << 2) are 1-7 corrected errors */
++		return (status & XT26G0XA_STATUS_ECC_MASK) >> 2;
++	}
++
++	return -EINVAL;
++}
++
++static const struct spinand_info xtx_spinand_table[] = {
++	SPINAND_INFO("XT26G01A", 0xE1,
++		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
++		     NAND_ECCREQ(8, 512),
++		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++					      &write_cache_variants,
++					      &update_cache_variants),
++		     SPINAND_HAS_QE_BIT,
++		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
++				     xt26g0xa_ecc_get_status)),
++	SPINAND_INFO("XT26G02A", 0xE2,
++		     NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
++		     NAND_ECCREQ(8, 512),
++		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++					      &write_cache_variants,
++					      &update_cache_variants),
++		     SPINAND_HAS_QE_BIT,
++		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
++				     xt26g0xa_ecc_get_status)),
++	SPINAND_INFO("XT26G04A", 0xE3,
++		     NAND_MEMORG(1, 2048, 64, 128, 2048, 40, 1, 1, 1),
++		     NAND_ECCREQ(8, 512),
++		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++					      &write_cache_variants,
++					      &update_cache_variants),
++		     SPINAND_HAS_QE_BIT,
++		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
++				     xt26g0xa_ecc_get_status)),
++};
++
++static int xtx_spinand_detect(struct spinand_device *spinand)
++{
++	u8 *id = spinand->id.data;
++	int ret;
++
++	if (id[1] != SPINAND_MFR_XTX)
++		return 0;
++
++	ret = spinand_match_and_init(spinand, xtx_spinand_table,
++				     ARRAY_SIZE(xtx_spinand_table), id[2]);
++	if (ret)
++		return ret;
++
++	return 1;
++}
++
++static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
++	.detect = xtx_spinand_detect,
++};
++
++const struct spinand_manufacturer xtx_spinand_manufacturer = {
++	.id = SPINAND_MFR_XTX,
++	.name = "XTX",
++	.ops = &xtx_spinand_manuf_ops,
++};
+Index: linux-5.4.132/include/linux/mtd/spinand.h
+===================================================================
+--- linux-5.4.132.orig/include/linux/mtd/spinand.h
++++ linux-5.4.132/include/linux/mtd/spinand.h
+@@ -230,6 +230,7 @@ extern const struct spinand_manufacturer
+ extern const struct spinand_manufacturer paragon_spinand_manufacturer;
+ extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
+ extern const struct spinand_manufacturer winbond_spinand_manufacturer;
++extern const struct spinand_manufacturer xtx_spinand_manufacturer;
+ 
+ /**
+  * struct spinand_op_variants - SPI NAND operation variants

5.4/target/linux/generic/pending-5.4/640-netfilter-nf_flow_table-add-hardware-offload-support.patch

@@ -0,0 +1,554 @@
+From: Pablo Neira Ayuso <pablo@netfilter.org>
+Date: Thu, 11 Jan 2018 16:32:00 +0100
+Subject: [PATCH] netfilter: nf_flow_table: add hardware offload support
+
+This patch adds the infrastructure to offload flows to hardware, in case
+the nic/switch comes with built-in flow tables capabilities.
+
+If the hardware comes with no hardware flow tables or they have
+limitations in terms of features, the existing infrastructure falls back
+to the software flow table implementation.
+
+The software flow table garbage collector skips entries that resides in
+the hardware, so the hardware will be responsible for releasing this
+flow table entry too via flow_offload_dead().
+
+Hardware configuration, either to add or to delete entries, is done from
+the hardware offload workqueue, to ensure this is done from user context
+given that we may sleep when grabbing the mdio mutex.
+
+Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
+---
+ create mode 100644 net/netfilter/nf_flow_table_hw.c
+
+--- a/include/linux/netdevice.h
++++ b/include/linux/netdevice.h
+@@ -922,6 +922,13 @@ struct devlink;
+ struct tlsdev_ops;
+ 
+ 
++struct flow_offload;
++
++enum flow_offload_type {
++	FLOW_OFFLOAD_ADD	= 0,
++	FLOW_OFFLOAD_DEL,
++};
++
+ /*
+  * This structure defines the management hooks for network devices.
+  * The following hooks can be defined; unless noted otherwise, they are
+@@ -1154,6 +1161,10 @@ struct tlsdev_ops;
+  * int (*ndo_bridge_dellink)(struct net_device *dev, struct nlmsghdr *nlh,
+  *			     u16 flags);
+  *
++ * int (*ndo_flow_offload)(enum flow_offload_type type,
++ *			   struct flow_offload *flow);
++ *	Adds/deletes flow entry to/from net device flowtable.
++ *
+  * int (*ndo_change_carrier)(struct net_device *dev, bool new_carrier);
+  *	Called to change device carrier. Soft-devices (like dummy, team, etc)
+  *	which do not represent real hardware may define this to allow their
+@@ -1401,6 +1412,8 @@ struct net_device_ops {
+ 	int			(*ndo_bridge_dellink)(struct net_device *dev,
+ 						      struct nlmsghdr *nlh,
+ 						      u16 flags);
++	int			(*ndo_flow_offload)(enum flow_offload_type type,
++						    struct flow_offload *flow);
+ 	int			(*ndo_change_carrier)(struct net_device *dev,
+ 						      bool new_carrier);
+ 	int			(*ndo_get_phys_port_id)(struct net_device *dev,
+--- a/include/net/netfilter/nf_flow_table.h
++++ b/include/net/netfilter/nf_flow_table.h
+@@ -21,11 +21,17 @@ struct nf_flowtable_type {
+ 	struct module			*owner;
+ };
+ 
++enum nf_flowtable_flags {
++	NF_FLOWTABLE_F_HW		= 0x1,
++};
++
+ struct nf_flowtable {
+ 	struct list_head		list;
+ 	struct rhashtable		rhashtable;
+ 	const struct nf_flowtable_type	*type;
++	u32				flags;
+ 	struct delayed_work		gc_work;
++	possible_net_t			ft_net;
+ };
+ 
+ enum flow_offload_tuple_dir {
+@@ -68,6 +74,7 @@ struct flow_offload_tuple_rhash {
+ #define FLOW_OFFLOAD_DNAT	0x2
+ #define FLOW_OFFLOAD_DYING	0x4
+ #define FLOW_OFFLOAD_TEARDOWN	0x8
++#define FLOW_OFFLOAD_HW		0x10
+ 
+ struct flow_offload {
+ 	struct flow_offload_tuple_rhash		tuplehash[FLOW_OFFLOAD_DIR_MAX];
+@@ -120,6 +127,22 @@ unsigned int nf_flow_offload_ip_hook(voi
+ unsigned int nf_flow_offload_ipv6_hook(void *priv, struct sk_buff *skb,
+ 				       const struct nf_hook_state *state);
+ 
++void nf_flow_offload_hw_add(struct net *net, struct flow_offload *flow,
++			    struct nf_conn *ct);
++void nf_flow_offload_hw_del(struct net *net, struct flow_offload *flow);
++
++struct nf_flow_table_hw {
++	struct module	*owner;
++	void		(*add)(struct net *net, struct flow_offload *flow,
++			       struct nf_conn *ct);
++	void		(*del)(struct net *net, struct flow_offload *flow);
++};
++
++int nf_flow_table_hw_register(const struct nf_flow_table_hw *offload);
++void nf_flow_table_hw_unregister(const struct nf_flow_table_hw *offload);
++
++extern struct work_struct nf_flow_offload_hw_work;
++
+ #define MODULE_ALIAS_NF_FLOWTABLE(family)	\
+ 	MODULE_ALIAS("nf-flowtable-" __stringify(family))
+ 
+--- a/include/uapi/linux/netfilter/nf_tables.h
++++ b/include/uapi/linux/netfilter/nf_tables.h
+@@ -1516,6 +1516,7 @@ enum nft_object_attributes {
+  * @NFTA_FLOWTABLE_HOOK: netfilter hook configuration(NLA_U32)
+  * @NFTA_FLOWTABLE_USE: number of references to this flow table (NLA_U32)
+  * @NFTA_FLOWTABLE_HANDLE: object handle (NLA_U64)
++ * @NFTA_FLOWTABLE_FLAGS: flags (NLA_U32)
+  */
+ enum nft_flowtable_attributes {
+ 	NFTA_FLOWTABLE_UNSPEC,
+@@ -1525,6 +1526,7 @@ enum nft_flowtable_attributes {
+ 	NFTA_FLOWTABLE_USE,
+ 	NFTA_FLOWTABLE_HANDLE,
+ 	NFTA_FLOWTABLE_PAD,
++	NFTA_FLOWTABLE_FLAGS,
+ 	__NFTA_FLOWTABLE_MAX
+ };
+ #define NFTA_FLOWTABLE_MAX	(__NFTA_FLOWTABLE_MAX - 1)
+--- a/net/netfilter/Kconfig
++++ b/net/netfilter/Kconfig
+@@ -711,6 +711,15 @@ config NF_FLOW_TABLE
+ 
+ 	  To compile it as a module, choose M here.
+ 
++config NF_FLOW_TABLE_HW
++	tristate "Netfilter flow table hardware offload module"
++	depends on NF_FLOW_TABLE
++	help
++	  This option adds hardware offload support for the flow table core
++	  infrastructure.
++
++	  To compile it as a module, choose M here.
++
+ config NETFILTER_XTABLES
+ 	tristate "Netfilter Xtables support (required for ip_tables)"
+ 	default m if NETFILTER_ADVANCED=n
+--- a/net/netfilter/Makefile
++++ b/net/netfilter/Makefile
+@@ -123,6 +123,7 @@ obj-$(CONFIG_NF_FLOW_TABLE)	+= nf_flow_t
+ nf_flow_table-objs := nf_flow_table_core.o nf_flow_table_ip.o
+ 
+ obj-$(CONFIG_NF_FLOW_TABLE_INET) += nf_flow_table_inet.o
++obj-$(CONFIG_NF_FLOW_TABLE_HW)	+= nf_flow_table_hw.o
+ 
+ # generic X tables
+ obj-$(CONFIG_NETFILTER_XTABLES) += x_tables.o xt_tcpudp.o
+--- a/net/netfilter/nf_flow_table_core.c
++++ b/net/netfilter/nf_flow_table_core.c
+@@ -248,10 +248,16 @@ static inline bool nf_flow_has_expired(c
+ 	return nf_flow_timeout_delta(flow->timeout) <= 0;
+ }
+ 
++static inline bool nf_flow_in_hw(const struct flow_offload *flow)
++{
++	return flow->flags & FLOW_OFFLOAD_HW;
++}
++
+ static void flow_offload_del(struct nf_flowtable *flow_table,
+ 			     struct flow_offload *flow)
+ {
+ 	struct flow_offload_entry *e;
++	struct net *net = read_pnet(&flow_table->ft_net);
+ 
+ 	rhashtable_remove_fast(&flow_table->rhashtable,
+ 			       &flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].node,
+@@ -271,6 +277,9 @@ static void flow_offload_del(struct nf_f
+ 	if (!(flow->flags & FLOW_OFFLOAD_TEARDOWN))
+ 		flow_offload_fixup_ct_state(e->ct);
+ 
++	if (nf_flow_in_hw(flow))
++		nf_flow_offload_hw_del(net, flow);
++
+ 	flow_offload_free(flow);
+ }
+ 
+@@ -490,10 +502,43 @@ int nf_flow_dnat_port(const struct flow_
+ }
+ EXPORT_SYMBOL_GPL(nf_flow_dnat_port);
+ 
++static const struct nf_flow_table_hw __rcu *nf_flow_table_hw_hook __read_mostly;
++
++static int nf_flow_offload_hw_init(struct nf_flowtable *flow_table)
++{
++	const struct nf_flow_table_hw *offload;
++
++	if (!rcu_access_pointer(nf_flow_table_hw_hook))
++		request_module("nf-flow-table-hw");
++
++	rcu_read_lock();
++	offload = rcu_dereference(nf_flow_table_hw_hook);
++	if (!offload)
++		goto err_no_hw_offload;
++
++	if (!try_module_get(offload->owner))
++		goto err_no_hw_offload;
++
++	rcu_read_unlock();
++
++	return 0;
++
++err_no_hw_offload:
++	rcu_read_unlock();
++
++	return -EOPNOTSUPP;
++}
++
+ int nf_flow_table_init(struct nf_flowtable *flowtable)
+ {
+ 	int err;
+ 
++	if (flowtable->flags & NF_FLOWTABLE_F_HW) {
++		err = nf_flow_offload_hw_init(flowtable);
++		if (err)
++			return err;
++	}
++
+ 	INIT_DEFERRABLE_WORK(&flowtable->gc_work, nf_flow_offload_work_gc);
+ 
+ 	err = rhashtable_init(&flowtable->rhashtable,
+@@ -534,6 +579,8 @@ static void nf_flow_table_iterate_cleanu
+ {
+ 	nf_flow_table_iterate(flowtable, nf_flow_table_do_cleanup, dev);
+ 	flush_delayed_work(&flowtable->gc_work);
++	if (flowtable->flags & NF_FLOWTABLE_F_HW)
++		flush_work(&nf_flow_offload_hw_work);
+ }
+ 
+ void nf_flow_table_cleanup(struct net_device *dev)
+@@ -547,6 +594,26 @@ void nf_flow_table_cleanup(struct net_de
+ }
+ EXPORT_SYMBOL_GPL(nf_flow_table_cleanup);
+ 
++struct work_struct nf_flow_offload_hw_work;
++EXPORT_SYMBOL_GPL(nf_flow_offload_hw_work);
++
++/* Give the hardware workqueue the chance to remove entries from hardware.*/
++static void nf_flow_offload_hw_free(struct nf_flowtable *flowtable)
++{
++	const struct nf_flow_table_hw *offload;
++
++	flush_work(&nf_flow_offload_hw_work);
++
++	rcu_read_lock();
++	offload = rcu_dereference(nf_flow_table_hw_hook);
++	if (!offload) {
++		rcu_read_unlock();
++		return;
++	}
++	module_put(offload->owner);
++	rcu_read_unlock();
++}
++
+ void nf_flow_table_free(struct nf_flowtable *flow_table)
+ {
+ 	mutex_lock(&flowtable_lock);
+@@ -556,9 +623,58 @@ void nf_flow_table_free(struct nf_flowta
+ 	nf_flow_table_iterate(flow_table, nf_flow_table_do_cleanup, NULL);
+ 	nf_flow_table_iterate(flow_table, nf_flow_offload_gc_step, flow_table);
+ 	rhashtable_destroy(&flow_table->rhashtable);
++	if (flow_table->flags & NF_FLOWTABLE_F_HW)
++		nf_flow_offload_hw_free(flow_table);
+ }
+ EXPORT_SYMBOL_GPL(nf_flow_table_free);
+ 
++/* Must be called from user context. */
++void nf_flow_offload_hw_add(struct net *net, struct flow_offload *flow,
++			    struct nf_conn *ct)
++{
++	const struct nf_flow_table_hw *offload;
++
++	rcu_read_lock();
++	offload = rcu_dereference(nf_flow_table_hw_hook);
++	if (offload)
++		offload->add(net, flow, ct);
++	rcu_read_unlock();
++}
++EXPORT_SYMBOL_GPL(nf_flow_offload_hw_add);
++
++/* Must be called from user context. */
++void nf_flow_offload_hw_del(struct net *net, struct flow_offload *flow)
++{
++	const struct nf_flow_table_hw *offload;
++
++	rcu_read_lock();
++	offload = rcu_dereference(nf_flow_table_hw_hook);
++	if (offload)
++		offload->del(net, flow);
++	rcu_read_unlock();
++}
++EXPORT_SYMBOL_GPL(nf_flow_offload_hw_del);
++
++int nf_flow_table_hw_register(const struct nf_flow_table_hw *offload)
++{
++	if (rcu_access_pointer(nf_flow_table_hw_hook))
++		return -EBUSY;
++
++	rcu_assign_pointer(nf_flow_table_hw_hook, offload);
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(nf_flow_table_hw_register);
++
++void nf_flow_table_hw_unregister(const struct nf_flow_table_hw *offload)
++{
++	WARN_ON(rcu_access_pointer(nf_flow_table_hw_hook) != offload);
++	rcu_assign_pointer(nf_flow_table_hw_hook, NULL);
++
++	synchronize_rcu();
++}
++EXPORT_SYMBOL_GPL(nf_flow_table_hw_unregister);
++
+ static int nf_flow_table_netdev_event(struct notifier_block *this,
+ 				      unsigned long event, void *ptr)
+ {
+--- /dev/null
++++ b/net/netfilter/nf_flow_table_hw.c
+@@ -0,0 +1,169 @@
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/netfilter.h>
++#include <linux/rhashtable.h>
++#include <linux/netdevice.h>
++#include <net/netfilter/nf_flow_table.h>
++#include <net/netfilter/nf_conntrack.h>
++#include <net/netfilter/nf_conntrack_core.h>
++#include <net/netfilter/nf_conntrack_tuple.h>
++
++static DEFINE_SPINLOCK(flow_offload_hw_pending_list_lock);
++static LIST_HEAD(flow_offload_hw_pending_list);
++
++static DEFINE_MUTEX(nf_flow_offload_hw_mutex);
++
++struct flow_offload_hw {
++	struct list_head	list;
++	enum flow_offload_type	type;
++	struct flow_offload	*flow;
++	struct nf_conn		*ct;
++	possible_net_t		flow_hw_net;
++};
++
++static int do_flow_offload_hw(struct net *net, struct flow_offload *flow,
++			      int type)
++{
++	struct net_device *indev;
++	int ret, ifindex;
++
++	ifindex = flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].tuple.iifidx;
++	indev = dev_get_by_index(net, ifindex);
++	if (WARN_ON(!indev))
++		return 0;
++
++	mutex_lock(&nf_flow_offload_hw_mutex);
++	ret = indev->netdev_ops->ndo_flow_offload(type, flow);
++	mutex_unlock(&nf_flow_offload_hw_mutex);
++
++	dev_put(indev);
++
++	return ret;
++}
++
++static void flow_offload_hw_work_add(struct flow_offload_hw *offload)
++{
++	struct net *net;
++	int ret;
++
++	if (nf_ct_is_dying(offload->ct))
++		return;
++
++	net = read_pnet(&offload->flow_hw_net);
++	ret = do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_ADD);
++	if (ret >= 0)
++		offload->flow->flags |= FLOW_OFFLOAD_HW;
++}
++
++static void flow_offload_hw_work_del(struct flow_offload_hw *offload)
++{
++	struct net *net = read_pnet(&offload->flow_hw_net);
++
++	do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_DEL);
++}
++
++static void flow_offload_hw_work(struct work_struct *work)
++{
++	struct flow_offload_hw *offload, *next;
++	LIST_HEAD(hw_offload_pending);
++
++	spin_lock_bh(&flow_offload_hw_pending_list_lock);
++	list_replace_init(&flow_offload_hw_pending_list, &hw_offload_pending);
++	spin_unlock_bh(&flow_offload_hw_pending_list_lock);
++
++	list_for_each_entry_safe(offload, next, &hw_offload_pending, list) {
++		switch (offload->type) {
++		case FLOW_OFFLOAD_ADD:
++			flow_offload_hw_work_add(offload);
++			break;
++		case FLOW_OFFLOAD_DEL:
++			flow_offload_hw_work_del(offload);
++			break;
++		}
++		if (offload->ct)
++			nf_conntrack_put(&offload->ct->ct_general);
++		list_del(&offload->list);
++		kfree(offload);
++	}
++}
++
++static void flow_offload_queue_work(struct flow_offload_hw *offload)
++{
++	spin_lock_bh(&flow_offload_hw_pending_list_lock);
++	list_add_tail(&offload->list, &flow_offload_hw_pending_list);
++	spin_unlock_bh(&flow_offload_hw_pending_list_lock);
++
++	schedule_work(&nf_flow_offload_hw_work);
++}
++
++static void flow_offload_hw_add(struct net *net, struct flow_offload *flow,
++				struct nf_conn *ct)
++{
++	struct flow_offload_hw *offload;
++
++	offload = kmalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC);
++	if (!offload)
++		return;
++
++	nf_conntrack_get(&ct->ct_general);
++	offload->type = FLOW_OFFLOAD_ADD;
++	offload->ct = ct;
++	offload->flow = flow;
++	write_pnet(&offload->flow_hw_net, net);
++
++	flow_offload_queue_work(offload);
++}
++
++static void flow_offload_hw_del(struct net *net, struct flow_offload *flow)
++{
++	struct flow_offload_hw *offload;
++
++	offload = kmalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC);
++	if (!offload)
++		return;
++
++	offload->type = FLOW_OFFLOAD_DEL;
++	offload->ct = NULL;
++	offload->flow = flow;
++	write_pnet(&offload->flow_hw_net, net);
++
++	flow_offload_queue_work(offload);
++}
++
++static const struct nf_flow_table_hw flow_offload_hw = {
++	.add	= flow_offload_hw_add,
++	.del	= flow_offload_hw_del,
++	.owner	= THIS_MODULE,
++};
++
++static int __init nf_flow_table_hw_module_init(void)
++{
++	INIT_WORK(&nf_flow_offload_hw_work, flow_offload_hw_work);
++	nf_flow_table_hw_register(&flow_offload_hw);
++
++	return 0;
++}
++
++static void __exit nf_flow_table_hw_module_exit(void)
++{
++	struct flow_offload_hw *offload, *next;
++	LIST_HEAD(hw_offload_pending);
++
++	nf_flow_table_hw_unregister(&flow_offload_hw);
++	cancel_work_sync(&nf_flow_offload_hw_work);
++
++	list_for_each_entry_safe(offload, next, &hw_offload_pending, list) {
++		if (offload->ct)
++			nf_conntrack_put(&offload->ct->ct_general);
++		list_del(&offload->list);
++		kfree(offload);
++	}
++}
++
++module_init(nf_flow_table_hw_module_init);
++module_exit(nf_flow_table_hw_module_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Pablo Neira Ayuso <pablo@netfilter.org>");
++MODULE_ALIAS("nf-flow-table-hw");
+--- a/net/netfilter/nf_tables_api.c
++++ b/net/netfilter/nf_tables_api.c
+@@ -5743,6 +5743,13 @@ static int nf_tables_flowtable_parse_hoo
+ 	if (err < 0)
+ 		return err;
+ 
++	for (i = 0; i < n; i++) {
++		if (flowtable->data.flags & NF_FLOWTABLE_F_HW &&
++		    !dev_array[i]->netdev_ops->ndo_flow_offload) {
++			return -EOPNOTSUPP;
++		}
++	}
++
+ 	ops = kcalloc(n, sizeof(struct nf_hook_ops), GFP_KERNEL);
+ 	if (!ops)
+ 		return -ENOMEM;
+@@ -5873,10 +5880,19 @@ static int nf_tables_newflowtable(struct
+ 	}
+ 
+ 	flowtable->data.type = type;
++	write_pnet(&flowtable->data.ft_net, net);
++
+ 	err = type->init(&flowtable->data);
+ 	if (err < 0)
+ 		goto err3;
+ 
++	if (nla[NFTA_FLOWTABLE_FLAGS]) {
++		flowtable->data.flags =
++			ntohl(nla_get_be32(nla[NFTA_FLOWTABLE_FLAGS]));
++		if (flowtable->data.flags & ~NF_FLOWTABLE_F_HW)
++			goto err4;
++	}
++
+ 	err = nf_tables_flowtable_parse_hook(&ctx, nla[NFTA_FLOWTABLE_HOOK],
+ 					     flowtable);
+ 	if (err < 0)
+@@ -6002,7 +6018,8 @@ static int nf_tables_fill_flowtable_info
+ 	    nla_put_string(skb, NFTA_FLOWTABLE_NAME, flowtable->name) ||
+ 	    nla_put_be32(skb, NFTA_FLOWTABLE_USE, htonl(flowtable->use)) ||
+ 	    nla_put_be64(skb, NFTA_FLOWTABLE_HANDLE, cpu_to_be64(flowtable->handle),
+-			 NFTA_FLOWTABLE_PAD))
++			 NFTA_FLOWTABLE_PAD) ||
++	    nla_put_be32(skb, NFTA_FLOWTABLE_FLAGS, htonl(flowtable->data.flags)))
+ 		goto nla_put_failure;
+ 
+ 	nest = nla_nest_start_noflag(skb, NFTA_FLOWTABLE_HOOK);
+--- a/net/netfilter/nft_flow_offload.c
++++ b/net/netfilter/nft_flow_offload.c
+@@ -128,6 +128,9 @@ static void nft_flow_offload_eval(const
+ 	if (ret < 0)
+ 		goto err_flow_add;
+ 
++	if (flowtable->flags & NF_FLOWTABLE_F_HW)
++		nf_flow_offload_hw_add(nft_net(pkt), flow, ct);
++
+ 	dst_release(route.tuple[!dir].dst);
+ 	return;
+ 

5.4/target/linux/generic/pending-5.4/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch

@@ -0,0 +1,26 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Sun, 25 Mar 2018 21:10:55 +0200
+Subject: [PATCH] netfilter: nf_flow_table: rework hardware offload timeout
+ handling
+
+Some offload implementations send keepalive packets + explicit
+notifications of TCP FIN/RST packets. In this case it is more convenient
+to simply let the driver update flow->timeout handling and use the
+regular flow offload gc step.
+
+For drivers that manage their own lifetime, a separate flag can be set
+to avoid gc timeouts.
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/include/net/netfilter/nf_flow_table.h
++++ b/include/net/netfilter/nf_flow_table.h
+@@ -75,6 +75,7 @@ struct flow_offload_tuple_rhash {
+ #define FLOW_OFFLOAD_DYING	0x4
+ #define FLOW_OFFLOAD_TEARDOWN	0x8
+ #define FLOW_OFFLOAD_HW		0x10
++#define FLOW_OFFLOAD_KEEP	0x20
+ 
+ struct flow_offload {
+ 	struct flow_offload_tuple_rhash		tuplehash[FLOW_OFFLOAD_DIR_MAX];

5.4/target/linux/ipq40xx/base-files/bin/board_detect

@@ -0,0 +1,14 @@
+#!/bin/sh
+
+CFG=$1
+
+[ -n "$CFG" ] || CFG=/etc/board.json
+
+[ -d "/etc/board.d/" -a ! -s "$CFG" ] && {
+	for a in $(ls /etc/board.d/*); do
+		[ -x $a ] || continue;
+		$(. $a)
+	done
+}
+
+[ -s "$CFG" ] || return 1

5.4/target/linux/ipq40xx/base-files/bin/board_modem

@@ -0,0 +1,346 @@
+#!/bin/sh
+#
+# Copyright (c) 2015 The Linux Foundation. All rights reserved.
+# Copyright (c) 2011-2015 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+. /lib/functions/system.sh
+
+CFG=/etc/board.json
+
+# do not run on preinit/early init
+[ "$EARLY_INIT" ] && return
+
+strstr() {
+  [ "${1#*$2*}" = "$1" ] && return 1
+  return 0
+}
+
+print_array() {
+        json_add_array $1
+        case "$1" in
+                5G_NSA)
+                        for element in $2
+                        do
+                        json_add_string "" "$(echo $element)"
+                        done
+                ;;
+                5G_SA)
+                        for element in $2
+                        do
+                        json_add_string "" "$(echo $element)"
+                        done
+                ;;
+                4G)
+                        for element in $2
+                        do
+                        json_add_string "" "$(echo $element)"
+                        done
+                ;;
+                3G)
+                        for element in $2
+                        do
+                        json_add_string "" "wcdma_$(echo $element)"
+                        done
+                ;;
+                2G)
+                        for element in $2
+                        do
+                        json_add_string "" "$(echo $element)"
+                        done
+                ;;
+        esac
+        json_close_array
+}
+
+gather_band_capabilities() {
+	# Same logic as unhandler.c
+	###################### EG06 #########################
+	if strstr $revision_from_unhandler "EG06E"; then #EG06E
+		lte_bands="1 3 5 7 8 20 28 32 38 40 41" #B
+		trysg_bands="850 900 1800 2100" #MHz
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EG06A"; then #EG06A
+		lte_bands="2 4 5 7 12 13 25 26 29 30 66"
+		trysg_bands="850 1700 1900"
+		dug_bands=""
+	###################### EC25 #########################
+	elif strstr $revision_from_unhandler "EC25EF"; then #EC25E
+		lte_bands="1 3 5 7 8 20 38 40 41"
+		trysg_bands="850 900 2100"
+		dug_bands="900 1800" #MHz
+	elif strstr $revision_from_unhandler "EC25EC"; then #EC25EC
+		lte_bands="1 3 7 8 20 28"
+		trysg_bands="900 2100"
+		dug_bands="900 1800"
+	elif strstr $revision_from_unhandler "EC25AUX"; then #EC25AUX
+		lte_bands="1 2 3 4 5 7 8 28 40"
+		trysg_bands="850 900 1700 1900 2100"
+		dug_bands="850 900 1800 1900"
+	elif strstr $revision_from_unhandler "EC25AFA"; then #EC25A
+		lte_bands="2 4 12"
+		trysg_bands="850 1700 1900"
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC25V"; then #EC25V
+		lte_bands="4 13"
+		trysg_bands=""
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC25AFX"; then #EC25AFX
+		lte_bands="2 4 5 12 13 14 66 71"
+		trysg_bands="850 1700 1900"
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC25AFF"; then #EC25AF
+		lte_bands="2 4 5 12 13 14 66 71"
+		trysg_bands="850 1700 1900"
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC25AUTF"; then #EC25AUT
+		lte_bands="1 3 5 7 28"
+		trysg_bands="850 2100"
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC25AUTL"; then #EC25AUTL
+		lte_bands="3 7 28"
+		trysg_bands=""
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC25AUF"; then #EC25AU
+		lte_bands="1 2 3 4 5 7 8 28 40"
+		trysg_bands="850 900 1900 2100"
+		dug_bands="850 900 1800 1900"
+	elif strstr $revision_from_unhandler "EC25J"; then #EC25J
+		lte_bands="1 3 8 18 19 26 41"
+		trysg_bands="800 900 2100"
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC25EUX"; then #EC25EUX
+		lte_bands="1 3 7 8 20 28 38 40 41"
+		trysg_bands="900 2100"
+		dug_bands="900 1800"
+	elif strstr $revision_from_unhandler "EC25EUF"; then #EC25EU
+		lte_bands="1 3 7 8 20 28 38 40 41"
+		trysg_bands="900 2100"
+		dug_bands="900 1800"
+	elif strstr $revision_from_unhandler "EC25EUG"; then #EC25EU
+		lte_bands="1 3 7 8 20 28 38 40 41"
+		trysg_bands="900 2100"
+		dug_bands="900 1800"
+	elif strstr $revision_from_unhandler "EC25MX"; then #EC25MX
+		lte_bands="2 4 5 7 28 66"
+		trysg_bands="850 1700 1900"
+		dug_bands=""
+	###################### EC21 #########################
+	elif strstr $revision_from_unhandler "EC21EUX"; then #EC21EUX
+		lte_bands="1 3 7 8 20 28"
+		trysg_bands="900 2100"
+		dug_bands="900 1800"
+	elif strstr $revision_from_unhandler "EC21EU"; then #EC21EU
+		lte_bands="1 3 7 8 20 28"
+		trysg_bands="900 2100"
+		dug_bands="900 1800"
+	elif strstr $revision_from_unhandler "EC21EC"; then #EC21EC
+		lte_bands="1 3 7 8 20 28"
+		trysg_bands="900 2100"
+		dug_bands="900 1800"
+	elif strstr $revision_from_unhandler "EC21E"; then #EC21E
+		lte_bands="1 3 5 7 8 20"
+		trysg_bands="850 900 2100"
+		dug_bands="900 1800"
+	elif strstr $revision_from_unhandler "EC21V"; then #EC21V
+		lte_bands="4 13"
+		trysg_bands=""
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC21KL"; then #EC21KL
+		lte_bands="1 3 5 7 8"
+		trysg_bands=""
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC21J"; then #EC21J
+		lte_bands="1 3 8 18 19 26"
+		trysg_bands=""
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC21AUX"; then #EC21AUX
+		lte_bands="1 2 3 4 5 7 8 28 40"
+		trysg_bands="850 900 1700 1900 2100"
+		dug_bands="850 900 1800 1900"
+	elif strstr $revision_from_unhandler "EC21AUT"; then #EC21AUT
+		lte_bands="1 3 5 7 28"
+		trysg_bands="850 2100"
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EC21AU"; then #EC21AU
+		lte_bands="1 2 3 4 5 7 8 28 40"
+		trysg_bands="850 900 1900 2100"
+		dug_bands="850 900 1800 1900"
+	elif strstr $revision_from_unhandler "EC21A"; then #EC21A
+		lte_bands="2 4 12"
+		trysg_bands="850 1700 1900"
+		dug_bands=""
+	###################### EG25 #########################
+	elif strstr $revision_from_unhandler "EG25G"; then #EG25G
+		lte_bands="1 2 3 4 5 7 8 12 13 18 19 20 25 26 28 38 39 40 41"
+		trysg_bands="800 850 900 1700 1900 2100"
+		dug_bands="850 900 1800 1900"
+	elif strstr $revision_from_unhandler "EG12EA"; then #EG12EA
+		lte_bands="1 3 5 7 8 20 28 38 40 41"
+		trysg_bands="850 900 1800 2100"
+		dug_bands=""
+	elif strstr $revision_from_unhandler "EG12NA"; then #EG12NA
+		lte_bands="2 4 5 7 12 13 14 17 25 26 29 30 41 66 71"
+		trysg_bands="850 1700 1900"
+		dug_bands=""
+	elif strstr $revision_from_unhandler "BG96"; then #BG96M
+		lte_bands="1 2 3 4 5 8 12 13 18 19 20 26 28 39"
+		trysg_bands=""
+		dug_bands="850 900 1800 1900"
+	##################### SLM750 ########################
+	elif strstr $revision_from_unhandler "750VE"; then #SLM750VE
+		lte_bands="1 3 5 7 8 20 40"
+		trysg_bands="850 900 2100"
+		dug_bands="900 1800"
+	elif strstr $revision_from_unhandler "750VAU"; then #SLM750VAU
+		lte_bands="1 3 5 7 8 28 40"
+		trysg_bands="850 900 2100"
+		dug_bands="850 900 1800"
+	elif strstr $revision_from_unhandler "750VA"; then #SLM750VA
+		lte_bands="2 4 5 12 13 17 18 25 26 41"
+		trysg_bands="850 1700 1900"
+		dug_bands="850 1900"
+	elif strstr $revision_from_unhandler "750VJ"; then #SLM750VJ
+		lte_bands="1 3 8 18 19 26 41"
+		trysg_bands="800 900 2100"
+		dug_bands=""
+	elif strstr $revision_from_unhandler "750VSA"; then #SLM750VSA
+		lte_bands="2 4 5 7 8 28 40"
+		trysg_bands="850 900 1900"
+		dug_bands="850 900 1900"
+	###################### UC20 #########################
+	elif strstr $revision_from_unhandler "UC20E"; then #UC20E
+		lte_bands=""
+		trysg_bands="900 2100"
+		dug_bands="850 900 1800 1900"
+	elif strstr $revision_from_unhandler "UC20G"; then #UC20G
+		lte_bands=""
+		trysg_bands="800 850 900 1900 2100"
+		dug_bands="850 900 1800 1900"
+	elif strstr $revision_from_unhandler "UC20A"; then #UC20A
+		lte_bands=""
+		trysg_bands="850 1900"
+		dug_bands=""
+	###################### EC200A #########################
+	elif strstr $revision_from_unhandler "EC200AAU"; then #EC200AAU
+		lte_bands="1 2 3 4 5 7 8 28 40 66"
+		trysg_bands="850 900 1700 1900 2100"
+		dug_bands="850 900 1800 1900"
+	elif strstr $revision_from_unhandler "EC200AEU"; then #EC200AEU
+		lte_bands="1 3 5 7 8 20 28 38 40 41"
+		trysg_bands="850 900 2100"
+		dug_bands="900 1800"
+	####################### RG501QEU #######################
+	elif strstr $revision_from_unhandler "RG501QEU"; then #5G module
+		nsa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 77 78"
+		sa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 77 78"
+		lte_bands="1 3 5 7 8 20 28 32 38 40 41 42 43"
+		trysg_bands="2100 850 900"
+		dug_bands=""
+	elif strstr $revision_from_unhandler "RG520NEU"; then #5G module
+		nsa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 75 76 77 78"
+		sa_nr5g_bands="1 3 5 7 8 20 28 38 40 41 75 76 77 78"
+		lte_bands="1 3 5 7 8 20 28 32 38 40 41 42 43"
+		trysg_bands="2100 850 900"
+		dug_bands=""
+	else
+		lte_bands="1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28"
+		trysg_bands="700 800 850 900 1500 1700 2600"
+		dug_bands="1700 1800 1900 2100"
+	fi
+}
+
+validate_service_modes() {
+	json_get_keys service_modes service_modes
+
+	found_modes="$(printf "$service_modes" | awk '!seen[$0]++'| wc -l)"
+	[ "$found_modes" -eq 0 ] && {
+		return 0
+	}
+
+	return 1
+}
+
+#~ Get model name for RUTX products
+setup_modem() {
+	local key="$1"
+	local object_num="$2"
+	local id gps boudrate type desc control product vendor stop_bits
+
+	json_select "$object_num"
+	json_get_vars id product
+
+	if [ "$id" = "$id_from_unhandler" ]; then
+
+		[ -z "$product" ] || \
+		{
+			[ -f "/sys/bus/usb/devices/$id/idVendor" ] && [ -f "/sys/bus/usb/devices/$id/idProduct" ] || {
+				json_select ..
+				return 1
+			}
+
+			validate_service_modes && {
+				gather_band_capabilities
+				json_select_object service_modes
+				[ -z "$nsa_nr5g_bands" ] || print_array "5G_NSA" "$nsa_nr5g_bands"
+				[ -z "$sa_nr5g_bands" ] || print_array "5G_SA" "$sa_nr5g_bands"
+				[ -z "$lte_bands" ] || print_array "4G" "$lte_bands"
+				[ -z "$trysg_bands" ] || print_array "3G" "$trysg_bands"
+				[ -z "$dug_bands" ] || print_array "2G" "$dug_bands"
+				json_select ..
+			}
+			json_select ..
+			return 1
+		}
+
+		vendor="$(cat "/sys/bus/usb/devices/$id/idVendor")"
+		product="$(cat "/sys/bus/usb/devices/$id/idProduct")"
+
+		[ -f "/lib/network/wwan/$vendor:$product" ] && {
+			devicename="$id"
+
+			gather_band_capabilities
+
+			json_set_namespace defaults old_cb
+			json_load "$(cat /lib/network/wwan/$vendor:$product)"
+			json_get_vars gps boudrate type desc control stop_bits
+			json_set_namespace "$old_cb"
+
+			[ "${devicename%%:*}" = "$devicename" ] && {
+				json_add_string vendor "$vendor"
+				json_add_string product "$product"
+				json_add_string gps "$gps"
+				json_add_string stop_bits "$stop_bits"
+				json_add_string boudrate "$boudrate"
+				json_add_string type "$type"
+				json_add_string desc "$desc"
+				json_add_string control "$control"
+				json_add_string	revision "${revision_from_unhandler::-2}"
+				json_add_object service_modes
+				[ -z "$nsa_nr5g_bands" ] || print_array "5G_NSA" "$nsa_nr5g_bands"
+				[ -z "$sa_nr5g_bands" ] || print_array "5G_SA" "$sa_nr5g_bands"
+				[ -z "$lte_bands" ] || print_array "4G" "$lte_bands"
+				[ -z "$trysg_bands" ] || print_array "3G" "$trysg_bands"
+				[ -z "$dug_bands" ] || print_array "2G" "$dug_bands"
+				json_close_object
+			}
+		}
+	fi
+	json_select ..
+}
+
+[ -s "${CFG}" ] || exit 1
+
+id_from_unhandler="$1"
+revision_from_unhandler="$2"
+
+lock /var/run/board_modem.lock
+
+board_config_update
+json_for_each_item setup_modem modems
+board_config_flush
+
+lock -u /var/run/board_modem.lock
+
+exit 0

5.4/target/linux/ipq40xx/base-files/bin/board_track

@@ -0,0 +1,47 @@
+#!/bin/sh
+
+. /lib/functions/uci-defaults.sh
+
+CFG=/etc/board.json
+SLP=30
+
+check_modem() {
+	json_select "$2"
+	json_get_vars id
+
+	[ -z "$id" ] && {
+		json_select ..
+		return 0
+	}
+
+	#logger -t "board-track" "ls -d /sys/bus/usb/devices/$id/${id}*/tty?*"
+	ttys=$(ls -d /sys/bus/usb/devices/$id/${id}*/tty?*)
+
+	[ -n "$ttys" ] || { #FAILED TO FIND MODEM
+		logger -t "board-track" "modem $id not detected"
+		for m in /sys/class/gpio/modem*_power; do
+			label="$(basename $m | awk -F_ '{print $1}')"
+			mctl -s -m ${label}
+			sleep 1
+			mctl -p -m ${label}
+		done
+		sleep 5
+		ip link set up dev wwan0 2>&1 >/dev/null
+		ip link set up dev wwan1 2>&1 >/dev/null
+		json_select ..
+		return 1
+	}
+
+	[ -n "$(ip link show dev wwan0 | grep DOWN)" ] && ip link set up dev wwan0 2>&1 >/dev/null
+	[ -n "$(ip link show dev wwan1 | grep DOWN)" ] && ip link set up dev wwan1 2>&1 >/dev/null
+
+	#MODEM UP
+	json_select ..
+}
+
+board_config_update
+while true; do
+	json_for_each_item check_modem modems
+	sleep $SLP
+	[ $SLP -lt 300 ] && SLP=$((SLP+30))
+done

5.4/target/linux/ipq40xx/base-files/bin/config_generate

@@ -0,0 +1,824 @@
+#!/bin/sh
+
+CFG=/etc/board.json
+
+. /usr/share/libubox/jshn.sh
+
+[ -s $CFG ] || /bin/board_detect || exit 1
+
+[ -s /etc/config/network ] && \
+[ -s /etc/config/system ] && \
+[ -s /etc/config/hwinfo ] && \
+[ -s /etc/config/blesem ] && \
+[ -s /etc/config/poe ] && \
+exit 0
+
+generate_bridge() {
+	local name=$1
+	local macaddr=$2
+	uci -q batch <<-EOF
+		set network.$name=device
+		set network.$name.name=$name
+		set network.$name.type=bridge
+	EOF
+	if [ -n "$macaddr" ]; then
+		uci -q batch <<-EOF
+			set network.$name.macaddr=$macaddr
+		EOF
+	fi
+}
+
+generate_static_network() {
+	uci -q batch <<-EOF
+		delete network.loopback
+		set network.loopback='interface'
+		set network.loopback.device='lo'
+		set network.loopback.proto='static'
+		set network.loopback.ipaddr='127.0.0.1'
+		set network.loopback.netmask='255.0.0.0'
+	EOF
+
+	if json_is_a dsl object; then
+		json_select dsl
+			if json_is_a atmbridge object; then
+				json_select atmbridge
+					local vpi vci encaps payload nameprefix
+					json_get_vars vpi vci encaps payload nameprefix
+					uci -q batch <<-EOF
+						delete network.atm
+						set network.atm='atm-bridge'
+						set network.atm.vpi='$vpi'
+						set network.atm.vci='$vci'
+						set network.atm.encaps='$encaps'
+						set network.atm.payload='$payload'
+						set network.atm.nameprefix='$nameprefix'
+					EOF
+				json_select ..
+			fi
+
+			if json_is_a modem object; then
+				json_select modem
+					local type annex firmware tone xfer_mode
+					json_get_vars type annex firmware tone xfer_mode
+					uci -q batch <<-EOF
+						delete network.dsl
+						set network.dsl='dsl'
+						set network.dsl.annex='$annex'
+						set network.dsl.firmware='$firmware'
+						set network.dsl.tone='$tone'
+						set network.dsl.xfer_mode='$xfer_mode'
+					EOF
+				json_select ..
+			fi
+		json_select ..
+	fi
+}
+
+ip6assign=
+disable_vlan=
+apply_network_options() {
+	json_select network_options && {
+		json_get_vars ip6assign ula disable_vlan
+		json_select ..
+	}
+	[ -z "$ip6assign" ] && ip6assign=1
+	[ -z "$ula" ] && ula=1
+
+	[ -e /proc/sys/net/ipv6 ] && [ "$ula" = 1 ] && {
+		uci -q batch <<-EOF
+			delete network.globals
+			set network.globals='globals'
+			set network.globals.ula_prefix='auto'
+		EOF
+	}
+}
+
+metric=1
+addr_offset=2
+generate_network() {
+	local ports device macaddr proto type ipaddr netmask vlan no_metric
+	local bridge=$2
+
+	uci -q batch <<-EOF
+		delete "network.$1"
+		set network.$1='interface'
+	EOF
+
+	json_select network
+		json_select "$1"
+			json_get_vars device macaddr proto ipaddr netmask vlan ipv6 guest type
+			json_get_values ports ports
+		json_select ..
+	json_select ..
+
+
+	json_select network_options && {
+		json_get_vars no_metric
+		json_select ..
+	}
+
+	# Force bridge for "lan" as it may have other devices (e.g. wireless)
+	# bridged
+	[ "$1" = "lan" ] && [ -z "$ports" ] && {
+		ports="$device"
+	}
+
+	[ -n "$ports" ] && [ -z "$bridge" ] && {
+
+		[ -n "$macaddr" ] && {
+			for port in $ports; do
+				uci -q batch <<-EOF
+					add network device
+					set network.@device[-1].name='$port'
+					set network.@device[-1].macaddr='$macaddr'
+				EOF
+			done
+		}
+
+		uci -q batch <<-EOF
+			add network device
+			rename network.@device[-1]='br_$1'
+			set network.@device[-1].name='br-$1'
+			set network.@device[-1].type='bridge'
+		EOF
+
+		[ -n "$device" ] && uci add_list network.@device[-1].ports="$device" || {
+			for port in $ports; do
+				uci add_list network.@device[-1].ports="$port"
+			done
+		}
+
+		device=br-$1
+		type=
+		macaddr=""
+
+		json_select hwinfo
+			json_get_vars dsa
+		json_select ..
+
+	}
+
+	if [ -n "$macaddr" ]; then
+		uci -q batch <<-EOF
+			add network device
+			set network.@device[-1].name='$device'
+			set network.@device[-1].macaddr='$macaddr'
+		EOF
+	fi
+
+	uci -q batch <<-EOF
+		delete network.$1
+		set network.$1='interface'
+		set network.$1.type='$type'
+		set network.$1.device='$device'
+		set network.$1.proto='none'
+	EOF
+	[ "$1" != "lan" ] && metric=$((metric+1))
+	[ "$guest" = "1" ] && uci set network.$1.guest='1'
+
+	case "$proto" in
+		static)
+			local ipad metr
+			case "$1" in
+				lan)
+					ipad="192.168.100.1"
+					metr=1
+					;;
+				*)
+					ipad=${ipaddr:-"192.168.$((addr_offset++)).1"}
+					metr="$metric"
+					;;
+			esac
+
+			netm=${netmask:-"255.255.255.0"}
+
+			uci -q batch <<-EOF
+				set network.$1.proto='static'
+				set network.$1.ipaddr='$ipad'
+				set network.$1.netmask='$netm'
+				set network.$1.metric='$metr'
+			EOF
+
+			[ "$ipv6" = "1" ] && uci set network.$1.ipv6="$ipv6"
+			[ -e /proc/sys/net/ipv6 ] && [ "$ip6assign" = 1 ] && \
+				uci set network.$1.ip6assign='60'
+		;;
+
+		dhcp)
+			# fixup IPv6 slave interface if parent is a bridge
+			[ "$type" = "bridge" ] && device="br-$1"
+
+			uci -q batch <<-EOF
+				set network.$1.proto='dhcp'
+				set network.$1.metric='$metric'
+			EOF
+			[ -e /proc/sys/net/ipv6 ] && {
+				metric=$((metric+1))
+				uci -q batch <<-EOF
+					delete network.${1}6
+					set network.${1}6='interface'
+					set network.${1}6.device='$device'
+					set network.${1}6.proto='dhcpv6'
+					set network.${1}6.metric='$metric'
+				EOF
+				[ "$ip6assign" != 1 ] && uci set network.${1}6.delegate='0'
+			}
+		;;
+
+		pppoe)
+			uci -q batch <<-EOF
+				set network.$1.proto='pppoe'
+				set network.$1.username='username'
+				set network.$1.password='password'
+			EOF
+			[ -e /proc/sys/net/ipv6 ] && {
+				uci -q batch <<-EOF
+					set network.$1.ipv6='1'
+					delete network.${1}6
+					set network.${1}6='interface'
+					set network.${1}6.device='@${1}'
+					set network.${1}6.proto='dhcpv6'
+				EOF
+			}
+		;;
+	esac
+
+	[ -n "$no_metric" ] && {
+		uci -q delete network.${1}.metric
+		[ -e /proc/sys/net/ipv6 ] && uci -q delete network.${1}6.metric
+	}
+}
+
+add_modem_section() {
+	local id="$1"
+	local num="$2"
+	local simcount="$3"
+	local builtin="$4"
+	local custom_proto custom_ifname
+
+	json_select ..
+	json_get_vars custom_proto custom_ifname
+	json_select modems
+	for count in $(seq "$simcount"); do
+		interface="mob${num}s${count}a1"
+		local proto="wwan"
+
+		# if needed, use custom proto for rmnet/other devices
+		[ -n "${custom_proto}" ] && proto="${custom_proto}"
+
+		metric=$((metric+1))
+
+		uci_remove network "${interface}"
+		uci_add network interface "${interface}"
+		uci_set network "${interface}" proto "$proto"
+		uci_set network "${interface}" modem "$id"
+		uci_set network "${interface}" metric "$metric"
+		uci_set network "${interface}" sim "${count}"
+		uci_set network "${interface}" dhcpv6 "0"
+		uci_set network "${interface}" pdptype "ip"
+		uci_set network "${interface}" method "nat"
+		uci_set network "${interface}" auth "none"
+		uci_set network "${interface}" auto_apn "1"
+
+		# if needed, use custom ifname for rmnet/other devices
+		[ -n "${custom_ifname}" ] && \
+			uci_set network "${interface}" device "${custom_ifname}"
+
+		uci_commit network
+
+		update_firewall_zone "wan" "$interface"
+		create_multiwan_iface "$interface" "$metric"
+		add_simcard_config "$id" "${count}" "${count}" "$builtin"
+		add_sim_switch_config "$id" "${count}"
+		add_quota_limit_config "$interface"
+	done
+	add_sms_storage_config "$id"
+}
+
+generate_dynamic_lte() {
+[ -f /lib/functions/modem.sh ] || return
+. /lib/functions/modem.sh
+
+	local interface num id simcount builtin
+
+	#creating simcard sections from board.json file
+	if json_is_a modems array; then
+		json_get_keys modems modems
+		json_select modems
+
+		num=1
+
+		for modem in $modems; do
+			json_select "$modem"
+			json_get_vars id simcount builtin
+			json_select ..
+			add_modem_section "$id" "$num" "$simcount" "$builtin"
+			num=$(( num + 1 ))
+		done
+
+		json_select ..
+	else
+		## because of RUTX8 have no default modem
+		# after this script runs out simcard config
+		# must not be empty due to external modems could appear to config
+		echo " " >> /etc/config/simcard
+	fi
+
+	#creating simcard sections from conneted via USB
+	for a in `ls /sys/bus/usb/devices`; do
+		local vendor product
+		[ -f "/sys/bus/usb/devices/$a/idVendor" ] && [ -f "/sys/bus/usb/devices/$a/idProduct" ] || continue
+		vendor=$(cat "/sys/bus/usb/devices/$a/idVendor")
+		product=$(cat "/sys/bus/usb/devices/$a/idProduct")
+		[ -f "/lib/network/wwan/${vendor}:${product}" ] && {
+			add_simcard_config "$a" "1" "0" ""
+			add_sms_storage_config "$a"
+		}
+	done
+}
+
+generate_switch_vlans_ports() {
+	local switch="$1"
+	local port ports role roles num attr val
+
+	#
+	# autogenerate vlans
+	#
+
+	if json_is_a roles array; then
+		json_get_keys roles roles
+		json_select roles
+
+		for role in $roles; do
+			json_select "$role"
+				json_get_vars ports
+			json_select ..
+
+			uci -q batch <<-EOF
+				add network switch_vlan
+				set network.@switch_vlan[-1].device='$switch'
+				set network.@switch_vlan[-1].vlan='$role'
+				set network.@switch_vlan[-1].vid='$role'
+				set network.@switch_vlan[-1].ports='$ports'
+			EOF
+		done
+
+		json_select ..
+	fi
+
+
+	#
+	# write port specific settings
+	#
+
+	if json_is_a ports array; then
+		json_get_keys ports ports
+		json_select ports
+
+		for port in $ports; do
+			json_select "$port"
+				json_get_vars num
+
+				if json_is_a attr object; then
+					json_get_keys attr attr
+					json_select attr
+						uci -q batch <<-EOF
+							add network switch_port
+							set network.@switch_port[-1].device='$switch'
+							set network.@switch_port[-1].port=$num
+						EOF
+
+						for attr in $attr; do
+							json_get_var val "$attr"
+							uci -q set network.@switch_port[-1].$attr="$val"
+						done
+					json_select ..
+				fi
+			json_select ..
+		done
+
+		json_select ..
+	fi
+}
+
+generate_switch() {
+	local key="$1"
+	local vlans
+
+	json_select switch
+	json_select "$key"
+	json_get_vars enable reset blinkrate cpu_port \
+		ar8xxx_mib_type ar8xxx_mib_poll_interval
+
+	[ "$disable_vlan" = 1 ] && enable=0
+	uci -q batch <<-EOF
+		add network switch
+		set network.@switch[-1].name='$key'
+		set network.@switch[-1].reset='$reset'
+		set network.@switch[-1].enable_vlan='$enable'
+		set network.@switch[-1].blinkrate='$blinkrate'
+		set network.@switch[-1].ar8xxx_mib_type='$ar8xxx_mib_type'
+		set network.@switch[-1].ar8xxx_mib_poll_interval='$ar8xxx_mib_poll_interval'
+	EOF
+
+	generate_switch_vlans_ports "$1"
+
+	json_select ..
+	json_select ..
+}
+
+
+generate_static_system() {
+	param=$(/sbin/mnf_info "--name")
+	hostname=${param:0:6}
+	uci -q batch <<-EOF
+		delete system.@system[0]
+		set system.system='system'
+		set system.@system[-1].hostname='$hostname'
+		set system.@system[-1].timezone='UTC'
+		set system.@system[-1].ttylogin='0'
+		set system.@system[-1].log_buffer_size='128'
+		set system.@system[-1].log_size='200'
+		set system.@system[-1].urandom_seed='0'
+
+		delete system.ntp
+		set system.ntp='timeserver'
+		set system.ntp.zoneName='UTC'
+		set system.ntp.enabled='0'
+		set system.ntp.enable_server='0'
+		add_list system.ntp.server='0.pool.ntp.org'
+		add_list system.ntp.server='1.pool.ntp.org'
+		add_list system.ntp.server='2.pool.ntp.org'
+		add_list system.ntp.server='3.pool.ntp.org'
+
+		delete system.debug
+		set system.debug='debug'
+		set system.debug.sms_utils_debug_level='4'
+	EOF
+
+	if json_is_a system object; then
+		json_select system
+			local hostname
+			if json_get_var hostname hostname; then
+				uci -q set "system.@system[-1].hostname=$hostname"
+			fi
+
+			if json_is_a ntpserver array; then
+				local keys key
+				json_get_keys keys ntpserver
+				json_select ntpserver
+					uci -q delete "system.ntp.server"
+
+					for key in $keys; do
+						local server
+						if json_get_var server "$key"; then
+							uci -q add_list "system.ntp.server=$server"
+						fi
+					done
+				json_select ..
+			fi
+		json_select ..
+	fi
+}
+
+generate_rssimon() {
+	local key="$1"
+	local cfg="rssid_$key"
+	local refresh threshold
+
+	json_select rssimon
+	json_select "$key"
+	json_get_vars refresh threshold
+	json_select ..
+	json_select ..
+
+	uci -q batch <<-EOF
+		delete system.$cfg
+		set system.$cfg='rssid'
+		set system.$cfg.dev='$key'
+		set system.$cfg.refresh='$refresh'
+		set system.$cfg.threshold='$threshold'
+	EOF
+}
+
+generate_led() {
+	local key="$1"
+	local cfg="led_$key"
+
+	json_select led
+	json_select "$key"
+	json_get_vars name sysfs type trigger default
+
+	uci -q batch <<-EOF
+		delete system.$cfg
+		set system.$cfg='led'
+		set system.$cfg.name='$name'
+		set system.$cfg.sysfs='$sysfs'
+		set system.$cfg.trigger='$trigger'
+		set system.$cfg.default='$default'
+	EOF
+
+	case "$type" in
+		gpio)
+			local gpio inverted
+			json_get_vars gpio inverted
+			uci -q batch <<-EOF
+				set system.$cfg.trigger='gpio'
+				set system.$cfg.gpio='$gpio'
+				set system.$cfg.inverted='$inverted'
+			EOF
+		;;
+
+		netdev)
+			local device mode
+			json_get_vars device mode
+			uci -q batch <<-EOF
+				set system.$cfg.trigger='netdev'
+				set system.$cfg.mode='$mode'
+				set system.$cfg.dev='$device'
+			EOF
+		;;
+
+		usb)
+			local device
+			json_get_vars device
+			uci -q batch <<-EOF
+				set system.$cfg.trigger='usbdev'
+				set system.$cfg.interval='50'
+				set system.$cfg.dev='$device'
+			EOF
+		;;
+
+		usbport)
+			local ports port
+			json_get_values ports ports
+			uci set system.$cfg.trigger='usbport'
+			for port in $ports; do
+				uci add_list system.$cfg.port=$port
+			done
+		;;
+
+		rssi)
+			local iface minq maxq offset factor
+			json_get_vars iface minq maxq offset factor
+			uci -q batch <<-EOF
+				set system.$cfg.trigger='rssi'
+				set system.$cfg.iface='rssid_$iface'
+				set system.$cfg.minq='$minq'
+				set system.$cfg.maxq='$maxq'
+				set system.$cfg.offset='$offset'
+				set system.$cfg.factor='$factor'
+			EOF
+		;;
+
+		switch)
+			local port_mask speed_mask mode
+			json_get_vars port_mask speed_mask mode
+			uci -q batch <<-EOF
+				set system.$cfg.port_mask='$port_mask'
+				set system.$cfg.speed_mask='$speed_mask'
+				set system.$cfg.mode='$mode'
+			EOF
+		;;
+
+		portstate)
+			local port_state
+			json_get_vars port_state
+			uci -q batch <<-EOF
+				set system.$cfg.port_state='$port_state'
+			EOF
+		;;
+
+		timer|oneshot)
+			local delayon delayoff
+			json_get_vars delayon delayoff
+			uci -q batch <<-EOF
+				set system.$cfg.trigger='$type'
+				set system.$cfg.delayon='$delayon'
+				set system.$cfg.delayoff='$delayoff'
+			EOF
+		;;
+	esac
+
+	json_select ..
+	json_select ..
+}
+
+generate_gpioswitch() {
+	local cfg="$1"
+
+	json_select gpioswitch
+		json_select "$cfg"
+			local name pin default
+			json_get_vars name pin default
+			uci -q batch <<-EOF
+				delete system.$cfg
+				set system.$cfg='gpio_switch'
+				set system.$cfg.name='$name'
+				set system.$cfg.gpio_pin='$pin'
+				set system.$cfg.value='$default'
+			EOF
+		json_select ..
+	json_select ..
+}
+
+generate_hwinfo() {
+	local parameter="$1"
+	local temp
+
+	json_select hwinfo
+		json_get_var temp "$parameter"
+	json_select ..
+
+	uci -q batch <<-EOF
+		set hwinfo.hwinfo='hwinfo'
+		set hwinfo.hwinfo.$parameter='$temp'
+	EOF
+}
+
+set_poe_ports() {
+	json_select "$1"
+		json_get_vars name class budget
+		uci -q batch <<-EOF
+			set poe.port$1='port$1'
+			set poe.port$1.name='$name'
+			set poe.port$1.poe_enable='1'
+			set poe.port$1.class='$class'
+			set poe.port$1.budget='$budget'
+		EOF
+	json_select ..
+}
+
+set_poe_chips(){
+	local keys key
+	uci -q set poe.chip$1=chip$1
+	json_get_keys keys "$1"
+	json_select "$1"
+		for key in $keys; do
+			json_get_var var "$key"
+			uci -q set poe.chip$1.$key="$var"
+		done
+	json_select ..
+}
+
+generate_poe_config(){
+	if json_is_a poe object; then
+		json_select poe
+			json_get_vars chip_count budget poe_ports
+			uci -q batch <<-EOF
+				set poe.poe='poe'
+				set poe.poe.chip_count='$chip_count'
+				set poe.poe.budget='$budget'
+				set poe.poe.poe_ports='$poe_ports'
+			EOF
+			if json_is_a ports array; then
+				#json_for_each_item "set_poe_ports" ports
+				json_select ports
+					idx=1
+					while json_is_a ${idx} object
+					do
+						"set_poe_ports" $idx
+						idx=$(( idx + 1 ))
+					done
+				json_select ..
+			fi
+			if json_is_a poe_chips array; then
+				json_select poe_chips
+					idx=1
+					while json_is_a ${idx} object
+					do
+						"set_poe_chips" $idx
+						idx=$(( idx + 1 ))
+					done
+				json_select ..
+			fi
+		json_select ..
+	fi
+}
+
+generate_bluetooth() {
+	uci -q batch <<-EOF
+		set blesem.general='section'
+		set blesem.general.enabled='0'
+		set blesem.settings='app'
+		set blesem.settings.refresh_time='30000'
+	EOF
+}
+
+add_firewall_zone() {
+	local device
+
+	json_select network
+		json_select "$1"
+			json_get_vars device
+		json_select ..
+	json_select ..
+
+	fw3 -q network "$1" || fw3 -q device "$device" && return
+
+	uci -q batch <<-EOF
+		add firewall zone
+		set firewall.@zone[-1].name='$1'
+		set firewall.@zone[-1].network='$1'
+		set firewall.@zone[-1].input='REJECT'
+		set firewall.@zone[-1].output='ACCEPT'
+		set firewall.@zone[-1].forward='REJECT'
+
+		add firewall forwarding
+		set firewall.@forwarding[-1].src='$1'
+		set firewall.@forwarding[-1].dest='wan'
+
+		add firewall rule
+		set firewall.@rule[-1].name='Allow-DNS-$1'
+		set firewall.@rule[-1].src='$1'
+		set firewall.@rule[-1].dest_port='53'
+		set firewall.@rule[-1].proto='tcp udp'
+		set firewall.@rule[-1].target='ACCEPT'
+
+		add firewall rule
+		set firewall.@rule[-1].name='Allow-DHCP-$1'
+		set firewall.@rule[-1].src='$1'
+		set firewall.@rule[-1].dest_port='67'
+		set firewall.@rule[-1].proto='udp'
+		set firewall.@rule[-1].family='ipv4'
+		set firewall.@rule[-1].target='ACCEPT'
+	EOF
+}
+
+add_dhcp() {
+
+	json_select network
+		json_select "$1"
+			json_get_vars _dhcp
+		json_select ..
+	json_select ..
+
+	[ "$_dhcp" = "true" ] || return
+	uci -q batch <<-EOF
+		set dhcp.$1='dhcp'
+		set dhcp.$1.interface='$1'
+		set dhcp.$1.start='100'
+		set dhcp.$1.limit='150'
+		set dhcp.$1.leasetime='1h'
+	EOF
+}
+
+json_init
+json_load "$(cat ${CFG})"
+
+umask 077
+
+if [ ! -s /etc/config/network ]; then
+	touch /etc/config/network
+	generate_static_network
+	apply_network_options
+
+	json_get_keys keys network
+	for key in $keys; do
+		generate_network $key
+		add_dhcp "$key"
+	done
+
+	json_get_keys keys switch
+	for key in $keys; do generate_switch $key; done
+
+	generate_dynamic_lte
+fi
+
+if [ ! -s /etc/config/system ]; then
+	touch /etc/config/system
+	generate_static_system
+
+	json_get_keys keys rssimon
+	for key in $keys; do generate_rssimon $key; done
+
+	json_get_keys keys gpioswitch
+	for key in $keys; do generate_gpioswitch $key; done
+
+	json_get_keys keys led
+	for key in $keys; do generate_led $key; done
+fi
+
+if [ ! -s /etc/config/hwinfo ]; then
+	touch /etc/config/hwinfo
+	json_get_keys keys hwinfo
+	for key in $keys; do generate_hwinfo $key; done
+fi
+
+if [ ! -s /etc/config/poe ]; then
+	touch /etc/config/poe
+	generate_poe_config
+fi
+
+if [ ! -s /etc/config/blesem ]; then
+	bluetooth=""
+	json_select hwinfo
+	json_get_vars bluetooth
+	[ "$bluetooth" -eq 1 ] && {
+		touch /etc/config/blesem
+		touch /etc/config/ble_devices
+		generate_bluetooth
+	}
+fi
+
+uci commit

5.4/target/linux/ipq40xx/base-files/bin/ipcalc.sh

@@ -0,0 +1,71 @@
+#!/bin/sh
+
+awk -f - $* <<EOF
+function bitcount(c) {
+	c=and(rshift(c, 1),0x55555555)+and(c,0x55555555)
+	c=and(rshift(c, 2),0x33333333)+and(c,0x33333333)
+	c=and(rshift(c, 4),0x0f0f0f0f)+and(c,0x0f0f0f0f)
+	c=and(rshift(c, 8),0x00ff00ff)+and(c,0x00ff00ff)
+	c=and(rshift(c,16),0x0000ffff)+and(c,0x0000ffff)
+	return c
+}
+
+function ip2int(ip) {
+	for (ret=0,n=split(ip,a,"\."),x=1;x<=n;x++) ret=or(lshift(ret,8),a[x])
+	return ret
+}
+
+function int2ip(ip,ret,x) {
+	ret=and(ip,255)
+	ip=rshift(ip,8)
+	for(;x<3;ret=and(ip,255)"."ret,ip=rshift(ip,8),x++);
+	return ret
+}
+
+function compl32(v) {
+	ret=xor(v, 0xffffffff)
+	return ret
+}
+
+BEGIN {
+	slpos=index(ARGV[1],"/")
+	if (slpos == 0) {
+		ipaddr=ip2int(ARGV[1])
+		dotpos=index(ARGV[2],".")
+		if (dotpos == 0)
+			netmask=compl32(2**(32-int(ARGV[2]))-1)
+		else
+			netmask=ip2int(ARGV[2])
+	} else {
+		ipaddr=ip2int(substr(ARGV[1],0,slpos-1))
+		netmask=compl32(2**(32-int(substr(ARGV[1],slpos+1)))-1)
+		ARGV[4]=ARGV[3]
+		ARGV[3]=ARGV[2]
+	}
+
+	network=and(ipaddr,netmask)
+	broadcast=or(network,compl32(netmask))
+
+	start=or(network,and(ip2int(ARGV[3]),compl32(netmask)))
+	limit=network+1
+	if (start<limit) start=limit
+
+	end=start+ARGV[4]
+	limit=or(network,compl32(netmask))-1
+	if (end>limit) end=limit
+
+	print "IP="int2ip(ipaddr)
+	print "NETMASK="int2ip(netmask)
+	print "BROADCAST="int2ip(broadcast)
+	print "NETWORK="int2ip(network)
+	print "PREFIX="32-bitcount(compl32(netmask))
+
+	# range calculations:
+	# ipcalc <ip> <netmask> <start> <num>
+
+	if (ARGC > 3) {
+		print "START="int2ip(start)
+		print "END="int2ip(end)
+	}
+}
+EOF

5.4/target/linux/ipq40xx/base-files/etc/board.d/1-board_json

@@ -0,0 +1,515 @@
+#!/bin/sh
+#
+# Copyright (c) 2015 The Linux Foundation. All rights reserved.
+# Copyright (c) 2011-2015 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+. /lib/functions/teltonika-defaults.sh
+. /lib/functions/system.sh
+
+[ -f /lib/functions/target-defaults.sh ] && \
+	. /lib/functions/target-defaults.sh
+
+setup_json() {
+	local model="$1"
+
+	case "$model" in
+	RUTX08*)
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_switch "switch0" \
+			"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
+		ucidef_set_usb_jack "/usb1/1-1/"
+		ucidef_set_hwinfo usb ethernet ios
+		ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
+		;;
+	RUTX09*)
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_switch "switch0" \
+			"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
+		ucidef_add_static_modem_info "$model" "3-1" "2" "primary" "gps_out"
+		ucidef_set_usb_jack "/usb1/1-1/"
+		ucidef_set_hwinfo dual_sim usb gps mobile ethernet ios
+		ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
+		;;
+	RUTX10*)
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_switch "switch0" \
+			"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
+		ucidef_set_usb_jack "/usb1/1-1/"
+		ucidef_add_wlan_bssid_limit "wlan0" 16
+		ucidef_add_wlan_bssid_limit "wlan1" 16
+		ucidef_set_hwinfo bluetooth usb wifi dual_band_ssid ethernet ios
+		ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
+		;;
+	RUTX11*)
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_switch "switch0" \
+			"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
+		ucidef_add_wlan_bssid_limit "wlan0" 16
+		ucidef_add_wlan_bssid_limit "wlan1" 16
+		ucidef_add_static_modem_info "$model" "3-1" "2" "primary" "gps_out"
+		ucidef_set_usb_jack "/usb1/1-1/"
+		ucidef_set_hwinfo dual_sim usb gps mobile wifi dual_band_ssid bluetooth ethernet ios
+		ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
+		;;
+	RUTXR1*)
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_switch "switch0" \
+			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
+		ucidef_add_wlan_bssid_limit "wlan0" 16
+		ucidef_add_wlan_bssid_limit "wlan1" 16
+		ucidef_add_static_modem_info "$model" "3-1" "2" "primary"
+		ucidef_set_hwinfo dual_sim usb mobile wifi dual_band_ssid ethernet sfp_port sfp_switch console rs232
+		ucidef_set_usb_jack "/usb1/1-1/1-1.2/"
+		ucidef_add_serial_capabilities "rs232" \
+			"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
+			"7 8" \
+			"rts/cts xon/xoff none" \
+			"1 2" \
+			"even odd mark space none" \
+			"/usb1/1-1/1-1.3/"
+		ucidef_set_release_version "2.3.1"
+		ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
+		;;
+	RUTX12*)
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_switch "switch0" \
+			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
+		ucidef_add_wlan_bssid_limit "wlan0" 16
+		ucidef_add_wlan_bssid_limit "wlan1" 16
+		# builtin and primary should be first modem
+		ucidef_add_static_modem_info "$model" "3-1" "1" "primary" "gps_out"
+		ucidef_add_static_modem_info "$model" "1-1.2" "1"
+		ucidef_set_usb_jack "/usb1/1-1/1-1.3/"
+		ucidef_set_hwinfo usb gps mobile wifi dual_band_ssid bluetooth ethernet ios dual_modem
+		ucidef_set_release_version "2.3.1"
+		ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
+		;;
+	RUTX14*)
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_switch "switch0" \
+			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
+		ucidef_add_wlan_bssid_limit "wlan0" 16
+		ucidef_add_wlan_bssid_limit "wlan1" 16
+		ucidef_add_static_modem_info "$model" "1-1" "2" "primary" "gps_out"
+		ucidef_set_usb_jack "/usb3/3-1/"
+		ucidef_set_hwinfo usb gps dual_sim mobile wifi dual_band_ssid bluetooth ethernet ios at_sim
+		ucidef_set_release_version "2.6.1"
+		ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
+		;;
+	RUTX18*)
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_switch "switch0" \
+			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
+		ucidef_add_wlan_bssid_limit "wlan0" 16
+		ucidef_add_wlan_bssid_limit "wlan1" 16
+		ucidef_add_static_modem_info "$model" "2-1" "2" "primary" "gps_out"
+		ucidef_set_usb_jack "/usb1/1-1/"
+		ucidef_set_hwinfo usb gps dual_sim mobile wifi dual_band_ssid bluetooth ethernet ios
+		ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
+		;;
+	RUTX50*)
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_switch "switch0" \
+			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
+		ucidef_add_wlan_bssid_limit "wlan0" 16
+		ucidef_add_wlan_bssid_limit "wlan1" 16
+		ucidef_add_static_modem_info "$model" "2-1" "2" "primary" "gps_out"
+		ucidef_set_usb_jack "/usb3/3-1/"
+		ucidef_set_hwinfo dual_sim usb gps mobile wifi dual_band_ssid ethernet ios at_sim
+		ucidef_set_release_version "7.2.8"
+		ucidef_set_network_options "vlans" 128 "readonly_vlans" 2
+		;;
+	TRB2*)
+		ucidef_set_led_switch "lan" "LAN" "eth_led" "switch0" "0x04"
+		ucidef_set_interface_lan "eth0"
+		ucidef_add_static_modem_info "$model" "1-1.4" "2" "primary" "gps_out"
+		ucidef_add_serial_capabilities "rs232" \
+			"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
+			"7 8" \
+			"rts/cts xon/xoff none" \
+			"1 2" \
+			"even odd mark space none" \
+			"/usb1/1-1/1-1.3/"
+		ucidef_add_serial_capabilities "rs485" \
+			"300 600 1200 2400 4800 9600 19200 38400 57600 115200 \
+			 230400 460800 921600 1000000 3000000" \
+			"7 8" \
+			"none" \
+			"1 2" \
+			"even odd mark space none" \
+			"/usb1/1-1/1-1.2/"
+		ucidef_set_hwinfo dual_sim mobile gps ethernet ios rs232 rs485
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
+		;;
+	RUT361* |\
+	RUT200* |\
+	RUT241* |\
+	RUT260*)
+		ucidef_set_led_switch "lan" "LAN" "eth1_led" "switch0" "0x2"
+		ucidef_set_led_switch "wan" "WAN" "eth2_led" "switch0" "0x1"
+		ucidef_add_switch "switch0" "1:lan" "0:wan:2" "6@eth0"
+		ucidef_add_wlan_bssid_limit "wlan0" 4
+		ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
+		ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
+		ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
+		[ "${model:6:1}" = "1" ] && ucidef_set_hwinfo mobile wifi \
+		ethernet || ucidef_set_hwinfo mobile wifi ethernet ios
+		[ "${model:4:2}" = "60" ] && ucidef_set_release_version "7.4.2"
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
+		;;
+	RUT2*)
+		ucidef_set_led_switch "lan" "LAN" "lan_led" "switch0" "0x04"
+		ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_wlan_bssid_limit "wlan0" 8
+		ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
+		[ "${model:6:1}" = "1" ] && ucidef_set_hwinfo mobile wifi \
+		ethernet || ucidef_set_hwinfo mobile wifi ethernet ios
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
+		;;
+	RUT300*)
+		ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x02"
+		ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x10"
+		ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x08"
+		ucidef_set_led_switch "lan4" "LAN4" "eth4_led" "switch0" "0x04"
+		ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
+		ucidef_set_interface_wan "eth1"
+		ucidef_set_usb_jack "/usb1/1-1/"
+		ucidef_add_switch "switch0" \
+			"0@eth0" "1:lan:1" "2:lan:4" "3:lan:3" "4:lan:2"
+		ucidef_set_hwinfo usb ethernet ios
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
+		;;
+	RUT301*)
+		ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x01"
+		ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
+		ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
+		ucidef_set_led_switch "lan4" "LAN4" "eth4_led" "switch0" "0x08"
+		ucidef_set_led_switch "wan"  "WAN"  "wan_led"  "switch0" "0x10"
+		ucidef_add_switch "switch0" "0:lan:1" "1:lan:2" "2:lan:3" \
+			"3:lan:4" "4:wan" "6@eth0"
+		ucidef_set_usb_jack "/usb2/2-1/"
+		ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
+		ucidef_set_hwinfo usb ethernet ios
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
+		;;
+	RUT360*)
+		ucidef_set_led_switch "lan" "LAN" "eth1_led" "switch0" "0x10"
+		ucidef_set_led_netdev "wan" "WAN" "eth2_led" "eth1"
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_wlan_bssid_limit "wlan0" 8
+		ucidef_add_wlan_bssid_limit "wlan1" 8
+		ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
+		ucidef_set_hwinfo mobile wifi dual_band_ssid ethernet ios
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
+		;;
+	RUT950*)
+		ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x10"
+		ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x08"
+		ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
+		ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
+		ucidef_set_interface_wan "eth1"
+		ucidef_add_wlan_bssid_limit "wlan0" 8
+		ucidef_add_switch "switch0" "0@eth0" "2:lan:3" "3:lan:2" "4:lan:1"
+		ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
+		[ "${model:7:2}" = "06" ] && ucidef_set_hwinfo dual_sim mobile \
+		wifi ethernet || ucidef_set_hwinfo dual_sim mobile wifi ethernet ios
+		ucidef_set_network_options "vlans" 15 "readonly_vlans" 1
+		;;
+	RUT955*)
+		ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x10"
+		ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x08"
+		ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
+		ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1"
+		ucidef_set_interface_wan "eth1"
+		ucidef_add_wlan_bssid_limit "wlan0" 8
+		ucidef_add_switch "switch0" "0@eth0" "2:lan:3" "3:lan:2" "4:lan:1"
+		ucidef_set_usb_jack "/usb1/1-1/1-1.1/"
+		ucidef_add_static_modem_info "$model" "1-1.4" "2" "primary" "gps_out"
+		[ "${model:7:2}" = "06" ] && ucidef_set_hwinfo dual_sim usb gps sd_card \
+		mobile wifi ethernet rs232 rs485 || ucidef_set_hwinfo dual_sim usb gps sd_card \
+						mobile wifi ethernet ios rs232 rs485
+		ucidef_add_serial_capabilities "rs232" \
+			"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
+			"5 6 7 8" \
+			"rts/cts xon/xoff none" \
+			"1 2" \
+			"even odd mark space none" \
+			"/usb1/1-1/1-1.3/"
+		ucidef_add_serial_capabilities "rs485" \
+			"300 600 1200 2400 4800 9600 19200 38400 57600 115200 \
+			 230400 460800 921600 1000000 3000000" \
+			"8" \
+			"none" \
+			"1 2" \
+			"even odd none" \
+			"/tty/ttyATH1"
+		ucidef_set_network_options "vlans" 15 "readonly_vlans" 1
+		;;
+	RUT901* |\
+	RUT951*)
+		ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x01"
+		ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
+		ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
+		ucidef_set_led_switch "wan"  "WAN"  "wan_led"  "switch0" "0x10"
+		ucidef_add_switch "switch0" "0:lan:1" "1:lan:2" "2:lan:3" "4:wan" "6@eth0"
+		ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
+		ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
+		ucidef_add_wlan_bssid_limit "wlan0" 4
+		ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
+		[ "${model:7:1}" = "6" ] && ucidef_set_hwinfo dual_sim mobile \
+		wifi ethernet || ucidef_set_hwinfo dual_sim mobile wifi ethernet ios
+		[ "${model:4:2}" = "01" ] && ucidef_set_release_version "7.3.1"
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
+		;;
+	RUT906* |\
+	RUT956*)
+		ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x01"
+		ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
+		ucidef_set_led_switch "lan3" "LAN3" "eth3_led" "switch0" "0x04"
+		ucidef_set_led_switch "wan"  "WAN"  "wan_led"  "switch0" "0x10"
+		ucidef_add_switch "switch0" "0:lan:1" "1:lan:2" "2:lan:3" "4:wan" "6@eth0"
+		ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
+		ucidef_set_usb_jack "/usb1/1-1/1-1.1/"
+		ucidef_set_interface_default_macaddr "wan" "$(macaddr_add "$(mtd_get_mac_binary config 0x0)" 1)"
+		ucidef_add_wlan_bssid_limit "wlan0" 4
+		ucidef_add_static_modem_info "$model" "1-1.4" "2" "primary" "gps_out"
+		[ "${model:7:1}" = "6" ] && ucidef_set_hwinfo dual_sim usb gps \
+		mobile wifi ethernet rs232 rs485 || ucidef_set_hwinfo dual_sim usb gps \
+						mobile wifi ethernet ios rs232 rs485
+		[ "${model:4:2}" = "06" ] && ucidef_set_release_version "7.4.2"
+		ucidef_add_serial_capabilities "rs232" \
+			"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
+			"5 6 7 8" \
+			"rts/cts xon/xoff none" \
+			"1 2" \
+			"even odd mark space none" \
+			"/usb1/1-1/1-1.3/"
+		ucidef_add_serial_capabilities "rs485" \
+			"300 600 1200 2400 4800 9600 19200 38400 57600 115200 230400" \
+			"5 6 7 8" \
+			"xon/xoff none" \
+			"1 2" \
+			"even odd mark space none" \
+			"/tty/ttyS1"
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 2
+		;;
+	TRB140*)
+		ucidef_set_interface_lan "eth0 rndis0"
+		[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile ethernet || \
+			ucidef_set_hwinfo mobile ethernet ios
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		[ "${model:6:1}" = "4" ] && \
+			ucidef_set_release_version "7.4.2"
+		;;
+	TRB143*)
+		ucidef_set_interface_lan "eth0 rndis0"
+		[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile ethernet || \
+			ucidef_set_hwinfo mobile ethernet ios
+		ucidef_add_serial_capabilities "mbus" \
+			"300 600 1200 2400 4800 9600 19200 38400" \
+			"5 6 7 8" \
+			"xon/xoff none" \
+			"1 2" \
+			"even odd mark space none" \
+			"/tty/ttyHS0"
+		if [ "${model:6:1}" = "4" ]; then
+			ucidef_set_release_version "7.4.3"
+		else
+			ucidef_set_release_version "7.1.7"
+		fi
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+	TRB141*)
+		ucidef_set_interface_lan "rndis0"
+		ucidef_set_hwinfo mobile ios
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		[ "${model:6:1}" = "4" ] && \
+			ucidef_set_release_version "7.4.3"
+		;;
+	TRB142*)
+		ucidef_set_interface_lan "rndis0"
+		[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile rs232 || \
+			ucidef_set_hwinfo mobile ios rs232
+		ucidef_add_serial_capabilities "rs232" \
+			"300 600 1200 2400 4800 9600 19200 38400 57600 115200" \
+			"5 6 7 8" \
+			"rts/cts xon/xoff none" \
+			"1 2" \
+			"even odd mark space none" \
+			"/tty/ttyHS0"
+		if [ "${model:6:1}" = "3" ]; then
+			ucidef_set_release_version "7.1"
+		elif [ "${model:6:1}" = "4" ]; then
+			ucidef_set_release_version "7.4.3"
+		fi
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+	TRB145*)
+		ucidef_set_interface_lan "rndis0"
+		[ "${model:7:1}" = "2" ] && ucidef_set_hwinfo mobile rs485 || \
+			ucidef_set_hwinfo mobile ios rs485
+		ucidef_add_serial_capabilities "rs485" \
+			"300 600 1200 2400 4800 9600 19200 38400 57600 115200 \
+			 230400 460800 921600 1000000 3000000" \
+			"5 6 7 8" \
+			"xon/xoff none" \
+			"1 2" \
+			"even odd mark space none" \
+			"/tty/ttyHS0"
+		if [ "${model:6:1}" = "2" ]; then
+			ucidef_set_release_version "7.1"
+		elif [ "${model:6:1}" = "4" ]; then
+			ucidef_set_release_version "7.4.3"
+		fi
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+	TCR100*)
+		ucidef_set_led_switch "lan" "LAN" "eth1_led" "switch0" "0x10"
+		ucidef_set_led_netdev "wan" "WAN" "eth2_led" "eth1"
+		ucidef_set_interfaces_lan_wan "eth0" "eth1"
+		ucidef_add_wlan_bssid_limit "wlan0" 8
+		ucidef_add_wlan_bssid_limit "wlan1" 8
+		ucidef_set_interface guest proto static type bridge \
+		guest 1 _wireless true _dhcp true
+		ucidef_add_static_modem_info "$model" "1-1" "1" "primary"
+		ucidef_set_hwinfo mobile wifi dual_band_ssid wps ethernet
+		ucidef_set_release_version "7.2.4"
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
+		;;
+	OTD140*)
+		ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x10"
+		ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x2"
+		ucidef_add_switch "switch0" "4:lan:1" "1:lan:2" "6@eth0"
+		ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
+		ucidef_set_interface "lan" "default_ip" "%%LAN_IP%%"
+		ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
+		ucidef_set_hwinfo ethernet mobile dual_sim poe
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
+		ucidef_set_poe 2 15400 1 "lan2" "3" 15400
+		ucidef_set_poe_chip "0X77" "0:lan2"
+		ucidef_set_poe_chip "0X2F" "1:lan2"
+		;;
+	OTD160*)
+		ucidef_set_led_switch "lan1" "LAN1" "eth1_led" "switch0" "0x04"
+		ucidef_set_led_switch "lan2" "LAN2" "eth2_led" "switch0" "0x02"
+		ucidef_set_interface_lan "eth0"
+		ucidef_add_wlan_bssid_limit "wlan0" 8
+		ucidef_add_wlan_bssid_limit "wlan1" 8
+		ucidef_add_static_modem_info "$model" "1-1" "2" "primary"
+		ucidef_set_hwinfo dual_sim mobile wifi dual_band_ssid ethernet
+		ucidef_set_network_options "vlans" 16 "readonly_vlans" 1
+		;;
+	TAP100*)
+		ucidef_set_led_switch "lan" "LAN" "eth0_led" "switch0" "0x10"
+		ucidef_add_wlan_bssid_limit "wlan0" 4
+		ucidef_set_interface_lan "eth0"
+		ucidef_set_interface "lan" "ipv6" "1"
+		ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary config 0x0)"
+		ucidef_set_hwinfo wifi ethernet sw_rst_on_init
+		ucidef_set_network_options "ula" false "disable_vlan" true "ip6assign" false "vlans" 16 "readonly_vlans" 1 "no_metric" true
+		ucidef_set_interface "dhcp" "device" "@lan" "proto" "dhcp"
+		;;
+	TRB500*)
+		ucidef_set_interface_lan "eth0 ecm0"
+		ucidef_set_interface_default_macaddr "lan" "$(mtd_get_mac_binary mnf_info 0x0)" \
+			"$(macaddr_add "$(mtd_get_mac_binary mnf_info 0x0)" 1)"
+		ucidef_set_hwinfo mobile ethernet ios
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+	RUTM50*)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
+		ucidef_set_usb_jack "/usb1/1-2/"
+		ucidef_add_wlan_bssid_limit "wlan0" 4
+		ucidef_add_wlan_bssid_limit "wlan1" 4
+		ucidef_add_static_modem_info "$model" "2-1" "2" "primary" "gps_out"
+		ucidef_set_hwinfo usb ethernet ios gps mobile wifi dual_band_ssid dual_sim at_sim dsa hw_nat
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+	RUTM51*)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
+		ucidef_set_usb_jack "/usb1/1-2/"
+		ucidef_add_wlan_bssid_limit "wlan0" 4
+		ucidef_add_wlan_bssid_limit "wlan1" 4
+		ucidef_add_static_modem_info "$model" "2-1" "2" "primary"
+		ucidef_set_hwinfo usb ethernet ios mobile wifi dual_band_ssid dual_sim at_sim dsa hw_nat
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		ucidef_set_release_version "7.4.4"
+		;;
+	RUTM08*)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
+		ucidef_set_usb_jack "/usb1/1-1/"
+		ucidef_set_hwinfo usb ethernet ios dsa hw_nat
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+	RUTM09*)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
+		ucidef_add_static_modem_info "$model" "1-2" "2" "primary" "gps_out"
+		ucidef_set_usb_jack "/usb1/1-1/"
+		ucidef_set_hwinfo usb ethernet ios gps mobile dual_sim dsa hw_nat
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+	RUTM10*)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
+		ucidef_set_usb_jack "/usb1/1-1/"
+		ucidef_add_wlan_bssid_limit "wlan0" 4
+		ucidef_add_wlan_bssid_limit "wlan1" 4
+		ucidef_set_hwinfo usb ethernet ios wifi dual_band_ssid dsa hw_nat
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+	RUTM11*)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
+		ucidef_set_usb_jack "/usb1/1-1/"
+		ucidef_add_wlan_bssid_limit "wlan0" 4
+		ucidef_add_wlan_bssid_limit "wlan1" 4
+		ucidef_add_static_modem_info "$model" "1-2" "2" "primary" "gps_out"
+		ucidef_set_hwinfo usb ethernet ios gps mobile wifi dual_band_ssid dual_sim dsa hw_nat
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+	RUTM12*)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
+		ucidef_set_usb_jack "/usb1/1-2/1-2.3/"
+		ucidef_add_wlan_bssid_limit "wlan0" 4
+		ucidef_add_wlan_bssid_limit "wlan1" 4
+		ucidef_add_static_modem_info "$model" "1-1" "1" "primary" "gps_out"
+		ucidef_add_static_modem_info "$model" "1-2.2" "1"
+		ucidef_set_hwinfo usb ethernet ios gps mobile wifi dual_band_ssid dual_modem dsa hw_nat
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+
+	x86)
+		ucidef_set_interface_wan "eth0"
+		ucidef_set_interface_lan "eth1"
+		ucidef_add_wlan_bssid_limit "wlan0" 4
+		ucidef_add_wlan_bssid_limit "wlan1" 4
+		ucidef_set_hwinfo usb wifi dual_band_ssid ethernet
+		ucidef_set_network_options "vlans" 4094 "readonly_vlans" 1
+		;;
+	*)
+		echo "Unsupported hardware. Network interfaces not intialized"
+		;;
+	esac
+
+	ucidef_set_interface "lan" "default_ip" "%%LAN_IP%%"
+
+	type ucidef_target_defaults &> /dev/null && \
+		ucidef_target_defaults "$model"
+}
+
+#~ Get model name for RUTX products
+if ! model="$(mnf_info --name)" 2>/dev/null; then
+	model="$(mnf_info --prod-code)" 2>/dev/null
+fi
+
+platform="$(cat /proc/device-tree/platform)" 2>/dev/null
+
+board_config_update
+setup_json "$model"
+
+ucidef_set_board_platform "$platform"
+
+board_config_flush
+
+exit 0

5.4/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata

@@ -0,0 +1,71 @@
+#!/bin/sh
+
+ath10kcal_die() {
+	echo "ath10cal: " "$*"
+	exit 1
+}
+
+ath10kcal_extract() {
+	local part=$1
+	local offset=$2
+	local count=$3
+	local mtd
+
+	mtd=$(find_mtd_chardev $part)
+	[ -n "$mtd" ] || \
+		ath10kcal_die "no mtd device found for partition $part"
+
+	dd if=$mtd of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \
+		ath10kcal_die "failed to extract calibration data from $mtd"
+}
+
+ensure_correct_art() {
+	# NOTE(rytis): Hardcoded hashes for 64 KiB file, filled with zeroes (md5b0) and ones (md5b1).
+	local md5b0="fcd6bcb56c1689fcef28b57c22475bad"
+	local md5b1="ecb99e6ffea7be1e5419350f725da86b"
+	local artdir="/dev/mtd12"
+	local bindir="/usr/share/art/art_rutx.bin"
+	local md5art="$(md5sum $artdir)"
+	md5art="${md5art%% *}"
+	local devicename="$(mnf_info -n)"
+	devicename="${devicename:0:6}"
+
+	if [ "$devicename" != "RUTX08" ] && [ "$devicename" != "RUTX09" ]; then
+		if [ "$md5art" == "$md5b0" ] || [ "$md5art" == "$md5b1" ] && [ -e "$bindir" ]; then
+			mtd write $bindir $artdir
+		fi
+	else
+		if [ "$md5art" != "$md5b0" ] && [ "$md5art" != "$md5b1" ]; then
+			mtd erase $artdir
+		fi
+	fi
+}
+
+[ -e /lib/firmware/$FIRMWARE ] && exit 0
+
+. /lib/functions.sh
+. /lib/functions/system.sh
+
+board=$(board_name)
+
+ensure_correct_art
+
+case "$FIRMWARE" in
+"ath10k/pre-cal-ahb-a000000.wifi.bin")
+	case "$board" in
+	teltonika,rutx)
+		ath10kcal_extract "0:ART" 4096 12064
+		;;
+	esac
+	;;
+"ath10k/pre-cal-ahb-a800000.wifi.bin")
+	case "$board" in
+	teltonika,rutx)
+		ath10kcal_extract "0:ART" 20480 12064
+		;;
+	esac
+	;;
+*)
+	exit 1
+	;;
+esac

5.4/target/linux/ipq40xx/base-files/etc/hotplug.d/ieee80211/09_fix_wifi_mac

@@ -0,0 +1,23 @@
+#!/bin/ash
+
+[ "$ACTION" == "add" ] || exit 0
+
+PHYNBR=${DEVPATH##*/phy}
+
+[ -n $PHYNBR ] || exit 0
+
+. /lib/functions.sh
+. /lib/functions/system.sh
+
+board=$(board_name)
+
+case "$board" in
+	teltonika,rutx)
+		mac_addr=$(mtd_get_mac_binary 0:CONFIG 0)
+		if [ "$mac_addr" != "ff:ff:ff:ff:ff:ff" ]; then
+			echo $(macaddr_add $mac_addr $(($PHYNBR + 2)) ) > /sys${DEVPATH}/macaddress
+		fi
+		;;
+	*)
+		;;
+esac

5.4/target/linux/ipq40xx/base-files/etc/init.d/boot

@@ -0,0 +1,70 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2006-2011 OpenWrt.org
+
+START=10
+STOP=90
+
+uci_apply_defaults() {
+	. /lib/functions/system.sh
+
+	cd /etc/uci-defaults || return 0
+	files="$(find . -type f | sort)"
+	[ -z "$files" ] && return 0
+	mkdir -p /tmp/.uci
+	for file in $files; do
+		( . "./$file" ) && rm -f "$file"
+	done
+	uci commit
+}
+
+boot() {
+	[ -f /proc/mounts ] || /sbin/mount_root
+	[ -f /proc/jffs2_bbc ] && echo "S" > /proc/jffs2_bbc
+
+	mkdir -p /var/run
+	mkdir -p /var/log
+	mkdir -p /var/lock
+	mkdir -p /var/state
+	mkdir -p /var/tmp
+	mkdir -p /tmp/.uci
+	chmod 0700 /tmp/.uci
+	touch /var/log/wtmp
+	touch /var/log/lastlog
+	mkdir -p /tmp/resolv.conf.d
+	touch /tmp/resolv.conf.d/resolv.conf.auto
+	ln -sf /tmp/resolv.conf.d/resolv.conf.auto /tmp/resolv.conf
+	grep -q debugfs /proc/filesystems && /bin/mount -o noatime -t debugfs debugfs /sys/kernel/debug
+	grep -q bpf /proc/filesystems && /bin/mount -o nosuid,nodev,noexec,noatime,mode=0700 -t bpf bpffs /sys/fs/bpf
+	grep -q pstore /proc/filesystems && /bin/mount -o noatime -t pstore pstore /sys/fs/pstore
+
+	# mount all entries in fstab
+	/bin/mount -a &
+
+	# /log directory might be created on preinit
+	# symlink /storage to /log on TRB14X devices
+	[ -d /storage -a ! -h /log ] && {
+		rm -rf /log
+		ln -sf /storage /log
+	}
+
+	# Wifi ---
+	param=$(/sbin/mnf_info "--name")
+	router_name=${param:0:6}
+	if [ $router_name == "RUTX08" ] || [ $router_name == "RUTX09" ]; then
+		rm /etc/modules.d/ath10k
+	fi
+
+	/bin/board_detect
+
+	/sbin/kmodloader
+
+	/bin/config_generate
+	uci_apply_defaults
+
+	[ -f "/etc/config/teltonika" ] && rm /etc/config/teltonika
+
+	# temporary hack until configd exists
+	/sbin/reload_config
+	# leave finished boot script indication
+	touch /var/run/boot-done
+}

5.4/target/linux/ipq40xx/base-files/etc/init.d/done

@@ -0,0 +1,13 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2006 OpenWrt.org
+
+START=95
+boot() {
+	mount_root done
+	rm -f /sysupgrade.tgz && sync
+
+	# process user commands
+	[ -f /etc/rc.local ] && {
+		sh /etc/rc.local
+	}
+}

5.4/target/linux/ipq40xx/base-files/etc/init.d/gpio_switch

@@ -0,0 +1,66 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2015 OpenWrt.org
+
+START=94
+STOP=10
+USE_PROCD=1
+
+
+load_gpio_switch()
+{
+	local name
+	local gpio_pin
+	local value
+
+	config_get gpio_pin "$1" gpio_pin
+	config_get name "$1" name
+	config_get value "$1" value 0
+
+	[ -z "$gpio_pin" ] && {
+		echo >&2 "Skipping gpio_switch '$name' due to missing gpio_pin"
+		return 1
+	}
+
+	local gpio_path
+	if [ -n "$(echo "$gpio_pin" | grep -E "^[0-9]+$")" ]; then
+		gpio_path="/sys/class/gpio/gpio${gpio_pin}"
+
+		# export GPIO pin for access
+		[ -d "$gpio_path" ] || {
+			echo "$gpio_pin" >/sys/class/gpio/export
+			# we need to wait a bit until the GPIO appears
+			[ -d "$gpio_path" ] || sleep 1
+		}
+
+		# direction attribute only exists if the kernel supports changing the
+		# direction of a GPIO
+		if [ -e "${gpio_path}/direction" ]; then
+			# set the pin to output with high or low pin value
+			{ [ "$value" = "0" ] && echo "low" || echo "high"; } \
+				>"$gpio_path/direction"
+		else
+			{ [ "$value" = "0" ] && echo "0" || echo "1"; } \
+				>"$gpio_path/value"
+		fi
+	else
+		gpio_path="/sys/class/gpio/${gpio_pin}"
+
+		[ -d "$gpio_path" ] && {
+			{ [ "$value" = "0" ] && echo "0" || echo "1"; } \
+				>"$gpio_path/value"
+		}
+	fi
+}
+
+service_triggers()
+{
+	procd_add_reload_trigger "system"
+}
+
+start_service()
+{
+	[ -e /sys/class/gpio/ ] && {
+		config_load system
+		config_foreach load_gpio_switch gpio_switch
+	}
+}

5.4/target/linux/ipq40xx/base-files/etc/init.d/led

@@ -0,0 +1,140 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2008 OpenWrt.org
+
+START=96
+
+load_led() {
+	local name
+	local sysfs
+	local trigger
+	local dev
+	local ports
+	local mode
+	local default
+	local delayon
+	local delayoff
+	local interval
+
+	config_get sysfs $1 sysfs
+	config_get name $1 name "$sysfs"
+	config_get trigger $1 trigger "none"
+	config_get dev $1 dev
+	config_get ports $1 port
+	config_get mode $1 mode
+	config_get_bool default $1 default "0"
+	config_get delayon $1 delayon
+	config_get delayoff $1 delayoff
+	config_get interval $1 interval "50"
+	config_get port_state $1 port_state
+	config_get delay $1 delay "150"
+	config_get message $1 message ""
+	config_get gpio $1 gpio "0"
+	config_get inverted $1 inverted "0"
+
+	if [ "$trigger" = "rssi" ]; then
+		# handled by rssileds userspace process
+		return
+	fi
+
+	[ "$trigger" = "usbdev" ] && {
+		# Backward compatibility: translate to the new trigger
+		trigger="usbport"
+		# Translate port of root hub, e.g. 4-1 -> usb4-port1
+		ports=$(echo "$dev" | sed -n 's/^\([0-9]*\)-\([0-9]*\)$/usb\1-port\2/p')
+		# Translate port of extra hub, e.g. 2-2.4 -> 2-2-port4
+		[ -z "$ports" ] && ports=$(echo "$dev" | sed -n 's/\./-port/p')
+	}
+
+	[ -e /sys/class/leds/${sysfs}/brightness ] && {
+		echo "setting up led ${name}"
+
+		printf "%s %s %d\n" \
+			"$sysfs" \
+			"$(sed -ne 's/^.*\[\(.*\)\].*$/\1/p' /sys/class/leds/${sysfs}/trigger)" \
+			"$(cat /sys/class/leds/${sysfs}/brightness)" \
+				>> /var/run/led.state
+
+		[ "$default" = 0 ] &&
+			echo 0 >/sys/class/leds/${sysfs}/brightness
+
+		echo $trigger > /sys/class/leds/${sysfs}/trigger 2> /dev/null
+		ret="$?"
+
+		[ $default = 1 ] &&
+			cat /sys/class/leds/${sysfs}/max_brightness > /sys/class/leds/${sysfs}/brightness
+
+		[ $ret = 0 ] || {
+			echo >&2 "Skipping trigger '$trigger' for led '$name' due to missing kernel module"
+			return 1
+		}
+		case "$trigger" in
+		"netdev")
+			[ -n "$dev" ] && {
+				echo $dev > /sys/class/leds/${sysfs}/device_name
+				for m in $mode; do
+					[ -e "/sys/class/leds/${sysfs}/$m" ] && \
+						echo 1 > /sys/class/leds/${sysfs}/$m
+				done
+				echo $interval > /sys/class/leds/${sysfs}/interval
+			}
+			;;
+
+		"timer"|"oneshot")
+			[ -n "$delayon" ] && \
+				echo $delayon > /sys/class/leds/${sysfs}/delay_on
+			[ -n "$delayoff" ] && \
+				echo $delayoff > /sys/class/leds/${sysfs}/delay_off
+			;;
+
+		"usbport")
+			local p
+
+			for p in $ports; do
+				echo 1 > /sys/class/leds/${sysfs}/ports/$p
+			done
+			;;
+
+		"port_state")
+			[ -n "$port_state" ] && \
+				echo $port_state > /sys/class/leds/${sysfs}/port_state
+			;;
+
+		"gpio")
+			echo $gpio > /sys/class/leds/${sysfs}/gpio
+			echo $inverted > /sys/class/leds/${sysfs}/inverted
+			;;
+
+		switch[0-9]*)
+			local port_mask speed_mask
+
+			config_get port_mask $1 port_mask
+			[ -n "$port_mask" ] && \
+				echo $port_mask > /sys/class/leds/${sysfs}/port_mask
+			config_get speed_mask $1 speed_mask
+			[ -n "$speed_mask" ] && \
+				echo $speed_mask > /sys/class/leds/${sysfs}/speed_mask
+			[ -n "$mode" ] && \
+				echo "$mode" > /sys/class/leds/${sysfs}/mode
+			;;
+		esac
+	}
+}
+
+start() {
+	[ -e /sys/class/leds/ ] && {
+		[ -s /var/run/led.state ] && {
+			local led trigger brightness
+			while read led trigger brightness; do
+				[ -e "/sys/class/leds/$led/trigger" ] && \
+					echo "$trigger" > "/sys/class/leds/$led/trigger"
+
+				[ -e "/sys/class/leds/$led/brightness" ] && \
+					echo "$brightness" > "/sys/class/leds/$led/brightness"
+			done < /var/run/led.state
+			rm /var/run/led.state
+		}
+
+		config_load system
+		config_foreach load_led led
+	}
+}

5.4/target/linux/ipq40xx/base-files/etc/init.d/modem_tracker

@@ -0,0 +1,37 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2021 Teltonika Networks
+# Copyright (C) 2022 Ycarus (Yannick Chabanois) <ycarus@zugaina.org>
+
+START=2
+
+USE_PROCD=1
+
+PROG=/bin/board_track
+NAME=board_track
+PIDCOUNT=1
+
+start_service() {
+	. /lib/functions
+	
+	[ "$(board_name)" != "teltonika,rutx" ] && return 0
+	local pid_file="/var/run/${NAME}.${PIDCOUNT}.pid"
+
+	procd_open_instance
+	procd_set_param command "$PROG"
+	procd_set_param file /etc/config/system
+
+	procd_set_param respawn
+
+	procd_set_param stdout 1
+	procd_set_param pidfile $pid_file
+	procd_close_instance
+}
+
+reload_service() {
+	stop
+	start
+}
+
+service_triggers() {
+	procd_add_reload_trigger "system"
+}

5.4/target/linux/ipq40xx/base-files/etc/init.d/ntpserver

@@ -0,0 +1,28 @@
+#!/bin/sh /etc/rc.common
+
+# Copyright (C) 2021 Teltonika
+
+START=50
+STOP=51
+USE_PROCD=1
+
+service_triggers()
+{
+	procd_add_reload_trigger "ntpserver"
+}
+
+start_service() {
+	. /lib/functions.sh
+	local enabled
+
+	config_load ntpserver
+	config_get enabled general enabled "0"
+
+	[ "$enabled" -gt 0 ] || return
+
+	logger -t "ntpd" "Starting NTP server"
+	procd_open_instance
+	procd_set_param respawn 0
+	procd_set_param command "ntpd" -ln
+	procd_close_instance
+}

5.4/target/linux/ipq40xx/base-files/etc/init.d/powerctl

@@ -0,0 +1,32 @@
+#!/bin/sh /etc/rc.common
+
+START=98
+
+ipq40xx_power_auto() {
+	# change scaling governor as ondemand to enable clock scaling based on system load
+	echo "performance" > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
+
+	# set scaling min freq as 200 MHz
+	echo "716000" > /sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq
+
+	# Change sampling rate for frequency scaling decisions to 1s, from 10 ms
+	#echo "1000000" > /sys/devices/system/cpu/cpufreq/ondemand/sampling_rate
+
+	# Change sampling rate for frequency down scaling decision to 10s
+	#echo 10 > /sys/devices/system/cpu/cpufreq/ondemand/sampling_down_factor
+
+	# Change the CPU load threshold above which frequency is up-scaled to
+	# turbo frequency,to 50%
+	#echo 50 > /sys/devices/system/cpu/cpufreq/ondemand/up_threshold
+}
+
+start() {
+	. /lib/functions.sh
+
+	local board=$(board_name)
+	case "$board" in
+	teltonika,rutx | ap-dk01.1-c1 | ap-dk01.1-c2 | ap-dk04.1-c1 | ap-dk04.1-c2 | ap-dk04.1-c3 | \
+	ap-dk04.1-c4   | ap-dk04.1-c5 | ap-dk05.1-c1 | ap-dk06.1-c1 | ap-dk07.1-c1 | ap-dk07.1-c2 | ap-dk07.1-c3)
+		ipq40xx_power_auto ;;
+	esac
+}

5.4/target/linux/ipq40xx/base-files/etc/init.d/sysctl

@@ -0,0 +1,46 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2006 OpenWrt.org
+
+START=11
+
+apply_defaults() {
+	local mem="$(awk '/^MemTotal:/ {print $2}' /proc/meminfo)"
+	local min_free frag_low_thresh frag_high_thresh
+
+	if [ "$mem" -gt 65536 ]; then # 128M
+		min_free=16384
+	elif [ "$mem" -gt 32768 ]; then # 64M
+		#Too high for RUT3 device, lets make 2048
+		#min_free=8192
+		min_free=2048
+	else
+		min_free=1024
+		frag_low_thresh=393216
+		frag_high_thresh=524288
+	fi
+
+	sysctl -qw vm.min_free_kbytes="$min_free"
+
+	[ "$frag_low_thresh" ] && sysctl -qw \
+		net.ipv4.ipfrag_low_thresh="$frag_low_thresh" \
+		net.ipv4.ipfrag_high_thresh="$frag_high_thresh" \
+		net.ipv6.ip6frag_low_thresh="$frag_low_thresh" \
+		net.ipv6.ip6frag_high_thresh="$frag_high_thresh" \
+		net.netfilter.nf_conntrack_frag6_low_thresh="$frag_low_thresh" \
+		net.netfilter.nf_conntrack_frag6_high_thresh="$frag_high_thresh"
+
+	# first set default, then all interfaces to avoid races with appearing interfaces
+	if [ -d /proc/sys/net/ipv6/conf ]; then
+		echo 0 > /proc/sys/net/ipv6/conf/default/accept_ra
+		for iface in /proc/sys/net/ipv6/conf/*/accept_ra; do
+			echo 0 > "$iface"
+		done
+	fi
+}
+
+start() {
+	apply_defaults
+	for CONF in /etc/sysctl.d/*.conf /etc/sysctl.conf; do
+		[ -f "$CONF" ] && sysctl -e -p "$CONF" >&-
+	done
+}

5.4/target/linux/ipq40xx/base-files/etc/init.d/sysfixtime

@@ -0,0 +1,34 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2013-2014 OpenWrt.org
+
+START=00
+STOP=90
+
+RTC_DEV=/dev/rtc0
+HWCLOCK=/sbin/hwclock
+
+boot() {
+#	start && exit 0
+
+	local maxtime="$(maxtime)"
+	local curtime="$(date +%s)"
+	[ $curtime -lt $maxtime ] && date -s @$maxtime
+}
+
+start() {
+	boot
+}
+
+stop() {
+	[ -e "$RTC_DEV" ] && [ -e "$HWCLOCK" ] && $HWCLOCK -w -u -f $RTC_DEV && \
+		logger -t sysfixtime "saved '$(date)' to $RTC_DEV"
+}
+
+maxtime() {
+	local file newest
+
+	for file in $( find /etc -type f ) ; do
+		[ -z "$newest" -o "$newest" -ot "$file" ] && newest=$file
+	done
+	[ "$newest" ] && date -r "$newest" +%s
+}

5.4/target/linux/ipq40xx/base-files/etc/init.d/system

@@ -0,0 +1,45 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2014 OpenWrt.org
+
+START=10
+USE_PROCD=1
+
+validate_system_section() {
+	uci_load_validate system system "$1" "$2" \
+		'hostname:string:%%NAME%%' \
+		'conloglevel:uinteger' \
+		'buffersize:uinteger' \
+		'timezone:string:UTC' \
+		'zonename:string'
+}
+
+system_config() {
+	[ "$2" = 0 ] || {
+		echo "validation failed"
+		return 1
+	}
+
+	echo "$hostname" > /proc/sys/kernel/hostname
+	[ -z "$conloglevel" -a -z "$buffersize" ] || dmesg ${conloglevel:+-n $conloglevel} ${buffersize:+-s $buffersize}
+	echo "$timezone" > /tmp/TZ
+	[ -n "$zonename" ] && [ -f "/usr/share/zoneinfo/${zonename// /_}" ] \
+		&& ln -sf "/usr/share/zoneinfo/${zonename// /_}" /tmp/localtime \
+		&& rm -f /tmp/TZ
+
+	# apply timezone to kernel
+	hwclock -u --systz
+}
+
+reload_service() {
+	config_load system
+	config_foreach validate_system_section system system_config
+}
+
+service_triggers() {
+	procd_add_reload_trigger "system"
+	procd_add_validation validate_system_section
+}
+
+start_service() {
+	reload_service
+}

5.4/target/linux/ipq40xx/base-files/etc/init.d/umount

@@ -0,0 +1,13 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2006 OpenWrt.org
+
+STOP=90
+
+restart() {
+	:
+}
+
+stop() {
+	sync
+	/bin/umount -a -d -r
+}